[llvm] 56abb8d - [AArch64] Be stricter about insert/extract index

[Graham Hunter via llvm-commits]

Author: Graham Hunter
Date: 2024-03-05T09:50:32Z
New Revision: 56abb8d5355420cf7f66183f2d526009471b4fcc

URL: https://github.com/llvm/llvm-project/commit/56abb8d5355420cf7f66183f2d526009471b4fcc
DIFF: https://github.com/llvm/llvm-project/commit/56abb8d5355420cf7f66183f2d526009471b4fcc.diff

LOG: [AArch64] Be stricter about insert/extract index

Post-commit fixup patch for a request on
https://github.com/llvm/llvm-project/pull/81135

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
index 48f053c39b1bdc..755b034764ed2d 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -600,9 +600,9 @@ AArch64TTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
     TargetLoweringBase::LegalizeKind VecLK =
         getTLI()->getTypeConversion(C, VecVT);
     const Value *Idx = IsExtract ? ICA.getArgs()[1] : ICA.getArgs()[2];
-    const ConstantInt *CIdx = dyn_cast<ConstantInt>(Idx);
+    const ConstantInt *CIdx = cast<ConstantInt>(Idx);
     if (SubVecLK.first == TargetLoweringBase::TypeLegal &&
-        VecLK.first == TargetLoweringBase::TypeLegal && CIdx && CIdx->isZero())
+        VecLK.first == TargetLoweringBase::TypeLegal && CIdx->isZero())
       return TTI::TCC_Free;
     break;
   }