[llvm] [Codegen] Make Width in getMemOperandsWithOffsetWidth a LocationSize. (PR #83875)
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Mon Mar 4 09:21:29 PST 2024
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git-clang-format --diff e6dff54f362f9bcae2a3dd8b0bf7aa6fc9f11017 674cda56d44feaccbae61061442fefe2a52f96e6 -- llvm/include/llvm/CodeGen/TargetInstrInfo.h llvm/lib/CodeGen/MachineScheduler.cpp llvm/lib/CodeGen/TargetInstrInfo.cpp llvm/lib/Target/AArch64/AArch64InstrInfo.cpp llvm/lib/Target/AArch64/AArch64InstrInfo.h llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp llvm/lib/Target/AMDGPU/SIInstrInfo.cpp llvm/lib/Target/AMDGPU/SIInstrInfo.h llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp llvm/lib/Target/Hexagon/HexagonInstrInfo.h llvm/lib/Target/Hexagon/HexagonSubtarget.cpp llvm/lib/Target/Lanai/LanaiInstrInfo.cpp llvm/lib/Target/Lanai/LanaiInstrInfo.h llvm/lib/Target/PowerPC/PPCInstrInfo.cpp llvm/lib/Target/PowerPC/PPCInstrInfo.h llvm/lib/Target/RISCV/RISCVInstrInfo.cpp llvm/lib/Target/RISCV/RISCVInstrInfo.h llvm/lib/Target/X86/X86InstrInfo.cpp llvm/lib/Target/X86/X86InstrInfo.h llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 3e13da68c6..978e0d1f39 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -3649,8 +3649,10 @@ bool SIInstrInfo::checkInstOffsetsDoNotOverlap(const MachineInstr &MIa,
int64_t Offset0, Offset1;
LocationSize Dummy0 = 0, Dummy1 = 0;
bool Offset0IsScalable, Offset1IsScalable;
- if (!getMemOperandsWithOffsetWidth(MIa, BaseOps0, Offset0, Offset0IsScalable, Dummy0, &RI) ||
- !getMemOperandsWithOffsetWidth(MIb, BaseOps1, Offset1, Offset1IsScalable, Dummy1, &RI))
+ if (!getMemOperandsWithOffsetWidth(MIa, BaseOps0, Offset0, Offset0IsScalable,
+ Dummy0, &RI) ||
+ !getMemOperandsWithOffsetWidth(MIb, BaseOps1, Offset1, Offset1IsScalable,
+ Dummy1, &RI))
return false;
if (!memOpsHaveSameBaseOperands(BaseOps0, BaseOps1))
diff --git a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
index a6f32917de..b9bf26ba7c 100644
--- a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
@@ -3286,9 +3286,9 @@ unsigned HexagonInstrInfo::getAddrMode(const MachineInstr &MI) const {
// returned in Offset and the access size is returned in AccessSize.
// If the base operand has a subregister or the offset field does not contain
// an immediate value, return nullptr.
-MachineOperand *HexagonInstrInfo::getBaseAndOffset(const MachineInstr &MI,
- int64_t &Offset,
- LocationSize &AccessSize) const {
+MachineOperand *
+HexagonInstrInfo::getBaseAndOffset(const MachineInstr &MI, int64_t &Offset,
+ LocationSize &AccessSize) const {
// Return if it is not a base+offset type instruction or a MemOp.
if (getAddrMode(MI) != HexagonII::BaseImmOffset &&
getAddrMode(MI) != HexagonII::BaseLongOffset &&
diff --git a/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp b/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
index 2d781dad6b..b8a37435f5 100644
--- a/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
+++ b/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
@@ -109,7 +109,8 @@ bool LanaiInstrInfo::areMemAccessesTriviallyDisjoint(
int LowOffset = std::min(OffsetA, OffsetB);
int HighOffset = std::max(OffsetA, OffsetB);
LocationSize LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB;
- if (LowWidth.hasValue() && LowOffset + (int)LowWidth.getValue() <= HighOffset)
+ if (LowWidth.hasValue() &&
+ LowOffset + (int)LowWidth.getValue() <= HighOffset)
return true;
}
}
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index bf2e751c09..5d37e929f8 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -5549,7 +5549,8 @@ bool PPCInstrInfo::areMemAccessesTriviallyDisjoint(
int LowOffset = std::min(OffsetA, OffsetB);
int HighOffset = std::max(OffsetA, OffsetB);
LocationSize LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB;
- if (LowWidth.hasValue() && LowOffset + (int)LowWidth.getValue() <= HighOffset)
+ if (LowWidth.hasValue() &&
+ LowOffset + (int)LowWidth.getValue() <= HighOffset)
return true;
}
}
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
index 209e9bfadd..58aeac83ab 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -2346,7 +2346,8 @@ bool RISCVInstrInfo::areMemAccessesTriviallyDisjoint(
int LowOffset = std::min(OffsetA, OffsetB);
int HighOffset = std::max(OffsetA, OffsetB);
LocationSize LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB;
- if (LowWidth.hasValue() && LowOffset + (int)LowWidth.getValue() <= HighOffset)
+ if (LowWidth.hasValue() &&
+ LowOffset + (int)LowWidth.getValue() <= HighOffset)
return true;
}
}
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https://github.com/llvm/llvm-project/pull/83875
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