[llvm] [AArch64] Improve cost model for legal subvec insert/extract (PR #81135)

[Sander de Smalen via llvm-commits]

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@@ -568,6 +573,62 @@ AArch64TTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
     }
     return Cost;
   }
+  case Intrinsic::vector_extract: {
+    // If both the vector argument and the return type are legal types and the
+    // index is 0, then this should be a no-op or simple operation; return a
+    // relatively low cost.
+
+    // If arguments aren't actually supplied, then we cannot determine the
+    // value of the index. We also want to skip this on predicate types.
+    if (ICA.getArgs().size() != 2 ||
+        ICA.getReturnType()->getScalarType()->isIntegerTy(1))
+      break;
+    LLVMContext &C = RetTy->getContext();
+    EVT RetVT = getTLI()->getValueType(DL, RetTy);
+    EVT VecVT = getTLI()->getValueType(DL, ICA.getArgTypes()[0]);
+    // Skip this if either the return type or the vector argument are unpacked
+    // SVE types; they may get lowered to stack stores and loads.
+    if (isUnpackedVectorVT(RetVT) || isUnpackedVectorVT(VecVT))
+      break;
+    TargetLoweringBase::LegalizeKind RLK =
+        getTLI()->getTypeConversion(C, RetVT);
+    TargetLoweringBase::LegalizeKind PLK =
+        getTLI()->getTypeConversion(C, VecVT);
+    const ConstantInt *Idx = dyn_cast<ConstantInt>(ICA.getArgs()[1]);
+    if (RLK.first == TargetLoweringBase::TypeLegal &&
+        PLK.first == TargetLoweringBase::TypeLegal && Idx &&
+        Idx->getZExtValue() == 0)
+      return TTI::TCC_Free;
+    break;
+  }
+  case Intrinsic::vector_insert: {
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sdesmalen-arm wrote:

The code for vector_insert is almost identical to vector_extract, with the only difference the variables for the wide-vector type, the sub-vector type and the index value. Can you merge the two together?

https://github.com/llvm/llvm-project/pull/81135