[llvm] [AMDGPU] Add support for preloading hidden groupsize args (PR #83817)

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``````````bash
git-clang-format --diff d82e93e7f129d9e8b72570efdf4a15d6ec3d4336 f2e3ef0b18b3e75bab066e10dc4f43f72c62e905 -- llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp llvm/lib/Target/AMDGPU/SIISelLowering.cpp llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp b/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
index 03544279b4..9aab0c7bd1 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
@@ -399,7 +399,8 @@ static bool lowerKernelArguments(Function &F, const TargetMachine &TM) {
     uint64_t ImplicitArgsBaseOffset =
         alignTo(ExplicitArgOffset, Align(FirstImplicitArgAlignment)) +
         BaseOffset;
-    PreloadInfo.tryAllocImplicitArgPreloadSGPRs(ImplicitArgsBaseOffset, Builder);
+    PreloadInfo.tryAllocImplicitArgPreloadSGPRs(ImplicitArgsBaseOffset,
+                                                Builder);
   }
 
   return true;
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 2765df6bc7..4bb1325058 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -8428,9 +8428,8 @@ SDValue SITargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
       break;
     }
 
-    auto &ArgInfo = MFI->getArgInfo()
-                       .PreloadKernArgs.find(ImplictArgIdx)
-                       ->getSecond();
+    auto &ArgInfo =
+        MFI->getArgInfo().PreloadKernArgs.find(ImplictArgIdx)->getSecond();
     Register Reg = ArgInfo.Regs[0];
     unsigned ByteOffset = ArgInfo.ByteOffset;
     Register VReg = MRI.getLiveInVirtReg(Reg);
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
index 0a85af0f5a..62fa659b7c 100644
--- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
@@ -282,8 +282,7 @@ SmallVectorImpl<MCRegister> *SIMachineFunctionInfo::addPreloadedKernArg(
   return &ArgInfo.PreloadKernArgs[KernArgIdx].Regs;
 }
 
-bool SIMachineFunctionInfo::allocateUserSGPRs(
-    unsigned Number) {
+bool SIMachineFunctionInfo::allocateUserSGPRs(unsigned Number) {
   if (Number <= getNumUserSGPRs())
     return false;
 
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
index 64dc7e78a9..81b5b40e11 100644
--- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
@@ -844,17 +844,11 @@ public:
     return ImplicitArgPtr;
   }
 
-  bool hasWorkGroupSizeX() const {
-    return WorkGroupSizeX;
-  }
+  bool hasWorkGroupSizeX() const { return WorkGroupSizeX; }
 
-  bool hasWorkGroupSizeY() const {
-    return WorkGroupSizeY;
-  }
+  bool hasWorkGroupSizeY() const { return WorkGroupSizeY; }
 
-  bool hasWorkGroupSizeZ() const {
-    return WorkGroupSizeZ;
-  }
+  bool hasWorkGroupSizeZ() const { return WorkGroupSizeZ; }
 
   AMDGPUFunctionArgInfo &getArgInfo() {
     return ArgInfo;

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https://github.com/llvm/llvm-project/pull/83817