[llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)
Pierre van Houtryve via llvm-commits
llvm-commits at lists.llvm.org
Sun Mar 3 23:36:36 PST 2024
================
@@ -5286,6 +5286,141 @@ MachineInstr *CombinerHelper::buildSDivUsingMul(MachineInstr &MI) {
return MIB.buildMul(Ty, Res, Factor);
}
+bool CombinerHelper::matchSDivByPow2(MachineInstr &MI) {
+ assert(MI.getOpcode() == TargetOpcode::G_SDIV && "Expected SDIV");
+ if (MI.getFlag(MachineInstr::MIFlag::IsExact))
+ return false;
+ auto &SDiv = cast<GenericMachineInstr>(MI);
+ Register RHS = SDiv.getReg(2);
+ auto MatchPow2 = [&](const Constant *C) {
+ if (auto *CI = dyn_cast<ConstantInt>(C))
+ return CI->getValue().isPowerOf2() || CI->getValue().isNegatedPowerOf2();
+ return false;
+ };
+ return matchUnaryPredicate(MRI, RHS, MatchPow2, /* AllowUndefs= */ false);
+}
+
+void CombinerHelper::applySDivByPow2(MachineInstr &MI) {
+ assert(MI.getOpcode() == TargetOpcode::G_SDIV && "Expected SDIV");
+ auto &SDiv = cast<GenericMachineInstr>(MI);
+ Register Dst = SDiv.getReg(0);
+ Register LHS = SDiv.getReg(1);
+ Register RHS = SDiv.getReg(2);
+ LLT Ty = MRI.getType(Dst);
+ LLT ShiftAmtTy = getTargetLowering().getPreferredShiftAmountTy(Ty);
+
+ Builder.setInstrAndDebugLoc(MI);
+
+ unsigned Bitwidth = Ty.getScalarSizeInBits();
+ auto Zero = Builder.buildConstant(Ty, 0);
+
+ auto RHSC = getConstantOrConstantSplatVector(RHS);
+ if (RHSC.has_value()) {
----------------
Pierre-vh wrote:
```suggestion
if (auto RHSC = getConstantOrConstantSplatVector(RHS)) {
```
https://github.com/llvm/llvm-project/pull/83155
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