[llvm] [DAG] select (sext m), (add X, C), X --> (add X, (and C, (sext m)))) (PR #83640)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Sat Mar 2 22:50:16 PST 2024


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@@ -12070,6 +12070,17 @@ SDValue DAGCombiner::visitVSELECT(SDNode *N) {
   if (SDValue F = extractBooleanFlip(N0, DAG, TLI, false))
     return DAG.getSelect(DL, VT, F, N2, N1);
 
+  // select (sext m), (add X, C), X --> (add X, (and C, (sext m))))
+  if (N1.getOpcode() == ISD::ADD && N1.getOperand(0) == N2 && N1->hasOneUse() &&
+      DAG.isConstantIntBuildVectorOrConstantInt(N1.getOperand(1)) &&
+      N0.getScalarValueSizeInBits() == N1.getScalarValueSizeInBits() &&
+      TLI.getBooleanContents(N0.getValueType()) ==
+          TargetLowering::ZeroOrNegativeOneBooleanContent) {
----------------
topperc wrote:

The `N0.getScalarValueSizeInBits() == N1.getScalarValueSizeInBits()` check shouldn't be true for AVX512 since the mask won't be promoted.

https://github.com/llvm/llvm-project/pull/83640


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