[llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)

[Phoebe Wang via llvm-commits]

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@@ -0,0 +1,33 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-pc-linux-gnux32 -mattr=+ndd -verify-machineinstrs | FileCheck %s
+
+
+define i32 @add32mi(ptr nocapture noundef readonly %a, i32 noundef %b) {
+; CHECK-LABEL: add32mi:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl 1164(%edi,%esi,4), %eax
+; CHECK-NEXT:    addl $4660, %eax # imm = 0x1234
+; CHECK-NEXT:    retq
+entry:
+  %add.ptr = getelementptr inbounds i32, ptr %a, i32 %b
+  %add.ptr1 = getelementptr inbounds i8, ptr %add.ptr, i32 1164
+  %0 = load i32, ptr %add.ptr1, align 4
+  %add = add nsw i32 %0, 4660
+  ret i32 %add
+}
+
+declare ptr @llvm.thread.pointer()
+
+define i32 @add32mi_FS(i32 %i) {
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phoebewang wrote:

Add a test case without SIB?

https://github.com/llvm/llvm-project/pull/83578