[llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)

Phoebe Wang via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 1 18:25:08 PST 2024


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@@ -613,6 +613,87 @@ bool X86ExpandPseudo::expandMI(MachineBasicBlock &MBB,
   case X86::CALL64m_RVMARKER:
     expandCALL_RVMARKER(MBB, MBBI);
     return true;
+  case X86::ADD32mi_ND:
+  case X86::ADD64mi32_ND:
+  case X86::SUB32mi_ND:
+  case X86::SUB64mi32_ND:
+  case X86::AND32mi_ND:
+  case X86::AND64mi32_ND:
+  case X86::OR32mi_ND:
+  case X86::OR64mi32_ND:
+  case X86::XOR32mi_ND:
+  case X86::XOR64mi32_ND:
+  case X86::ADC32mi_ND:
+  case X86::ADC64mi32_ND:
+  case X86::SBB32mi_ND:
+  case X86::SBB64mi32_ND: {
----------------
phoebewang wrote:

They are not pseudo instructions. It looks strange to handle them here.

https://github.com/llvm/llvm-project/pull/83578


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