[llvm] 84927a6 - AMDGPU: Simplify instruction definitions for global_load_tr_b64(b128) (#83601)

via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 1 10:04:00 PST 2024


Author: Changpeng Fang
Date: 2024-03-01T10:03:54-08:00
New Revision: 84927a6728109ad01ee87b12f42f403756c0f2c3

URL: https://github.com/llvm/llvm-project/commit/84927a6728109ad01ee87b12f42f403756c0f2c3
DIFF: https://github.com/llvm/llvm-project/commit/84927a6728109ad01ee87b12f42f403756c0f2c3.diff

LOG: AMDGPU: Simplify instruction definitions for global_load_tr_b64(b128) (#83601)

WaveSizePredicate is copied from pseudo to real

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/FLATInstructions.td

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/FLATInstructions.td b/llvm/lib/Target/AMDGPU/FLATInstructions.td
index 87bd682611521c..f42d4ae416bd76 100644
--- a/llvm/lib/Target/AMDGPU/FLATInstructions.td
+++ b/llvm/lib/Target/AMDGPU/FLATInstructions.td
@@ -2746,12 +2746,12 @@ defm GLOBAL_ATOMIC_MIN_NUM_F32     : VGLOBAL_Real_Atomics_gfx12<0x051, "GLOBAL_A
 defm GLOBAL_ATOMIC_MAX_NUM_F32     : VGLOBAL_Real_Atomics_gfx12<0x052, "GLOBAL_ATOMIC_FMAX", "global_atomic_max_num_f32", true, "global_atomic_max_f32">;
 defm GLOBAL_ATOMIC_ADD_F32         : VGLOBAL_Real_Atomics_gfx12<0x056>;
 
-let WaveSizePredicate = isWave32, DecoderNamespace = "GFX12" in {
+let DecoderNamespace = "GFX12" in {
   defm GLOBAL_LOAD_TR_B128_w32     : VGLOBAL_Real_AllAddr_gfx12<0x057, "GLOBAL_LOAD_TR_B128_w32", "global_load_tr_b128">;
   defm GLOBAL_LOAD_TR_B64_w32      : VGLOBAL_Real_AllAddr_gfx12<0x058, "GLOBAL_LOAD_TR_B64_w32", "global_load_tr_b64">;
 }
 
-let WaveSizePredicate = isWave64, DecoderNamespace = "GFX12W64" in {
+let DecoderNamespace = "GFX12W64" in {
   defm GLOBAL_LOAD_TR_B128_w64     : VGLOBAL_Real_AllAddr_gfx12<0x057, "GLOBAL_LOAD_TR_B128_w64", "global_load_tr_b128">;
   defm GLOBAL_LOAD_TR_B64_w64      : VGLOBAL_Real_AllAddr_gfx12<0x058, "GLOBAL_LOAD_TR_B64_w64", "global_load_tr_b64">;
 }


        


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