[llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)

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``````````bash
git-clang-format --diff d1538c15f9c65a70f4650bd724972536f00f5094 83213d768beee1b3f2cc711885907f9423601332 -- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp llvm/utils/TableGen/AsmMatcherEmitter.cpp llvm/utils/TableGen/CodeGenTarget.cpp llvm/utils/TableGen/CodeGenTarget.h
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 0681509298..285f999125 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -6791,9 +6791,8 @@ bool ARMAsmParser::shouldOmitVectorPredicateOperand(
       // MQPR, to more accurately report errors when using Q registers
       // outside of the allowed range.
       if (static_cast<ARMOperand &>(*Operand).isVectorIndex() ||
-          (Operand->isReg() &&
-           (ARMMCRegisterClasses[ARM::QPRRegClassID].contains
-             Operand->getReg()))))
+          (Operand->isReg() && (ARMMCRegisterClasses[ARM::QPRRegClassID]
+                                    .contains Operand->getReg()))))
         return false;
     }
     return true;
diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
index 4eaf0adbb4..afadd25dcc 100644
--- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
@@ -628,7 +628,8 @@ struct MatchableInfo {
   void buildAliasResultOperands(bool AliasConstraintsAreChecked);
 
   /// shouldBeMatchedBefore - Compare two matchables for ordering.
-  bool shouldBeMatchedBefore(const MatchableInfo &RHS, const CodeGenTarget &Target) const {
+  bool shouldBeMatchedBefore(const MatchableInfo &RHS,
+                             const CodeGenTarget &Target) const {
     // The primary comparator is the instruction mnemonic.
     if (int Cmp = Mnemonic.compare_insensitive(RHS.Mnemonic))
       return Cmp == -1;
diff --git a/llvm/utils/TableGen/CodeGenTarget.h b/llvm/utils/TableGen/CodeGenTarget.h
index 7e2dd43cbf..36bebf0760 100644
--- a/llvm/utils/TableGen/CodeGenTarget.h
+++ b/llvm/utils/TableGen/CodeGenTarget.h
@@ -99,7 +99,7 @@ public:
   ///
   bool getAllowRegisterRenaming() const;
 
-  /// getPreferSmallerInstructions  - Return the PreferSmallerInstructions 
+  /// getPreferSmallerInstructions  - Return the PreferSmallerInstructions
   /// flag value for this target.
   ///
   bool getPreferSmallerInstructions() const;

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https://github.com/llvm/llvm-project/pull/83436