[llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)
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Fri Mar 1 07:11:54 PST 2024
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git-clang-format --diff 924ad198f52508ff19e7944d856ba1a2fca81961 a907956c6e9d431ede3c8730c084d9b23db6737d -- llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp llvm/lib/Target/X86/X86ExpandPseudo.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/X86/X86ExpandPseudo.cpp b/llvm/lib/Target/X86/X86ExpandPseudo.cpp
index 0eab64e2f3..e25c74707d 100644
--- a/llvm/lib/Target/X86/X86ExpandPseudo.cpp
+++ b/llvm/lib/Target/X86/X86ExpandPseudo.cpp
@@ -647,7 +647,8 @@ bool X86ExpandPseudo::expandMI(MachineBasicBlock &MBB,
Register Segment = MI.getOperand(MemOpNo + X86::AddrSegmentReg).getReg();
if (Segment == X86::NoRegister)
return false;
- const MachineOperand &ImmOp = MI.getOperand(MI.getNumExplicitOperands() - 1);
+ const MachineOperand &ImmOp =
+ MI.getOperand(MI.getNumExplicitOperands() - 1);
// If the immediate is a expr, conservatively estimate 4 bytes.
if (ImmOp.isImm() && isInt<8>(ImmOp.getImm()))
return false;
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https://github.com/llvm/llvm-project/pull/83578
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