[llvm] [CodeGen] Check entire block if no threshold was given for liveliness (PR #83526)

[via llvm-commits]

https://github.com/AtariDreams updated https://github.com/llvm/llvm-project/pull/83526

>From 5001c1fc06e72fb92b7821f437086a1de7a6b05c Mon Sep 17 00:00:00 2001
From: Rose <83477269+AtariDreams at users.noreply.github.com>
Date: Fri, 1 Mar 2024 00:19:21 -0500
Subject: [PATCH] [CodeGen] Check entire block if no threshold was given for
 liveliness

We could pass MBB.size(), but we should compute liveness the correct way if we have the entire block.
---
 llvm/include/llvm/CodeGen/MachineBasicBlock.h |  5 +++-
 llvm/lib/CodeGen/MachineBasicBlock.cpp        | 30 +++++++++++++++++--
 llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp |  6 ++--
 llvm/lib/Target/X86/X86FixupLEAs.cpp          |  4 +--
 4 files changed, 37 insertions(+), 8 deletions(-)

diff --git a/llvm/include/llvm/CodeGen/MachineBasicBlock.h b/llvm/include/llvm/CodeGen/MachineBasicBlock.h
index dc2035fa598c46..05fa92304cbfbb 100644
--- a/llvm/include/llvm/CodeGen/MachineBasicBlock.h
+++ b/llvm/include/llvm/CodeGen/MachineBasicBlock.h
@@ -1147,10 +1147,13 @@ class MachineBasicBlock
   /// after (searching just for defs) \p Before.
   ///
   /// \p Reg must be a physical register.
+  LivenessQueryResult computeRegisterLiveness(const TargetRegisterInfo *TRI,
+                                              MCRegister Reg,
+                                              const_iterator Before) const;
   LivenessQueryResult computeRegisterLiveness(const TargetRegisterInfo *TRI,
                                               MCRegister Reg,
                                               const_iterator Before,
-                                              unsigned Neighborhood = 10) const;
+                                              unsigned Neighborhood) const;
 
   // Debugging methods.
   void dump() const;
diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp
index 4410fb7ecd23b6..efddd27ab2ce6b 100644
--- a/llvm/lib/CodeGen/MachineBasicBlock.cpp
+++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp
@@ -1598,15 +1598,42 @@ MachineBasicBlock::getProbabilityIterator(MachineBasicBlock::succ_iterator I) {
   return Probs.begin() + index;
 }
 
+MachineBasicBlock::LivenessQueryResult
+MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI,
+                                           MCRegister Reg,
+                                           const_iterator Before) const {
+  LivePhysRegs UsedRegs(*TRI);
+  UsedRegs.addLiveOuts(*this);
+
+  const MachineFunction *MF = getParent();
+  const MCPhysReg *CSRegs = TRI->getCalleeSavedRegs(MF);
+  for (unsigned i = 0; CSRegs[i]; ++i)
+    UsedRegs.addReg(CSRegs[i]);
+
+  auto InstUpToBefore = end();
+
+  while (InstUpToBefore != Before)
+    // The pre-decrement is on purpose here.
+    // We want to have the liveness right before Before.
+    UsedRegs.stepBackward(*--InstUpToBefore);
+
+  if (UsedRegs.available(MF->getRegInfo(), Reg))
+    return LQR_Dead;
+
+  return LQR_Live;
+}
+
 /// Return whether (physical) register "Reg" has been <def>ined and not <kill>ed
 /// as of just before "MI".
 ///
 /// Search is localised to a neighborhood of
 /// Neighborhood instructions before (searching for defs or kills) and N
 /// instructions after (searching just for defs) MI.
+
 MachineBasicBlock::LivenessQueryResult
 MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI,
-                                           MCRegister Reg, const_iterator Before,
+                                           MCRegister Reg,
+                                           const_iterator Before,
                                            unsigned Neighborhood) const {
   unsigned N = Neighborhood;
 
@@ -1641,7 +1668,6 @@ MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI,
     return LQR_Dead;
   }
 
-
   N = Neighborhood;
 
   // Start by searching backwards from Before, looking for kills, reads or defs.
diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
index 6121055eb02176..1f5fbf178e51c0 100644
--- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -635,9 +635,9 @@ MachineInstr *ARMLoadStoreOpt::CreateLoadStoreMulti(
 
   // For Thumb1 targets, it might be necessary to clobber the CPSR to merge.
   // Compute liveness information for that register to make the decision.
-  bool SafeToClobberCPSR = !isThumb1 ||
-    (MBB.computeRegisterLiveness(TRI, ARM::CPSR, InsertBefore, 20) ==
-     MachineBasicBlock::LQR_Dead);
+  bool SafeToClobberCPSR =
+      !isThumb1 || (MBB.computeRegisterLiveness(TRI, ARM::CPSR, InsertBefore) ==
+                    MachineBasicBlock::LQR_Dead);
 
   bool Writeback = isThumb1; // Thumb1 LDM/STM have base reg writeback.
 
diff --git a/llvm/lib/Target/X86/X86FixupLEAs.cpp b/llvm/lib/Target/X86/X86FixupLEAs.cpp
index beeebf42dfe81a..446754a6815f8d 100644
--- a/llvm/lib/Target/X86/X86FixupLEAs.cpp
+++ b/llvm/lib/Target/X86/X86FixupLEAs.cpp
@@ -698,7 +698,7 @@ void FixupLEAPass::processInstructionForSlowLEA(MachineBasicBlock::iterator &I,
   const MachineOperand &Segment = MI.getOperand(1 + X86::AddrSegmentReg);
 
   if (Segment.getReg() != 0 || !Offset.isImm() ||
-      MBB.computeRegisterLiveness(TRI, X86::EFLAGS, I, 4) !=
+      MBB.computeRegisterLiveness(TRI, X86::EFLAGS, I) !=
           MachineBasicBlock::LQR_Dead)
     return;
   const Register DstR = Dst.getReg();
@@ -750,7 +750,7 @@ void FixupLEAPass::processInstrForSlow3OpLEA(MachineBasicBlock::iterator &I,
   const MachineOperand &Segment = MI.getOperand(1 + X86::AddrSegmentReg);
 
   if (!(TII->isThreeOperandsLEA(MI) || hasInefficientLEABaseReg(Base, Index)) ||
-      MBB.computeRegisterLiveness(TRI, X86::EFLAGS, I, 4) !=
+      MBB.computeRegisterLiveness(TRI, X86::EFLAGS, I) !=
           MachineBasicBlock::LQR_Dead ||
       Segment.getReg() != X86::NoRegister)
     return;