[llvm] Add support for x87 registers on GISel register selection (PR #83528)

[via llvm-commits]

MalaySanghiIntel wrote:

> Does GISel have support for the stackifier?

The stackifier is an independent post RA pass. It is enabled on the GISel path as weel. However, it doesn't work as expected today and many x87 programs fail at instruction selection in GISel.

I'm not sure what you mean by support here - stackifier is pattern based i.e. it requires the opcodes from `OpcodeTable` in the IR. On the GISel path, these instructions are not yet generated (and it is WIP). The current PR is the first step. I plan to have follow up changes which will improve the porting of patterns from DAG to GISel. That will enable us to get instructions like `LD_Fp32m` and we'll be able to evaluate stackifier status better.

https://github.com/llvm/llvm-project/pull/83528