[llvm] [RISCV][NFC] Allow SchedVar to be a def inside our scheduler model files. (PR #82634)

[Wang Pengcheng via llvm-commits]

wangpc-pp wrote:

> > Yeah, this is a problem. I may make TableGen able to refer to other definitions in a multiclass:
> > ```
> > multiclass Test {
> >   def a;
> >   def b: B<a>; // For `a`, we will search `NAME # a` first and then `a`.
> > }
> > ```
> > 
> > 
> >     
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> >       
> >     
> > 
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> >   
> > (Hopefully this can be easy to design and implement)
> 
> This would be very nice. It is quite ugly to have to use `!cast` everywhere for defs. Some careful though will need to be given to what happens when there is a record `a` and when there is a different record `NAME # a` -- we would need a way to refer to both. Please include me on the review if you do this work :)

I have tried it, it may be hard to implement based on my rough investigation. In short, the TableGen parser resolves Record after resolving variables/arguements. I need more time to think about it.

https://github.com/llvm/llvm-project/pull/82634