[llvm] [RISC-V] Fix crash with late stack realignment requirement (PR #83496)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 29 17:16:37 PST 2024
topperc wrote:
> Another possible solution would be to change the alignment requirement for `GPRPair` to 32. Perhaps this would need to only be done when the E extension is enabled, so maybe it would require a separate register class. In any case, thought I'd propose these suggestions and we can converge on some solution to this problem.
It should have an alignment of 32, but then we have potential issue spilling a GPRPair. We need to be able to calculate the address of the second half of the spill slot without needing a temporary register. By having the entire spill slot aligned to 8, we guarantee that we can fold +4 into the load/store address in `RISCVExpandPseudo::expandRV32ZdinxStore` and `RISCVExpandPseudo::expandRV32ZdinxLoad`. Maybe there's a better way to solve that?
https://github.com/llvm/llvm-project/pull/83496
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