[llvm] [Hexagon] Use the correct call to detect debug instructions (PR #83373)
Sumanth Gundapaneni via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 28 20:03:17 PST 2024
https://github.com/sgundapa created https://github.com/llvm/llvm-project/pull/83373
None
>From 07c6d53ec2542da6447fde802227afc850a7c5b0 Mon Sep 17 00:00:00 2001
From: Sumanth Gundapaneni <sgundapa at quicinc.com>
Date: Wed, 28 Feb 2024 20:01:55 -0800
Subject: [PATCH] [Hexagon] Use the correct call to detect debug instructions
---
llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp | 2 +-
llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp b/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
index 3b8234c0118435..4c18e076c43936 100644
--- a/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
@@ -1002,7 +1002,7 @@ namespace {
bool DeadCodeElimination::isDead(unsigned R) const {
for (const MachineOperand &MO : MRI.use_operands(R)) {
const MachineInstr *UseI = MO.getParent();
- if (UseI->isDebugValue())
+ if (UseI->isDebugInstr())
continue;
if (UseI->isPHI()) {
assert(!UseI->getOperand(0).getSubReg());
diff --git a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
index e38c8bacaf2bab..56472d633694ae 100644
--- a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
@@ -1180,7 +1180,7 @@ void HexagonPacketizerList::unpacketizeSoloInstrs(MachineFunction &MF) {
bool InsertBeforeBundle;
if (MI.isInlineAsm())
InsertBeforeBundle = !hasWriteToReadDep(MI, *BundleIt, HRI);
- else if (MI.isDebugValue())
+ else if (MI.isDebugInstr())
InsertBeforeBundle = true;
else
continue;
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