[llvm] [AArch64] Re-enable rematerialization for streaming-mode-changing functions. (PR #83235)
Paul Walker via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 28 10:04:16 PST 2024
================
@@ -9494,40 +9494,12 @@ bool AArch64InstrInfo::isReallyTriviallyReMaterializable(
// Avoid rematerializing rematerializable instructions that use/define
// scalable values, such as 'pfalse' or 'ptrue', which result in different
// results when the runtime vector length is different.
- const MachineRegisterInfo &MRI = MF.getRegInfo();
const MachineFrameInfo &MFI = MF.getFrameInfo();
- if (any_of(MI.operands(), [&MRI, &MFI](const MachineOperand &MO) {
- if (MO.isFI() &&
- MFI.getStackID(MO.getIndex()) == TargetStackID::ScalableVector)
- return true;
- if (!MO.isReg())
- return false;
-
- if (MO.getReg().isVirtual()) {
- const TargetRegisterClass *RC = MRI.getRegClass(MO.getReg());
- return AArch64::ZPRRegClass.hasSubClassEq(RC) ||
- AArch64::PPRRegClass.hasSubClassEq(RC);
- }
- return AArch64::ZPRRegClass.contains(MO.getReg()) ||
- AArch64::PPRRegClass.contains(MO.getReg());
+ if (any_of(MI.operands(), [&MFI](const MachineOperand &MO) {
+ return MO.isFI() &&
+ MFI.getStackID(MO.getIndex()) == TargetStackID::ScalableVector;
----------------
paulwalker-arm wrote:
Can you provide an example of a rematerialisable instruction that doesn't say it uses `VG` but has a scalable vector frame index. I'm not saying there isn't one [1] but I'm wondering if there are specific cases that can be handled rather than having to walk every instructions operands.
[1] Perhaps `COPY FI:op`?
https://github.com/llvm/llvm-project/pull/83235
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