[llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)

Jiahan Xie via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 28 09:50:13 PST 2024


================
@@ -1240,7 +1240,7 @@ void MachineMemOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
        << "unknown-address";
   }
   MachineOperand::printOperandOffset(OS, getOffset());
-  if (getSize() > 0 && getAlign() != getSize())
+  if (getType().getElementCount().getKnownMinValue() > 0 && getAlign() != getType().getElementCount().getKnownMinValue())
----------------
jiahanxie353 wrote:

> `getSize()` checks `isValid()` so it probably makes sense to change my suggestion to

Yes totally! Actuall I was just trying to push up to use GitHub actions to check because for some reason when I tried to test the [test_g_load.mir](https://github.com/llvm/llvm-project/blob/main/llvm/test/MachineVerifier/test_g_load.mir) file locally, I got errors like:
```C
*** Bad machine code: atomic load cannot use release ordering ***
- function:    test_load
- basic block: %bb.0  (0x560485132100)
- instruction: %5:_(s32) = G_LOAD %2:_(p0) :: (load acq_rel (s32))
LLVM ERROR: Found 5 machine code errors.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
```
But GitHub action is no longer reporting that so I'm a bit confused.

The command I used in the terminal is to first change my build to: `-DLLVM_TARGETS_TO_BUILD="RISCV;AArch64;ARM"; and then I used `./build-llc/bin/llc  -mtriple=arm64 -run-pass=none -verify-machineinstrs llvm/test/MachineVerifier/test_g_load.mir` to test this file.

https://github.com/llvm/llvm-project/pull/80006


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