[llvm] [Xtensa] Implement base CallConvention. (PR #83280)

[Sergei Barannikov via llvm-commits]

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@@ -57,10 +58,47 @@ BitVector XtensaRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
   return Reserved;
 }
 
+bool XtensaRegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
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s-barannikov wrote:

Why don't just inline it?

https://github.com/llvm/llvm-project/pull/83280