[llvm] 6287b7b - [X86] combineEXTRACT_SUBVECTOR - extract 256-bit comparisons if only one subvector is required
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 28 04:25:02 PST 2024
Author: Simon Pilgrim
Date: 2024-02-28T12:24:34Z
New Revision: 6287b7b9e9b729afde4aef7d41609d9b4efaecda
URL: https://github.com/llvm/llvm-project/commit/6287b7b9e9b729afde4aef7d41609d9b4efaecda
DIFF: https://github.com/llvm/llvm-project/commit/6287b7b9e9b729afde4aef7d41609d9b4efaecda.diff
LOG: [X86] combineEXTRACT_SUBVECTOR - extract 256-bit comparisons if only one subvector is required
If only one subvector extraction will be necessary (i.e. because the other is constant etc.) then extract the source operands and perform as a 128-bit comparison
Ideally DAGCombiner's narrowExtractedVectorBinOp would handle this but its tricky to confirm when a target opcode can be safely extracted and performed as a different vector type
Partially improves an outstanding regression in #82290
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/kshift.ll
llvm/test/CodeGen/X86/pr46455.ll
llvm/test/CodeGen/X86/setcc-lowering.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 0722c402348ee0..bec13d1c00ef7d 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -55789,6 +55789,15 @@ static SDValue combineEXTRACT_SUBVECTOR(SDNode *N, SelectionDAG &DAG,
}
}
+ auto IsExtractFree = [](SDValue V) {
+ V = peekThroughBitcasts(V);
+ if (ISD::isBuildVectorOfConstantSDNodes(V.getNode()))
+ return true;
+ if (ISD::isBuildVectorOfConstantFPSDNodes(V.getNode()))
+ return true;
+ return V.isUndef();
+ };
+
// If we're extracting the lowest subvector and we're the only user,
// we may be able to perform this with a smaller vector width.
unsigned InOpcode = InVec.getOpcode();
@@ -55830,14 +55839,27 @@ static SDValue combineEXTRACT_SUBVECTOR(SDNode *N, SelectionDAG &DAG,
return DAG.getNode(InOpcode, DL, VT, Ext0, Ext1, Ext2);
}
if (IdxVal == 0 && InOpcode == ISD::TRUNCATE && Subtarget.hasVLX() &&
- (VT.is128BitVector() || VT.is256BitVector())) {
+ (SizeInBits == 128 || SizeInBits == 256)) {
SDValue InVecSrc = InVec.getOperand(0);
unsigned Scale = InVecSrc.getValueSizeInBits() / InSizeInBits;
SDValue Ext = extractSubVector(InVecSrc, 0, DAG, DL, Scale * SizeInBits);
return DAG.getNode(InOpcode, DL, VT, Ext);
}
+ if ((InOpcode == X86ISD::CMPP || InOpcode == X86ISD::PCMPEQ ||
+ InOpcode == X86ISD::PCMPGT) &&
+ (IsExtractFree(InVec.getOperand(0)) ||
+ IsExtractFree(InVec.getOperand(1))) &&
+ SizeInBits == 128) {
+ SDValue Ext0 =
+ extractSubVector(InVec.getOperand(0), IdxVal, DAG, DL, SizeInBits);
+ SDValue Ext1 =
+ extractSubVector(InVec.getOperand(1), IdxVal, DAG, DL, SizeInBits);
+ if (InOpcode == X86ISD::CMPP)
+ return DAG.getNode(InOpcode, DL, VT, Ext0, Ext1, InVec.getOperand(2));
+ return DAG.getNode(InOpcode, DL, VT, Ext0, Ext1);
+ }
if (InOpcode == X86ISD::MOVDDUP &&
- (VT.is128BitVector() || VT.is256BitVector())) {
+ (SizeInBits == 128 || SizeInBits == 256)) {
SDValue Ext0 =
extractSubVector(InVec.getOperand(0), IdxVal, DAG, DL, SizeInBits);
return DAG.getNode(InOpcode, DL, VT, Ext0);
diff --git a/llvm/test/CodeGen/X86/kshift.ll b/llvm/test/CodeGen/X86/kshift.ll
index 0acf82f5a144a2..f4efacc1946cff 100644
--- a/llvm/test/CodeGen/X86/kshift.ll
+++ b/llvm/test/CodeGen/X86/kshift.ll
@@ -270,11 +270,10 @@ define i64 @kshiftl_v64i1_63(<64 x i8> %x, <64 x i8> %y) {
; KNL-NEXT: vpcmpeqb %xmm2, %xmm0, %xmm0
; KNL-NEXT: vpmovsxbd %xmm0, %zmm0
; KNL-NEXT: vptestmd %zmm0, %zmm0, %k0
-; KNL-NEXT: vpxor %xmm0, %xmm0, %xmm0
; KNL-NEXT: kshiftlw $15, %k0, %k1
-; KNL-NEXT: vextracti64x4 $1, %zmm1, %ymm1
-; KNL-NEXT: vpcmpeqb %ymm0, %ymm1, %ymm0
+; KNL-NEXT: vextracti64x4 $1, %zmm1, %ymm0
; KNL-NEXT: vextracti128 $1, %ymm0, %xmm0
+; KNL-NEXT: vpcmpeqb %xmm2, %xmm0, %xmm0
; KNL-NEXT: vpmovsxbd %xmm0, %zmm0
; KNL-NEXT: vptestmd %zmm0, %zmm0, %k0 {%k1}
; KNL-NEXT: kmovw %k0, %eax
@@ -564,14 +563,13 @@ define i64 @kshiftr_v64i1_63(<64 x i8> %x, <64 x i8> %y) {
; KNL-LABEL: kshiftr_v64i1_63:
; KNL: # %bb.0:
; KNL-NEXT: vextracti64x4 $1, %zmm0, %ymm0
-; KNL-NEXT: vpxor %xmm2, %xmm2, %xmm2
-; KNL-NEXT: vpcmpeqb %ymm2, %ymm0, %ymm0
; KNL-NEXT: vextracti128 $1, %ymm0, %xmm0
+; KNL-NEXT: vpxor %xmm2, %xmm2, %xmm2
+; KNL-NEXT: vpcmpeqb %xmm2, %xmm0, %xmm0
; KNL-NEXT: vpmovsxbd %xmm0, %zmm0
; KNL-NEXT: vptestmd %zmm0, %zmm0, %k0
; KNL-NEXT: kshiftrw $15, %k0, %k1
-; KNL-NEXT: vpxor %xmm0, %xmm0, %xmm0
-; KNL-NEXT: vpcmpeqb %xmm0, %xmm1, %xmm0
+; KNL-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm0
; KNL-NEXT: vpmovsxbd %xmm0, %zmm0
; KNL-NEXT: vptestmd %zmm0, %zmm0, %k0 {%k1}
; KNL-NEXT: kmovw %k0, %eax
diff --git a/llvm/test/CodeGen/X86/pr46455.ll b/llvm/test/CodeGen/X86/pr46455.ll
index 092e417c812e78..3d1b04f7435713 100644
--- a/llvm/test/CodeGen/X86/pr46455.ll
+++ b/llvm/test/CodeGen/X86/pr46455.ll
@@ -4,10 +4,10 @@
define void @EntryModule(ptr %buffer_table) {
; CHECK-LABEL: EntryModule:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movq 24(%rdi), %rcx
-; CHECK-NEXT: vcmpneqps (%rax), %ymm0, %ymm0
+; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
+; CHECK-NEXT: vcmpneqps (%rax), %xmm0, %xmm0
; CHECK-NEXT: vpsrld $31, %xmm0, %xmm1
; CHECK-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[1,1,1,1]
; CHECK-NEXT: vpshufd {{.*#+}} xmm3 = xmm1[2,3,2,3]
@@ -16,7 +16,6 @@ define void @EntryModule(ptr %buffer_table) {
; CHECK-NEXT: vpsubd %xmm0, %xmm2, %xmm0
; CHECK-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; CHECK-NEXT: vmovd %xmm0, (%rcx)
-; CHECK-NEXT: vzeroupper
; CHECK-NEXT: retq
entry:
%i1 = load ptr, ptr %buffer_table, align 8
diff --git a/llvm/test/CodeGen/X86/setcc-lowering.ll b/llvm/test/CodeGen/X86/setcc-lowering.ll
index 6636d6948b1096..90e5c279d2e17c 100644
--- a/llvm/test/CodeGen/X86/setcc-lowering.ll
+++ b/llvm/test/CodeGen/X86/setcc-lowering.ll
@@ -21,11 +21,11 @@ define <8 x i16> @pr25080(<8 x i32> %a) {
;
; AVX2-LABEL: pr25080:
; AVX2: # %bb.0: # %entry
-; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm1 = [8388607,8388607,8388607,8388607,8388607,8388607,8388607,8388607]
-; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
-; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT: vpcmpeqd %ymm1, %ymm0, %ymm0
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388607,8388607,8388607,8388607]
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0
+; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpackssdw %xmm0, %xmm0, %xmm0
; AVX2-NEXT: vpor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; AVX2-NEXT: vzeroupper
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