[llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)

[Paul Walker via llvm-commits]

================
@@ -269,13 +269,15 @@ static bool isMergePassthruOpcode(unsigned Opc) {
 
 // Returns true if inactive lanes are known to be zeroed by construction.
 static bool isZeroingInactiveLanes(SDValue Op) {
+  // Skip bitcasts nodes
+  while (Op->getOpcode() == ISD::BITCAST)
+    Op = Op->getOperand(0);
+    
----------------
paulwalker-arm wrote:

I think if we do have such cases (e.g. `nxv2i8` -> `nxv16i1`) then the chances are we cannot guarantee the "invisible" bits will be zero so it would be bogus to look through them anyway.

https://github.com/llvm/llvm-project/pull/83001