[llvm] [X86][GlobalISel] Enable G_SDIV/G_UDIV/G_SREM/G_UREM (PR #81615)

[Matt Arsenault via llvm-commits]

arsenm wrote:

> @topperc maybe we can add a subreg-superreg check to `MachineVerifier`?

Not really, the operation is more fundamentally broken. It is promising something about bits in registers which are not represented in the instruction 

https://github.com/llvm/llvm-project/pull/81615