[llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)

[Michael Maitland via llvm-commits]

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@@ -1240,7 +1240,7 @@ void MachineMemOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
        << "unknown-address";
   }
   MachineOperand::printOperandOffset(OS, getOffset());
-  if (getSize() > 0 && getAlign() != getSize())
+  if (getType().getElementCount().getKnownMinValue() > 0 && getAlign() != getType().getElementCount().getKnownMinValue())
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michaelmaitland wrote:

```suggestion
unsigned MinSize = getType().getSizeInBytes().getKnownMinValue();
if (MinSize  > 0 && getAlign() != MinSize)
```
I think this should solve a large chunk of the test failures. The old code is saying `if (the size of the memory reference is not equal to the alignment)`. 

The code you have here is saying `if (the minimum number of elements is not equal to the alignment)`.

However, we probably need to account for the size of the element as well. The tricky part here is that we only know the minimum size of the memory reference. In the case that the MinSize is not equal to the alignment, it can't hurt to emit an explicit align value.

https://github.com/llvm/llvm-project/pull/80006