[llvm] [RISCV] Use a tail agnostic vslideup if possible for scalable insert_subvector (PR #83146)
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 27 07:51:31 PST 2024
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@@ -376,9 +376,9 @@ define <vscale x 4 x half> @vector_interleave_nxv4f16_nxv2f16(<vscale x 2 x half
; CHECK-NEXT: vsetvli a1, zero, e16, m1, ta, ma
; CHECK-NEXT: vslidedown.vx v8, v10, a0
; CHECK-NEXT: add a1, a0, a0
-; CHECK-NEXT: vsetvli zero, a1, e16, m1, tu, ma
+; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
; CHECK-NEXT: vslideup.vx v10, v8, a0
-; CHECK-NEXT: vmv1r.v v8, v10
+; CHECK-NEXT: vmv.v.v v8, v10
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lukel97 wrote:
I'm not sure why using the ta policy causes us to lose the vm1r.v here.
Also a1 is VLMAX, perhaps RISCVInsertVSETVLI could detect this and emit the `vsetvli a0, zero` form
https://github.com/llvm/llvm-project/pull/83146
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