[llvm] [Mips] Fix missing sign extension in expansion of sub-word atomic max (PR #77072)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 26 22:53:26 PST 2024
================
@@ -980,6 +1049,55 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MMR6-NEXT: sync
; MMR6-NEXT: addiu $sp, $sp, 8
; MMR6-NEXT: jrc $ra
+;
+; MIPS32-LABEL: test_max_16:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $sp, $sp, -8
+; MIPS32-NEXT: .cfi_def_cfa_offset 8
+; MIPS32-NEXT: # kill: def $at killed $a1
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $1, $zero, -4
+; MIPS32-NEXT: and $6, $4, $1
+; MIPS32-NEXT: andi $1, $4, 3
+; MIPS32-NEXT: sll $10, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 65535
+; MIPS32-NEXT: sllv $8, $1, $10
+; MIPS32-NEXT: nor $9, $zero, $8
+; MIPS32-NEXT: sllv $7, $5, $10
+; MIPS32-NEXT: $BB4_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($6)
+; MIPS32-NEXT: and $2, $2, $8
----------------
topperc wrote:
Are these `and` instructions needed? The srav will move the 16 bit chunk to the LSBs, then the sll+sra pair will fill the upper 16 bits with the sign of the lower 16 bits. Doesn't seem like anything needs ANDed before hand.
https://github.com/llvm/llvm-project/pull/77072
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