[llvm] [X86][MC] Teach disassembler to recognize apx instructions which ignores W bit (PR #82747)

[via llvm-commits]

================
@@ -967,6 +967,7 @@ class ITy<bits<8> o, Format f, X86TypeInfo t, dag outs, dag ins, string m,
       !strconcat(m, "{", t.InstrSuffix, "}\t", args), p>, NoCD8 {
   let hasSideEffects = 0;
   let hasREX_W  = t.HasREX_W;
+  let IgnoresW = !if(!eq(t.VT, i8), 1, 0);
----------------
XinWang10 wrote:

It's ok for REX2.W, 'IGNORED' REX2 instructions would point to the same record whether they have W or not when decoding, these has been handled in current compiler in llvm/utils/TableGen/X86DisassemblerTables.cpp line 100.
`  case IC_64BIT:
    return (inheritsFrom(child, IC_64BIT_REXW) ||`

https://github.com/llvm/llvm-project/pull/82747