[llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)
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Mon Feb 26 08:33:33 PST 2024
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@@ -276,6 +276,7 @@ static bool isZeroingInactiveLanes(SDValue Op) {
if (ISD::isConstantSplatVectorAllOnes(Op.getNode()))
return true;
return false;
+ case ISD::SPLAT_VECTOR:
----------------
Lukacma wrote:
Yes. I didn't quite understood the purpose of that line as well, but just in case I missed smth I left it there. Maybe it was written before splat_vector was implemented using `WHILELO` instruction, so you couldn't just assume the other lanes would be zeroed. I will remove it and rewrite my current fix to handle bitcast chain before splat_vector.
https://github.com/llvm/llvm-project/pull/83001
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