[llvm] Missing AArch64ISD::BICi handling (PR #76644)

[David Green via llvm-commits]

davemgreen wrote:

> Ideally we need to separate the ISD::AVG knownbits handling into a followup patch - @davemgreen can you suggest any simpler tests that will create BICi nodes that the target node KnownBits handling could show?

I'm not sure. Considering where they are created it will be common for simple cases to already be optimized. Maybe they could be added to llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp?

I agree it would be good if there were separate prs for the BIC vs RADD parts.

https://github.com/llvm/llvm-project/pull/76644