[llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function to free up a bit slot (PR #82787)

[Pierre van Houtryve via llvm-commits]

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@@ -9115,14 +9115,82 @@ bool SIInstrInfo::isAsmOnlyOpcode(int MCOp) const {
   }
 }
 
+bool SIInstrInfo::isRenamedInGFX9(int Opcode) const {
+  switch (Opcode) {
+  case AMDGPU::V_ADDC_U32_dpp:
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Pierre-vh wrote:

tiny nit: you could eventually use a small macro to generate all cases with the dpp/e32/e64/etc. prefixes. It'd make the table a bit easier to navigate.

also this function can be static

https://github.com/llvm/llvm-project/pull/82787