[llvm] [AArch64][GlobalISel] Legalize Insert vector element (PR #81453)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 26 02:58:53 PST 2024
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@@ -2972,7 +2972,22 @@ bool IRTranslator::translateInsertElement(const User &U,
Register Res = getOrCreateVReg(U);
Register Val = getOrCreateVReg(*U.getOperand(0));
Register Elt = getOrCreateVReg(*U.getOperand(1));
- Register Idx = getOrCreateVReg(*U.getOperand(2));
+ const auto &TLI = *MF->getSubtarget().getTargetLowering();
+ unsigned PreferredVecIdxWidth = TLI.getVectorIdxTy(*DL).getSizeInBits();
+ Register Idx;
+ if (auto *CI = dyn_cast<ConstantInt>(U.getOperand(2))) {
+ if (CI->getBitWidth() != PreferredVecIdxWidth) {
+ APInt NewIdx = CI->getValue().zextOrTrunc(PreferredVecIdxWidth);
+ auto *NewIdxCI = ConstantInt::get(CI->getContext(), NewIdx);
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arsenm wrote:
I would expect the IRTranslator to pass through the original IR type, and let the legalizer do this casting
https://github.com/llvm/llvm-project/pull/81453
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