[llvm] [Mips] Fix missing sign extension in expansion of sub-word atomic max (PR #77072)

[via llvm-commits]

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@@ -467,8 +481,34 @@ bool MipsExpandPseudo::expandAtomicBinOpSubword(
           .addReg(OldVal)
           .addReg(Mask);
       BuildMI(loopMBB, DL, TII->get(Mips::AND), Incr).addReg(Incr).addReg(Mask);
-    }
 
+      if (!IsUnsigned) {
+        BuildMI(loopMBB, DL, TII->get(Mips::SRAV), OldVal)
+            .addReg(OldVal)
+            .addReg(ShiftAmnt);
+        BuildMI(loopMBB, DL, TII->get(Mips::SRAV), Incr)
+            .addReg(Incr)
+            .addReg(ShiftAmnt);
+        if (STI->hasMips32r2()) {
+          BuildMI(loopMBB, DL, TII->get(SEOp), OldVal).addReg(OldVal);
+          BuildMI(loopMBB, DL, TII->get(SEOp), Incr).addReg(Incr);
+        } else {
+          const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24;
+          BuildMI(loopMBB, DL, TII->get(Mips::SLL), OldVal)
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yingopq wrote:

I would add test `-mcpu=mips` in llvm/test/CodeGen/Mips/atomic-min-max.ll to cover `else` branch code.

https://github.com/llvm/llvm-project/pull/77072