[llvm] [ARM] Resolve FIXME: Transform "(and (shl x, c2) c1)" into "(shl (and x, c1>>c2), c2)" (PR #82120)
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Sat Feb 17 09:50:21 PST 2024
https://github.com/AtariDreams updated https://github.com/llvm/llvm-project/pull/82120
>From 59491ff0a4fb540a4a4ec65153d7acfdcaf4222f Mon Sep 17 00:00:00 2001
From: Rose <83477269+AtariDreams at users.noreply.github.com>
Date: Sat, 17 Feb 2024 11:38:21 -0500
Subject: [PATCH] [ARM] Resolve FIXME: Transform "(and (shl x, c2) c1)" into
"(shl (and x, c1>>c2), c2)"
Transform "(and (shl x, c2) c1)" into "(shl (and x, c1>>c2), c2)" if "c1 >> c2" is a cheaper immediate than "c1" using HasLowerConstantMaterializationCost.
---
llvm/lib/Target/ARM/ARMISelLowering.cpp | 13 ++++++++++---
llvm/test/CodeGen/Thumb/shift-and.ll | 14 ++++----------
2 files changed, 14 insertions(+), 13 deletions(-)
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index b98006ed0cb3f4..4d92add3738e29 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -14388,9 +14388,16 @@ static SDValue CombineANDShift(SDNode *N,
}
}
- // FIXME: Transform "(and (shl x, c2) c1)" ->
- // "(shl (and x, c1>>c2), c2)" if "c1 >> c2" is a cheaper immediate than
- // c1.
+ // Transform "(and (shl x, c2) c1)" into "(shl (and x, c1>>c2), c2)"
+ // if "c1 >> c2" is a cheaper immediate than "c1"
+ if (HasLowerConstantMaterializationCost(C1 >> C2, C1, Subtarget)) {
+
+ SDValue And = DAG.getNode(ISD::AND, DL, MVT::i32, N0->getOperand(0),
+ DAG.getConstant(C1 >> C2, DL, MVT::i32));
+ return DAG.getNode(ISD::SHL, DL, MVT::i32, And,
+ DAG.getConstant(C2, DL, MVT::i32));
+ }
+
return SDValue();
}
diff --git a/llvm/test/CodeGen/Thumb/shift-and.ll b/llvm/test/CodeGen/Thumb/shift-and.ll
index e5fee86343b0ed..5b586d2ad875fe 100644
--- a/llvm/test/CodeGen/Thumb/shift-and.ll
+++ b/llvm/test/CodeGen/Thumb/shift-and.ll
@@ -16,14 +16,9 @@ entry:
define i32 @test2(i32 %x) {
; CHECK-LABEL: test2:
; CHECK: @ %bb.0: @ %entry
-; CHECK-NEXT: lsrs r1, r0, #2
-; CHECK-NEXT: ldr r0, .LCPI1_0
-; CHECK-NEXT: ands r0, r1
+; CHECK-NEXT: uxtb r0, r0
+; CHECK-NEXT: lsls r0, r0, #2
; CHECK-NEXT: bx lr
-; CHECK-NEXT: .p2align 2
-; CHECK-NEXT: @ %bb.1:
-; CHECK-NEXT: .LCPI1_0:
-; CHECK-NEXT: .long 1022 @ 0x3fe
entry:
%0 = lshr i32 %x, 2
%shr = and i32 %0, 1022
@@ -70,9 +65,8 @@ define i32 @test6(i32 %x) {
; CHECK-LABEL: test6:
; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: movs r1, #5
-; CHECK-NEXT: lsls r1, r1, #29
-; CHECK-NEXT: lsls r0, r0, #29
-; CHECK-NEXT: ands r0, r1
+; CHECK-NEXT: ands r1, r0
+; CHECK-NEXT: lsls r0, r1, #29
; CHECK-NEXT: bx lr
entry:
%0 = shl i32 %x, 29
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