[llvm] [AMDGPU] fixes duplicate expressions in if stmnts in SIISelLowering.cpp (PR #82018)
Nick Anderson via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 16 10:24:59 PST 2024
https://github.com/nickleus27 created https://github.com/llvm/llvm-project/pull/82018
fixes #81766
>From 8492e37612a21f65345ad6380dad76ed05235c00 Mon Sep 17 00:00:00 2001
From: Nick Anderson <nickleus27 at gmail.com>
Date: Fri, 16 Feb 2024 10:22:40 -0800
Subject: [PATCH] [AMDGPU] fixes duplicate expressions in if stmnts in
SIISelLowering.cpp
---
llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 7be670f8e76c37..5e1d7508503741 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -6306,7 +6306,7 @@ SDValue SITargetLowering::lowerFMINNUM_FMAXNUM(SDValue Op,
return expandFMINNUM_FMAXNUM(Op.getNode(), DAG);
if (VT == MVT::v4f16 || VT == MVT::v8f16 || VT == MVT::v16f16 ||
- VT == MVT::v16f16)
+ VT == MVT::v32f16)
return splitBinaryVectorOp(Op, DAG);
return Op;
}
@@ -14571,7 +14571,7 @@ SDValue SITargetLowering::PerformDAGCombine(SDNode *N,
EVT VT = N->getValueType(0);
// v2i16 (scalar_to_vector i16:x) -> v2i16 (bitcast (any_extend i16:x))
- if (VT == MVT::v2i16 || VT == MVT::v2f16 || VT == MVT::v2f16) {
+ if (VT == MVT::v2i16 || VT == MVT::v2f16 || VT == MVT::v2bf16) {
SDLoc SL(N);
SDValue Src = N->getOperand(0);
EVT EltVT = Src.getValueType();
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