[llvm] [RISCV] Recognize CSR name ssp for Zicfilp. (PR #81974)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-mc

@llvm/pr-subscribers-backend-risc-v

Author: Yeting Kuo (yetingk)

<details>
<summary>Changes</summary>

The CSR address of `ssp` is 0x011.
Ref: https://github.com/riscv/riscv-cfi/blob/main/cfi_backward.adoc#shadow-stack-pointer-ssp

---
Full diff: https://github.com/llvm/llvm-project/pull/81974.diff


2 Files Affected:

- (modified) llvm/lib/Target/RISCV/RISCVSystemOperands.td (+5) 
- (modified) llvm/test/MC/RISCV/user-csr-names.s (+14) 


``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVSystemOperands.td b/llvm/lib/Target/RISCV/RISCVSystemOperands.td
index f046312b1d4284..79f977e5b32266 100644
--- a/llvm/lib/Target/RISCV/RISCVSystemOperands.td
+++ b/llvm/lib/Target/RISCV/RISCVSystemOperands.td
@@ -342,6 +342,11 @@ def SysRegVL : SysReg<"vl", 0xC20>;
 def : SysReg<"vtype", 0xC21>;
 def SysRegVLENB: SysReg<"vlenb", 0xC22>;
 
+//===----------------------------------------------------------------------===//
+// Shadow Stack CSR
+//===----------------------------------------------------------------------===//
+def : SysReg<"ssp", 0x011>;
+
 //===----------------------------------------------------------------------===//
 // State Enable Extension (Smstateen)
 //===----------------------------------------------------------------------===//
diff --git a/llvm/test/MC/RISCV/user-csr-names.s b/llvm/test/MC/RISCV/user-csr-names.s
index 9f8f029e564275..f49eace659ac91 100644
--- a/llvm/test/MC/RISCV/user-csr-names.s
+++ b/llvm/test/MC/RISCV/user-csr-names.s
@@ -61,6 +61,20 @@ csrrs t1, instret, zero
 # uimm12
 csrrs t2, 0xC02, zero
 
+# ssp
+# name
+# CHECK-INST: csrrs t1, ssp, zero
+# CHECK-ENC:  encoding: [0x73,0x23,0x10,0x01]
+# CHECK-INST-ALIAS: csrr t1, ssp
+# uimm12
+# CHECK-INST: csrrs t2, ssp, zero
+# CHECK-ENC:  encoding: [0xf3,0x23,0x10,0x01]
+# CHECK-INST-ALIAS: csrr t2, ssp
+# name
+csrrs t1, ssp, zero
+# uimm12
+csrrs t2, 0x011, zero
+
 # hpmcounter3
 # name
 # CHECK-INST: csrrs t1, hpmcounter3, zero

``````````

</details>


https://github.com/llvm/llvm-project/pull/81974