[llvm] Initialize unsigned integer when declared (PR #81894)

[via llvm-commits]

https://github.com/MartinWehking created https://github.com/llvm/llvm-project/pull/81894

Initialize ModOpcode directly before the loop execution to silence static analyzer warnings about the usage of an uninitialized variable.

This leads to a redundant assignment of ElV2F16 inside the first loop execution, but also avoids superfluous emptiness checks of EltsV2F16 after the first execution of the loop.

>From 88d095fb4ad1f27e129d260ae7b00ac3cbcaf35c Mon Sep 17 00:00:00 2001
From: Martin <martin.wehking at codeplay.com>
Date: Thu, 15 Feb 2024 17:43:16 +0000
Subject: [PATCH] Initialize unsigned integer when declared

Initialize ModOpcode directly before the loop execution to silence
static analyzer warnings about the usage of an uninitialized variable.

This leads to a redundant assignment of ElV2F16 inside the first loop
execution, but also avoids superfluous emptiness checks of EltsV2F16
after the first execution of the loop.
---
 .../AMDGPU/AMDGPUInstructionSelector.cpp      | 36 ++++++++++---------
 1 file changed, 19 insertions(+), 17 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index 5657880279962b..4969e3e26612db 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -4075,28 +4075,30 @@ InstructionSelector::ComplexRendererFns
 AMDGPUInstructionSelector::selectWMMAModsF16NegAbs(MachineOperand &Root) const {
   Register Src = Root.getReg();
   unsigned Mods = SISrcMods::OP_SEL_1;
-  unsigned ModOpcode;
   SmallVector<Register, 8> EltsV2F16;
 
-  if (GConcatVectors *CV = dyn_cast<GConcatVectors>(MRI->getVRegDef(Src))) {
-    for (unsigned i = 0; i < CV->getNumSources(); ++i) {
-      MachineInstr *ElV2F16 = MRI->getVRegDef(CV->getSourceReg(i));
+  if (GConcatVectors *CV = dyn_cast<GConcatVectors>(MRI->getVRegDef(Src)))
+    if (CV->getNumSources() > 0) {
+      MachineInstr *ElV2F16 = MRI->getVRegDef(CV->getSourceReg(0));
       // Based on first element decide which mod we match, neg or abs
-      if (EltsV2F16.empty())
-        ModOpcode = (ElV2F16->getOpcode() == AMDGPU::G_FNEG) ? AMDGPU::G_FNEG
-                                                             : AMDGPU::G_FABS;
-      if (ElV2F16->getOpcode() != ModOpcode)
-        break;
-      EltsV2F16.push_back(ElV2F16->getOperand(1).getReg());
-    }
+      unsigned ModOpcode = (ElV2F16->getOpcode() == AMDGPU::G_FNEG)
+                               ? AMDGPU::G_FNEG
+                               : AMDGPU::G_FABS;
+
+      for (unsigned i = 0; i < CV->getNumSources(); ++i) {
+        ElV2F16 = MRI->getVRegDef(CV->getSourceReg(i));
+        if (ElV2F16->getOpcode() != ModOpcode)
+          break;
+        EltsV2F16.push_back(ElV2F16->getOperand(1).getReg());
+      }
 
-    // All elements had ModOpcode modifier
-    if (CV->getNumSources() == EltsV2F16.size()) {
-      MachineIRBuilder B(*Root.getParent());
-      selectWMMAModsNegAbs(ModOpcode, Mods, EltsV2F16, Src, Root.getParent(),
-                           *MRI);
+      // All elements had ModOpcode modifier
+      if (CV->getNumSources() == EltsV2F16.size()) {
+        MachineIRBuilder B(*Root.getParent());
+        selectWMMAModsNegAbs(ModOpcode, Mods, EltsV2F16, Src, Root.getParent(),
+                             *MRI);
+      }
     }
-  }
 
   return {{[=](MachineInstrBuilder &MIB) { MIB.addReg(Src); },
            [=](MachineInstrBuilder &MIB) { MIB.addImm(Mods); }}};