[llvm] [AMDGPU] Use consistent DecoderNamespace for wave64 instructions. NFC. (PR #81863)

Jay Foad via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 15 06:23:43 PST 2024


https://github.com/jayfoad created https://github.com/llvm/llvm-project/pull/81863

For wave64 WMMA instructions, putting W64 in the DecoderNamespace is
more descriptive than WMMA, and matches other uses for GFX12
GLOBAL_LOAD_TR instructions.


>From a0e87702ee46b57bdf81d4121c4712f239e63532 Mon Sep 17 00:00:00 2001
From: Jay Foad <jay.foad at amd.com>
Date: Thu, 15 Feb 2024 14:20:41 +0000
Subject: [PATCH] [AMDGPU] Use consistent DecoderNamespace for wave64
 instructions. NFC.

For wave64 WMMA instructions, putting W64 in the DecoderNamespace is
more descriptive than WMMA, and matches other uses for GFX12
GLOBAL_LOAD_TR instructions.
---
 llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 4 ++--
 llvm/lib/Target/AMDGPU/VOP3PInstructions.td                | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
index b307865275d075..98988f881f1b44 100644
--- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
@@ -662,11 +662,11 @@ DecodeStatus AMDGPUDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
     if (Res)
       break;
 
-    Res = tryDecodeInst(DecoderTableWMMAGFX1164, MI, QW, Address, CS);
+    Res = tryDecodeInst(DecoderTableGFX11W6464, MI, QW, Address, CS);
     if (Res)
       break;
 
-    Res = tryDecodeInst(DecoderTableWMMAGFX1264, MI, QW, Address, CS);
+    Res = tryDecodeInst(DecoderTableGFX12W6464, MI, QW, Address, CS);
   } while (false);
 
   if (Res && AMDGPU::isMAC(MI.getOpcode())) {
diff --git a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
index ef14a587c42e79..886858b5ab1ad3 100644
--- a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
@@ -1414,7 +1414,7 @@ multiclass VOP3P_Real_WMMA_gfx12 <bits<7> op, VOP3PWMMA_Profile WMMAP> {
 }
 
 multiclass VOP3P_Real_WMMA_gfx12w64 <bits<7> op, VOP3PWMMA_Profile WMMAP> {
-  let WaveSizePredicate = isWave64, DecoderNamespace = "WMMAGFX12" in {
+  let WaveSizePredicate = isWave64, DecoderNamespace = "GFX12W64" in {
     defm _twoaddr : VOP3P_WMMA_Real_Base <GFX12Gen, op, WMMAP>;
   }
 }
@@ -1544,7 +1544,7 @@ multiclass VOP3P_Real_WMMA <bits<7> op> {
   let WaveSizePredicate = isWave32, DecoderNamespace = "GFX11" in {
     defm _twoaddr_w32 : VOP3P_Real_Base <GFX11Gen, op>;
   }
-  let WaveSizePredicate = isWave64, DecoderNamespace = "WMMAGFX11" in {
+  let WaveSizePredicate = isWave64, DecoderNamespace = "GFX11W64" in {
     defm _twoaddr_w64 : VOP3P_Real_Base <GFX11Gen, op>;
   }
 }



More information about the llvm-commits mailing list