[llvm] GlobalISel needs fdiv 1 / sqrt(x) to rsq combine (PR #78673)

[Nick Anderson via llvm-commits]

nickleus27 wrote:

@arsenm I pushed tests with missing contract instructions for f16 type in the .mir file. I looked into adding .ll file tests for f16 type rsq. I found f16 rsq tests in llvm/test/CodeGen/AMDGPU/fdiv.f16.ll which included tests for f16 type with and without contract. I am not sure what I would need to do to make the tests applicable to this patch. Any suggestions?

https://github.com/llvm/llvm-project/pull/78673