[llvm] bfe302c - [clang][X86] X86::LAR X86::LSL add_implicate eflags (#80993)
via llvm-commits
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Wed Feb 14 20:54:00 PST 2024
Author: Qfrost
Date: 2024-02-15T12:53:56+08:00
New Revision: bfe302c58321abd79a5db7e805ef4b4db24df820
URL: https://github.com/llvm/llvm-project/commit/bfe302c58321abd79a5db7e805ef4b4db24df820
DIFF: https://github.com/llvm/llvm-project/commit/bfe302c58321abd79a5db7e805ef4b4db24df820.diff
LOG: [clang][X86] X86::LAR X86::LSL add_implicate eflags (#80993)
[@xia0ji233](https://github.com/xia0ji233) and I found that X86::LAR and
X86::lSR implicit use eflags register. However, it was not been defined
in LLVM, which means we will get wrong alive-result if we use these two
instructions.

Added:
Modified:
llvm/lib/Target/X86/X86InstrSystem.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td
index a7899a2492b882..24a334d38f9261 100644
--- a/llvm/lib/Target/X86/X86InstrSystem.td
+++ b/llvm/lib/Target/X86/X86InstrSystem.td
@@ -213,6 +213,7 @@ def MOV16sm : I<0x8E, MRMSrcMem, (outs SEGMENT_REG:$dst), (ins i16mem:$src),
let SchedRW = [WriteSystem] in {
def SWAPGS : I<0x01, MRM_F8, (outs), (ins), "swapgs", []>, TB;
+let Defs = [EFLAGS] in {
let mayLoad = 1 in
def LAR16rm : I<0x02, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src),
"lar{w}\t{$src, $dst|$dst, $src}", []>, TB,
@@ -253,6 +254,7 @@ def LSL64rm : RI<0x03, MRMSrcMem, (outs GR64:$dst), (ins i16mem:$src),
"lsl{q}\t{$src, $dst|$dst, $src}", []>, TB;
def LSL64rr : RI<0x03, MRMSrcReg, (outs GR64:$dst), (ins GR16orGR32orGR64:$src),
"lsl{q}\t{$src, $dst|$dst, $src}", []>, TB;
+}
def INVLPG : I<0x01, MRM7m, (outs), (ins i8mem:$addr), "invlpg\t$addr", []>, TB;
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