[llvm] [RISCV][TTI] Insert/Extract subvector at index zero are free (PR #81751)

Philip Reames via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 14 08:50:10 PST 2024


================
@@ -432,12 +432,20 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind,
     // must be implemented here.
     break;
   case TTI::SK_ExtractSubvector:
+    // Extract at zero is always a subregister extract
+    if (Index == 0)
+      return TTI::TCC_Free;
+
     // Example sequence:
     // vsetivli     zero, 4, e8, mf2, tu, ma (ignored)
     // vslidedown.vi  v8, v9, 2
     return LT.first *
            getRISCVInstructionCost(RISCV::VSLIDEDOWN_VI, LT.second, CostKind);
   case TTI::SK_InsertSubvector:
+    // Insert at zero is always a subregister insert
+    if (Index == 0)
+      return TTI::TCC_Free;
----------------
preames wrote:

Good catch.  It doesn't necessarily need to be a slideup, but we do need an instruction to perform the merge, you're right.  

https://github.com/llvm/llvm-project/pull/81751


More information about the llvm-commits mailing list