[llvm] [MachineLICM] Hoist COPY instruction only when user can be hoisted (PR #81735)

[via llvm-commits]

github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

<details>
<summary>
You can test this locally with the following command:
</summary>

``````````bash
git-clang-format --diff f82e0809ba12170e2f648f8a1ac01e78ef06c958 65f08edbfae23519ab220d11d6748b158fd8788d -- llvm/include/llvm/CodeGen/MachineLoopInfo.h llvm/lib/CodeGen/MachineLICM.cpp llvm/lib/CodeGen/MachineLoopInfo.cpp
``````````

</details>

<details>
<summary>
View the diff from clang-format here.
</summary>

``````````diff
diff --git a/llvm/include/llvm/CodeGen/MachineLoopInfo.h b/llvm/include/llvm/CodeGen/MachineLoopInfo.h
index f3811cd65a..445c9b1c3b 100644
--- a/llvm/include/llvm/CodeGen/MachineLoopInfo.h
+++ b/llvm/include/llvm/CodeGen/MachineLoopInfo.h
@@ -80,8 +80,9 @@ public:
   /// physical registers aren't accessed explicitly, and there are no side
   /// effects that aren't captured by the operands or other flags.
   /// ExcludeReg can be used to exclude the given register from the check
-  /// i.e. when we're considering hoisting it's definition but not hoisted it yet
-  bool isLoopInvariant(MachineInstr &I, const Register ExcludeReg=0) const;
+  /// i.e. when we're considering hoisting it's definition but not hoisted it
+  /// yet
+  bool isLoopInvariant(MachineInstr &I, const Register ExcludeReg = 0) const;
 
   void dump() const;
 
diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp
index e9cbf4e8c8..a3bfd97e5a 100644
--- a/llvm/lib/CodeGen/MachineLICM.cpp
+++ b/llvm/lib/CodeGen/MachineLICM.cpp
@@ -1266,21 +1266,22 @@ bool MachineLICMBase::IsProfitableToHoist(MachineInstr &MI,
   // also be hoisted.
   Register defReg;
   if (MI.isCopy() && MI.getOperand(0).isReg() &&
-      (defReg = MI.getOperand(0).getReg()).isVirtual() && MI.getOperand(1).isReg() &&
-      MI.getOperand(1).getReg().isVirtual() &&
+      (defReg = MI.getOperand(0).getReg()).isVirtual() &&
+      MI.getOperand(1).isReg() && MI.getOperand(1).getReg().isVirtual() &&
       IsLoopInvariantInst(MI, CurLoop) &&
       any_of(MRI->use_nodbg_instructions(MI.getOperand(0).getReg()),
-            [&CurLoop, this, defReg, Cost](MachineInstr &UseMI) {
-                  if (!CurLoop->contains(&UseMI))
-                    return false;
-
-                  // COPY is a cheap instruction, but if moving it won't cause high RP we're
-                  // fine to hoist it even if the user can't be hoisted later
-                  // Otherwise we want to check the user if it's hoistable
-                  if (CanCauseHighRegPressure(Cost, false) && !CurLoop->isLoopInvariant(UseMI, defReg))
-                    return false;
-
-                  return true;
+             [&CurLoop, this, defReg, Cost](MachineInstr &UseMI) {
+               if (!CurLoop->contains(&UseMI))
+                 return false;
+
+               // COPY is a cheap instruction, but if moving it won't cause high
+               // RP we're fine to hoist it even if the user can't be hoisted
+               // later Otherwise we want to check the user if it's hoistable
+               if (CanCauseHighRegPressure(Cost, false) &&
+                   !CurLoop->isLoopInvariant(UseMI, defReg))
+                 return false;
+
+               return true;
              }))
     return true;
 
diff --git a/llvm/lib/CodeGen/MachineLoopInfo.cpp b/llvm/lib/CodeGen/MachineLoopInfo.cpp
index 0d713ba3d6..1492c8c366 100644
--- a/llvm/lib/CodeGen/MachineLoopInfo.cpp
+++ b/llvm/lib/CodeGen/MachineLoopInfo.cpp
@@ -198,7 +198,8 @@ MDNode *MachineLoop::getLoopID() const {
   return LoopID;
 }
 
-bool MachineLoop::isLoopInvariant(MachineInstr &I, const Register ExcludeReg) const {
+bool MachineLoop::isLoopInvariant(MachineInstr &I,
+                                  const Register ExcludeReg) const {
   MachineFunction *MF = I.getParent()->getParent();
   MachineRegisterInfo *MRI = &MF->getRegInfo();
   const TargetSubtargetInfo &ST = MF->getSubtarget();
@@ -213,7 +214,8 @@ bool MachineLoop::isLoopInvariant(MachineInstr &I, const Register ExcludeReg) co
     Register Reg = MO.getReg();
     if (Reg == 0) continue;
 
-    if (ExcludeReg == Reg) continue;
+    if (ExcludeReg == Reg)
+      continue;
 
     // An instruction that uses or defines a physical register can't e.g. be
     // hoisted, so mark this as not invariant.

``````````

</details>


https://github.com/llvm/llvm-project/pull/81735