[llvm] 1f90af1 - [TableGen] Do not speculatively grow RegUnitSets. NFC.

Jay Foad via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 13 08:10:42 PST 2024


Author: Jay Foad
Date: 2024-02-13T16:08:56Z
New Revision: 1f90af183d7a007584fac041eaca9f126a1a942f

URL: https://github.com/llvm/llvm-project/commit/1f90af183d7a007584fac041eaca9f126a1a942f
DIFF: https://github.com/llvm/llvm-project/commit/1f90af183d7a007584fac041eaca9f126a1a942f.diff

LOG: [TableGen] Do not speculatively grow RegUnitSets. NFC.

This seems to be a trick to avoid copying a RegUnitSet, but it can be
done more simply using std::move.

Added: 
    

Modified: 
    llvm/utils/TableGen/CodeGenRegisters.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/utils/TableGen/CodeGenRegisters.cpp b/llvm/utils/TableGen/CodeGenRegisters.cpp
index dd1850752aad61..0b671271bf0c9c 100644
--- a/llvm/utils/TableGen/CodeGenRegisters.cpp
+++ b/llvm/utils/TableGen/CodeGenRegisters.cpp
@@ -1985,18 +1985,14 @@ void CodeGenRegBank::computeRegUnitSets() {
     if (!RC.Allocatable || RC.Artificial || !RC.GeneratePressureSet)
       continue;
 
-    // Speculatively grow the RegUnitSets to hold the new set.
-    RegUnitSet &RUSet = RegUnitSets.emplace_back();
-    RUSet.Name = RC.getName();
-
     // Compute a sorted list of units in this class.
+    RegUnitSet RUSet;
+    RUSet.Name = RC.getName();
     RC.buildRegUnitSet(*this, RUSet.Units);
 
     // Find an existing RegUnitSet.
-    std::vector<RegUnitSet>::const_iterator SetI =
-        findRegUnitSet(RegUnitSets, RUSet);
-    if (SetI != std::prev(RegUnitSets.end()))
-      RegUnitSets.pop_back();
+    if (findRegUnitSet(RegUnitSets, RUSet) == RegUnitSets.end())
+      RegUnitSets.push_back(std::move(RUSet));
   }
 
   if (RegUnitSets.empty())
@@ -2042,11 +2038,9 @@ void CodeGenRegBank::computeRegUnitSets() {
       if (Intersection.empty())
         continue;
 
-      // Speculatively grow the RegUnitSets to hold the new set.
-      RegUnitSet &RUSet = RegUnitSets.emplace_back();
+      RegUnitSet RUSet;
       RUSet.Name =
           RegUnitSets[Idx].Name + "_with_" + RegUnitSets[SearchIdx].Name;
-
       std::set_union(RegUnitSets[Idx].Units.begin(),
                      RegUnitSets[Idx].Units.end(),
                      RegUnitSets[SearchIdx].Units.begin(),
@@ -2054,16 +2048,13 @@ void CodeGenRegBank::computeRegUnitSets() {
                      std::inserter(RUSet.Units, RUSet.Units.begin()));
 
       // Find an existing RegUnitSet, or add the union to the unique sets.
-      std::vector<RegUnitSet>::const_iterator SetI =
-          findRegUnitSet(RegUnitSets, RUSet);
-      if (SetI != std::prev(RegUnitSets.end()))
-        RegUnitSets.pop_back();
-      else {
-        LLVM_DEBUG(dbgs() << "UnitSet " << RegUnitSets.size() - 1 << " "
+      if (findRegUnitSet(RegUnitSets, RUSet) == RegUnitSets.end()) {
+        LLVM_DEBUG(dbgs() << "UnitSet " << RegUnitSets.size() << " "
                           << RUSet.Name << ":";
                    for (auto &U
                         : RUSet.Units) printRegUnitName(U);
                    dbgs() << "\n";);
+        RegUnitSets.push_back(std::move(RUSet));
       }
     }
   }


        


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