[llvm] [X86][GlobalISel] Enable G_SDIV/G_UDIV/G_SREM/G_UREM (PR #81615)
Evgenii Kudriashov via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 13 08:08:39 PST 2024
https://github.com/e-kud created https://github.com/llvm/llvm-project/pull/81615
* Create a libcall for s64 type for 32 bit targets.
* Fix a bug in REM selection: SUBREG_TO_REG is not intended to produce a value from super registers.
* Replace per-pass tests by end-to-end tests. They haven't revealed the aforementioned bug.
>From 82c4e50b69b37af8f209f09ef8569b110c1e7dc0 Mon Sep 17 00:00:00 2001
From: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
Date: Tue, 13 Feb 2024 06:01:50 -0800
Subject: [PATCH] [X86][GlobalISel] Enable G_SDIV/G_UDIV/G_SREM/G_UREM
* Create a libcall for s64 type for 32 bit targets.
* Fix a bug in REM selection: SUBREG_TO_REG is not intended to
produce a value from super registers.
* Replace per-pass tests by end-to-end tests. They haven't revealed the
aforementioned bug.
---
.../X86/GISel/X86InstructionSelector.cpp | 9 +-
.../lib/Target/X86/GISel/X86LegalizerInfo.cpp | 1 +
.../X86/GlobalISel/x86-legalize-sdiv.mir | 114 --------
.../X86/GlobalISel/x86-legalize-srem.mir | 211 --------------
.../X86/GlobalISel/x86-legalize-udiv.mir | 195 -------------
.../X86/GlobalISel/x86-legalize-urem.mir | 211 --------------
.../X86/GlobalISel/x86-select-sdiv.mir | 130 ---------
.../X86/GlobalISel/x86-select-srem.mir | 213 --------------
.../X86/GlobalISel/x86-select-udiv.mir | 215 --------------
.../X86/GlobalISel/x86-select-urem.mir | 215 --------------
.../X86/GlobalISel/x86_64-legalize-sdiv.mir | 145 ----------
.../X86/GlobalISel/x86_64-legalize-srem.mir | 253 ----------------
.../X86/GlobalISel/x86_64-legalize-udiv.mir | 253 ----------------
.../X86/GlobalISel/x86_64-legalize-urem.mir | 253 ----------------
.../X86/GlobalISel/x86_64-select-sdiv.mir | 164 -----------
.../X86/GlobalISel/x86_64-select-srem.mir | 270 -----------------
.../X86/GlobalISel/x86_64-select-udiv.mir | 267 -----------------
.../X86/GlobalISel/x86_64-select-urem.mir | 273 ------------------
llvm/test/CodeGen/X86/isel-sdiv.ll | 116 ++++++++
llvm/test/CodeGen/X86/isel-srem.ll | 150 ++++++++++
llvm/test/CodeGen/X86/isel-udiv.ll | 116 ++++++++
llvm/test/CodeGen/X86/isel-urem.ll | 150 ++++++++++
22 files changed, 536 insertions(+), 3388 deletions(-)
delete mode 100644 llvm/test/CodeGen/X86/GlobalISel/x86-legalize-sdiv.mir
delete mode 100644 llvm/test/CodeGen/X86/GlobalISel/x86-legalize-srem.mir
delete mode 100644 llvm/test/CodeGen/X86/GlobalISel/x86-legalize-udiv.mir
delete mode 100644 llvm/test/CodeGen/X86/GlobalISel/x86-legalize-urem.mir
delete mode 100644 llvm/test/CodeGen/X86/GlobalISel/x86-select-sdiv.mir
delete mode 100644 llvm/test/CodeGen/X86/GlobalISel/x86-select-srem.mir
delete mode 100644 llvm/test/CodeGen/X86/GlobalISel/x86-select-udiv.mir
delete mode 100644 llvm/test/CodeGen/X86/GlobalISel/x86-select-urem.mir
delete mode 100644 llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-sdiv.mir
delete mode 100644 llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-srem.mir
delete mode 100644 llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-udiv.mir
delete mode 100644 llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-urem.mir
delete mode 100644 llvm/test/CodeGen/X86/GlobalISel/x86_64-select-sdiv.mir
delete mode 100644 llvm/test/CodeGen/X86/GlobalISel/x86_64-select-srem.mir
delete mode 100644 llvm/test/CodeGen/X86/GlobalISel/x86_64-select-udiv.mir
delete mode 100644 llvm/test/CodeGen/X86/GlobalISel/x86_64-select-urem.mir
create mode 100644 llvm/test/CodeGen/X86/isel-sdiv.ll
create mode 100644 llvm/test/CodeGen/X86/isel-srem.ll
create mode 100644 llvm/test/CodeGen/X86/isel-udiv.ll
create mode 100644 llvm/test/CodeGen/X86/isel-urem.ll
diff --git a/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp b/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
index 26932ba2c8e242..8e0f61a855661b 100644
--- a/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
+++ b/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
@@ -1778,12 +1778,9 @@ bool X86InstructionSelector::selectMulDivRem(MachineInstr &I,
.addImm(8);
// Now reference the 8-bit subreg of the result.
- BuildMI(*I.getParent(), I, I.getDebugLoc(),
- TII.get(TargetOpcode::SUBREG_TO_REG))
- .addDef(DstReg)
- .addImm(0)
- .addReg(ResultSuperReg)
- .addImm(X86::sub_8bit);
+ BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(TargetOpcode::COPY),
+ DstReg)
+ .addReg(ResultSuperReg, 0, X86::sub_8bit);
} else {
BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(TargetOpcode::COPY),
DstReg)
diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
index 27381dff338e2d..4e83753b67e7e5 100644
--- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
@@ -212,6 +212,7 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
return typeInSet(0, {s8, s16, s32})(Query) ||
(Is64Bit && typeInSet(0, {s64})(Query));
})
+ .libcallFor({s64})
.clampScalar(0, s8, sMaxScalar);
// integer shifts
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-sdiv.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-sdiv.mir
deleted file mode 100644
index 80382db942722c..00000000000000
--- a/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-sdiv.mir
+++ /dev/null
@@ -1,114 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=i686-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
-
---- |
- ; ModuleID = 'sdiv.ll'
- source_filename = "sdiv.ll"
- target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-
- define i8 @test_sdiv_i8(i8 %arg1, i8 %arg2) {
- %res = sdiv i8 %arg1, %arg2
- ret i8 %res
- }
-
- define i16 @test_sdiv_i16(i16 %arg1, i16 %arg2) {
- %res = sdiv i16 %arg1, %arg2
- ret i16 %res
- }
-
- define i32 @test_sdiv_i32(i32 %arg1, i32 %arg2) {
- %res = sdiv i32 %arg1, %arg2
- ret i32 %res
- }
-
-...
----
-name: test_sdiv_i8
-alignment: 16
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _ }
- - { id: 1, class: _ }
- - { id: 2, class: _ }
- - { id: 3, class: _ }
- - { id: 4, class: _ }
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_sdiv_i8
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
- ; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
- ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
- ; CHECK: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
- ; CHECK: [[SDIV:%[0-9]+]]:_(s8) = G_SDIV [[TRUNC]], [[TRUNC1]]
- ; CHECK: $al = COPY [[SDIV]](s8)
- ; CHECK: RET 0, implicit $al
- %2:_(s32) = COPY $edi
- %0:_(s8) = G_TRUNC %2(s32)
- %3:_(s32) = COPY $esi
- %1:_(s8) = G_TRUNC %3(s32)
- %4:_(s8) = G_SDIV %0, %1
- $al = COPY %4(s8)
- RET 0, implicit $al
-
-...
----
-name: test_sdiv_i16
-alignment: 16
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _ }
- - { id: 1, class: _ }
- - { id: 2, class: _ }
- - { id: 3, class: _ }
- - { id: 4, class: _ }
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_sdiv_i16
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
- ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
- ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
- ; CHECK: [[SDIV:%[0-9]+]]:_(s16) = G_SDIV [[TRUNC]], [[TRUNC1]]
- ; CHECK: $ax = COPY [[SDIV]](s16)
- ; CHECK: RET 0, implicit $ax
- %2:_(s32) = COPY $edi
- %0:_(s16) = G_TRUNC %2(s32)
- %3:_(s32) = COPY $esi
- %1:_(s16) = G_TRUNC %3(s32)
- %4:_(s16) = G_SDIV %0, %1
- $ax = COPY %4(s16)
- RET 0, implicit $ax
-
-...
----
-name: test_sdiv_i32
-alignment: 16
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _ }
- - { id: 1, class: _ }
- - { id: 2, class: _ }
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_sdiv_i32
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
- ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
- ; CHECK: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[COPY]], [[COPY1]]
- ; CHECK: $eax = COPY [[SDIV]](s32)
- ; CHECK: RET 0, implicit $eax
- %0:_(s32) = COPY $edi
- %1:_(s32) = COPY $esi
- %2:_(s32) = G_SDIV %0, %1
- $eax = COPY %2(s32)
- RET 0, implicit $eax
-
-...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-srem.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-srem.mir
deleted file mode 100644
index 965bf635d6feb8..00000000000000
--- a/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-srem.mir
+++ /dev/null
@@ -1,211 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=i686-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
-
---- |
- ; ModuleID = 'srem.ll'
- source_filename = "srem.ll"
- target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
- target triple = "i386--linux-gnu"
-
- define i8 @test_srem_i8(i8 %arg1, i8 %arg2) {
- %res = srem i8 %arg1, %arg2
- ret i8 %res
- }
-
- define i16 @test_srem_i16(i16 %arg1, i16 %arg2) {
- %res = srem i16 %arg1, %arg2
- ret i16 %res
- }
-
- define i32 @test_srem_i32(i32 %arg1, i32 %arg2) {
- %res = srem i32 %arg1, %arg2
- ret i32 %res
- }
-
-...
----
-name: test_srem_i8
-alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
- - { id: 2, class: _, preferred-register: '' }
- - { id: 3, class: _, preferred-register: '' }
- - { id: 4, class: _, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 4
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
- - { id: 0, type: default, offset: 4, size: 1, alignment: 4, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 1, alignment: 16, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- ; CHECK-LABEL: name: test_srem_i8
- ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
- ; CHECK: [[LOAD:%[0-9]+]]:_(s8) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load (s8) from %fixed-stack.0, align 16)
- ; CHECK: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
- ; CHECK: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[FRAME_INDEX1]](p0) :: (invariant load (s8) from %fixed-stack.1, align 4)
- ; CHECK: [[SREM:%[0-9]+]]:_(s8) = G_SREM [[LOAD]], [[LOAD1]]
- ; CHECK: $al = COPY [[SREM]](s8)
- ; CHECK: RET 0, implicit $al
- %2:_(p0) = G_FRAME_INDEX %fixed-stack.1
- %0:_(s8) = G_LOAD %2(p0) :: (invariant load (s8) from %fixed-stack.1, align 16)
- %3:_(p0) = G_FRAME_INDEX %fixed-stack.0
- %1:_(s8) = G_LOAD %3(p0) :: (invariant load (s8) from %fixed-stack.0, align 4)
- %4:_(s8) = G_SREM %0, %1
- $al = COPY %4(s8)
- RET 0, implicit $al
-
-...
----
-name: test_srem_i16
-alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
- - { id: 2, class: _, preferred-register: '' }
- - { id: 3, class: _, preferred-register: '' }
- - { id: 4, class: _, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 4
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
- - { id: 0, type: default, offset: 4, size: 2, alignment: 4, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 2, alignment: 16, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- ; CHECK-LABEL: name: test_srem_i16
- ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
- ; CHECK: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load (s16) from %fixed-stack.0, align 16)
- ; CHECK: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
- ; CHECK: [[LOAD1:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX1]](p0) :: (invariant load (s16) from %fixed-stack.1, align 4)
- ; CHECK: [[SREM:%[0-9]+]]:_(s16) = G_SREM [[LOAD]], [[LOAD1]]
- ; CHECK: $ax = COPY [[SREM]](s16)
- ; CHECK: RET 0, implicit $ax
- %2:_(p0) = G_FRAME_INDEX %fixed-stack.1
- %0:_(s16) = G_LOAD %2(p0) :: (invariant load (s16) from %fixed-stack.1, align 16)
- %3:_(p0) = G_FRAME_INDEX %fixed-stack.0
- %1:_(s16) = G_LOAD %3(p0) :: (invariant load (s16) from %fixed-stack.0, align 4)
- %4:_(s16) = G_SREM %0, %1
- $ax = COPY %4(s16)
- RET 0, implicit $ax
-
-...
----
-name: test_srem_i32
-alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
- - { id: 2, class: _, preferred-register: '' }
- - { id: 3, class: _, preferred-register: '' }
- - { id: 4, class: _, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 4
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
- - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 4, alignment: 16, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- ; CHECK-LABEL: name: test_srem_i32
- ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
- ; CHECK: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load (s32) from %fixed-stack.0, align 16)
- ; CHECK: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
- ; CHECK: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (invariant load (s32) from %fixed-stack.1)
- ; CHECK: [[SREM:%[0-9]+]]:_(s32) = G_SREM [[LOAD]], [[LOAD1]]
- ; CHECK: $eax = COPY [[SREM]](s32)
- ; CHECK: RET 0, implicit $eax
- %2:_(p0) = G_FRAME_INDEX %fixed-stack.1
- %0:_(s32) = G_LOAD %2(p0) :: (invariant load (s32) from %fixed-stack.1, align 16)
- %3:_(p0) = G_FRAME_INDEX %fixed-stack.0
- %1:_(s32) = G_LOAD %3(p0) :: (invariant load (s32) from %fixed-stack.0, align 4)
- %4:_(s32) = G_SREM %0, %1
- $eax = COPY %4(s32)
- RET 0, implicit $eax
-
-...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-udiv.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-udiv.mir
deleted file mode 100644
index 85c9b6d9e86bfd..00000000000000
--- a/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-udiv.mir
+++ /dev/null
@@ -1,195 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=i686-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
-
---- |
- ; ModuleID = 'udiv.ll'
- source_filename = "udiv.ll"
- target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-
- define i8 @test_udiv_i8(i8 %arg1, i8 %arg2) {
- %res = udiv i8 %arg1, %arg2
- ret i8 %res
- }
-
- define i16 @test_udiv_i16(i16 %arg1, i16 %arg2) {
- %res = udiv i16 %arg1, %arg2
- ret i16 %res
- }
-
- define i32 @test_udiv_i32(i32 %arg1, i32 %arg2) {
- %res = udiv i32 %arg1, %arg2
- ret i32 %res
- }
-
-...
----
-name: test_udiv_i8
-alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
- - { id: 2, class: _, preferred-register: '' }
- - { id: 3, class: _, preferred-register: '' }
- - { id: 4, class: _, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_udiv_i8
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
- ; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
- ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
- ; CHECK: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
- ; CHECK: [[UDIV:%[0-9]+]]:_(s8) = G_UDIV [[TRUNC]], [[TRUNC1]]
- ; CHECK: $al = COPY [[UDIV]](s8)
- ; CHECK: RET 0, implicit $al
- %2:_(s32) = COPY $edi
- %0:_(s8) = G_TRUNC %2(s32)
- %3:_(s32) = COPY $esi
- %1:_(s8) = G_TRUNC %3(s32)
- %4:_(s8) = G_UDIV %0, %1
- $al = COPY %4(s8)
- RET 0, implicit $al
-
-...
----
-name: test_udiv_i16
-alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
- - { id: 2, class: _, preferred-register: '' }
- - { id: 3, class: _, preferred-register: '' }
- - { id: 4, class: _, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_udiv_i16
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
- ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
- ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
- ; CHECK: [[UDIV:%[0-9]+]]:_(s16) = G_UDIV [[TRUNC]], [[TRUNC1]]
- ; CHECK: $ax = COPY [[UDIV]](s16)
- ; CHECK: RET 0, implicit $ax
- %2:_(s32) = COPY $edi
- %0:_(s16) = G_TRUNC %2(s32)
- %3:_(s32) = COPY $esi
- %1:_(s16) = G_TRUNC %3(s32)
- %4:_(s16) = G_UDIV %0, %1
- $ax = COPY %4(s16)
- RET 0, implicit $ax
-
-...
----
-name: test_udiv_i32
-alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
- - { id: 2, class: _, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_udiv_i32
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
- ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
- ; CHECK: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[COPY]], [[COPY1]]
- ; CHECK: $eax = COPY [[UDIV]](s32)
- ; CHECK: RET 0, implicit $eax
- %0:_(s32) = COPY $edi
- %1:_(s32) = COPY $esi
- %2:_(s32) = G_UDIV %0, %1
- $eax = COPY %2(s32)
- RET 0, implicit $eax
-
-...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-urem.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-urem.mir
deleted file mode 100644
index b6496216ac56da..00000000000000
--- a/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-urem.mir
+++ /dev/null
@@ -1,211 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=i686-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
-
---- |
- ; ModuleID = 'urem.ll'
- source_filename = "urem.ll"
- target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
- target triple = "i386--linux-gnu"
-
- define i8 @test_urem_i8(i8 %arg1, i8 %arg2) {
- %res = urem i8 %arg1, %arg2
- ret i8 %res
- }
-
- define i16 @test_urem_i16(i16 %arg1, i16 %arg2) {
- %res = urem i16 %arg1, %arg2
- ret i16 %res
- }
-
- define i32 @test_urem_i32(i32 %arg1, i32 %arg2) {
- %res = urem i32 %arg1, %arg2
- ret i32 %res
- }
-
-...
----
-name: test_urem_i8
-alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
- - { id: 2, class: _, preferred-register: '' }
- - { id: 3, class: _, preferred-register: '' }
- - { id: 4, class: _, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 4
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
- - { id: 0, type: default, offset: 4, size: 1, alignment: 4, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 1, alignment: 16, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- ; CHECK-LABEL: name: test_urem_i8
- ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
- ; CHECK: [[LOAD:%[0-9]+]]:_(s8) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load (s8) from %fixed-stack.0, align 16)
- ; CHECK: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
- ; CHECK: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[FRAME_INDEX1]](p0) :: (invariant load (s8) from %fixed-stack.1, align 4)
- ; CHECK: [[UREM:%[0-9]+]]:_(s8) = G_UREM [[LOAD]], [[LOAD1]]
- ; CHECK: $al = COPY [[UREM]](s8)
- ; CHECK: RET 0, implicit $al
- %2:_(p0) = G_FRAME_INDEX %fixed-stack.1
- %0:_(s8) = G_LOAD %2(p0) :: (invariant load (s8) from %fixed-stack.1, align 16)
- %3:_(p0) = G_FRAME_INDEX %fixed-stack.0
- %1:_(s8) = G_LOAD %3(p0) :: (invariant load (s8) from %fixed-stack.0, align 4)
- %4:_(s8) = G_UREM %0, %1
- $al = COPY %4(s8)
- RET 0, implicit $al
-
-...
----
-name: test_urem_i16
-alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
- - { id: 2, class: _, preferred-register: '' }
- - { id: 3, class: _, preferred-register: '' }
- - { id: 4, class: _, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 4
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
- - { id: 0, type: default, offset: 4, size: 2, alignment: 4, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 2, alignment: 16, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- ; CHECK-LABEL: name: test_urem_i16
- ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
- ; CHECK: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load (s16) from %fixed-stack.0, align 16)
- ; CHECK: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
- ; CHECK: [[LOAD1:%[0-9]+]]:_(s16) = G_LOAD [[FRAME_INDEX1]](p0) :: (invariant load (s16) from %fixed-stack.1, align 4)
- ; CHECK: [[UREM:%[0-9]+]]:_(s16) = G_UREM [[LOAD]], [[LOAD1]]
- ; CHECK: $ax = COPY [[UREM]](s16)
- ; CHECK: RET 0, implicit $ax
- %2:_(p0) = G_FRAME_INDEX %fixed-stack.1
- %0:_(s16) = G_LOAD %2(p0) :: (invariant load (s16) from %fixed-stack.1, align 16)
- %3:_(p0) = G_FRAME_INDEX %fixed-stack.0
- %1:_(s16) = G_LOAD %3(p0) :: (invariant load (s16) from %fixed-stack.0, align 4)
- %4:_(s16) = G_UREM %0, %1
- $ax = COPY %4(s16)
- RET 0, implicit $ax
-
-...
----
-name: test_urem_i32
-alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
- - { id: 2, class: _, preferred-register: '' }
- - { id: 3, class: _, preferred-register: '' }
- - { id: 4, class: _, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 4
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
- - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 4, alignment: 16, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- ; CHECK-LABEL: name: test_urem_i32
- ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
- ; CHECK: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load (s32) from %fixed-stack.0, align 16)
- ; CHECK: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
- ; CHECK: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (invariant load (s32) from %fixed-stack.1)
- ; CHECK: [[UREM:%[0-9]+]]:_(s32) = G_UREM [[LOAD]], [[LOAD1]]
- ; CHECK: $eax = COPY [[UREM]](s32)
- ; CHECK: RET 0, implicit $eax
- %2:_(p0) = G_FRAME_INDEX %fixed-stack.1
- %0:_(s32) = G_LOAD %2(p0) :: (invariant load (s32) from %fixed-stack.1, align 16)
- %3:_(p0) = G_FRAME_INDEX %fixed-stack.0
- %1:_(s32) = G_LOAD %3(p0) :: (invariant load (s32) from %fixed-stack.0, align 4)
- %4:_(s32) = G_UREM %0, %1
- $eax = COPY %4(s32)
- RET 0, implicit $eax
-
-...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-select-sdiv.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-select-sdiv.mir
deleted file mode 100644
index 653d867492dc11..00000000000000
--- a/llvm/test/CodeGen/X86/GlobalISel/x86-select-sdiv.mir
+++ /dev/null
@@ -1,130 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=i386-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
-
---- |
- ; ModuleID = 'sdiv.ll'
- source_filename = "sdiv.ll"
- target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-
- define i8 @test_sdiv_i8(i8 %arg1, i8 %arg2) {
- %res = sdiv i8 %arg1, %arg2
- ret i8 %res
- }
-
- define i16 @test_sdiv_i16(i16 %arg1, i16 %arg2) {
- %res = sdiv i16 %arg1, %arg2
- ret i16 %res
- }
-
- define i32 @test_sdiv_i32(i32 %arg1, i32 %arg2) {
- %res = sdiv i32 %arg1, %arg2
- ret i32 %res
- }
-
-...
----
-name: test_sdiv_i8
-alignment: 16
-legalized: true
-regBankSelected: true
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr }
- - { id: 1, class: gpr }
- - { id: 2, class: gpr }
- - { id: 3, class: gpr }
- - { id: 4, class: gpr }
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_sdiv_i8
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
- ; CHECK: [[COPY1:%[0-9]+]]:gr32_abcd = COPY [[COPY]]
- ; CHECK: [[COPY2:%[0-9]+]]:gr8_abcd_l = COPY [[COPY1]].sub_8bit
- ; CHECK: [[COPY3:%[0-9]+]]:gr32 = COPY $esi
- ; CHECK: [[COPY4:%[0-9]+]]:gr32_abcd = COPY [[COPY3]]
- ; CHECK: [[COPY5:%[0-9]+]]:gr8_abcd_l = COPY [[COPY4]].sub_8bit
- ; CHECK: $ax = MOVSX16rr8 [[COPY2]]
- ; CHECK: IDIV8r [[COPY5]], implicit-def $al, implicit-def $ah, implicit-def $eflags, implicit $ax
- ; CHECK: [[COPY6:%[0-9]+]]:gr8 = COPY $al
- ; CHECK: $al = COPY [[COPY6]]
- ; CHECK: RET 0, implicit $al
- %2:gpr(s32) = COPY $edi
- %0:gpr(s8) = G_TRUNC %2(s32)
- %3:gpr(s32) = COPY $esi
- %1:gpr(s8) = G_TRUNC %3(s32)
- %4:gpr(s8) = G_SDIV %0, %1
- $al = COPY %4(s8)
- RET 0, implicit $al
-
-...
----
-name: test_sdiv_i16
-alignment: 16
-legalized: true
-regBankSelected: true
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr }
- - { id: 1, class: gpr }
- - { id: 2, class: gpr }
- - { id: 3, class: gpr }
- - { id: 4, class: gpr }
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_sdiv_i16
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
- ; CHECK: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit
- ; CHECK: [[COPY2:%[0-9]+]]:gr32 = COPY $esi
- ; CHECK: [[COPY3:%[0-9]+]]:gr16 = COPY [[COPY2]].sub_16bit
- ; CHECK: $ax = COPY [[COPY1]]
- ; CHECK: CWD implicit-def $ax, implicit-def $dx, implicit $ax
- ; CHECK: IDIV16r [[COPY3]], implicit-def $ax, implicit-def $dx, implicit-def $eflags, implicit $ax, implicit $dx
- ; CHECK: [[COPY4:%[0-9]+]]:gr16 = COPY $ax
- ; CHECK: $ax = COPY [[COPY4]]
- ; CHECK: RET 0, implicit $ax
- %2:gpr(s32) = COPY $edi
- %0:gpr(s16) = G_TRUNC %2(s32)
- %3:gpr(s32) = COPY $esi
- %1:gpr(s16) = G_TRUNC %3(s32)
- %4:gpr(s16) = G_SDIV %0, %1
- $ax = COPY %4(s16)
- RET 0, implicit $ax
-
-...
----
-name: test_sdiv_i32
-alignment: 16
-legalized: true
-regBankSelected: true
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr }
- - { id: 1, class: gpr }
- - { id: 2, class: gpr }
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_sdiv_i32
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
- ; CHECK: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
- ; CHECK: $eax = COPY [[COPY]]
- ; CHECK: CDQ implicit-def $eax, implicit-def $edx, implicit $eax
- ; CHECK: IDIV32r [[COPY1]], implicit-def $eax, implicit-def $edx, implicit-def $eflags, implicit $eax, implicit $edx
- ; CHECK: [[COPY2:%[0-9]+]]:gr32 = COPY $eax
- ; CHECK: $eax = COPY [[COPY2]]
- ; CHECK: RET 0, implicit $eax
- %0:gpr(s32) = COPY $edi
- %1:gpr(s32) = COPY $esi
- %2:gpr(s32) = G_SDIV %0, %1
- $eax = COPY %2(s32)
- RET 0, implicit $eax
-
-...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-select-srem.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-select-srem.mir
deleted file mode 100644
index a7f5badcdef061..00000000000000
--- a/llvm/test/CodeGen/X86/GlobalISel/x86-select-srem.mir
+++ /dev/null
@@ -1,213 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=i386-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
-
---- |
- ; ModuleID = 'srem.ll'
- source_filename = "srem.ll"
- target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
- target triple = "i386--linux-gnu"
-
- define i8 @test_srem_i8(i8 %arg1, i8 %arg2) {
- %res = srem i8 %arg1, %arg2
- ret i8 %res
- }
-
- define i16 @test_srem_i16(i16 %arg1, i16 %arg2) {
- %res = srem i16 %arg1, %arg2
- ret i16 %res
- }
-
- define i32 @test_srem_i32(i32 %arg1, i32 %arg2) {
- %res = srem i32 %arg1, %arg2
- ret i32 %res
- }
-
-...
----
-name: test_srem_i8
-alignment: 16
-exposesReturnsTwice: false
-legalized: true
-regBankSelected: true
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr, preferred-register: '' }
- - { id: 1, class: gpr, preferred-register: '' }
- - { id: 2, class: gpr, preferred-register: '' }
- - { id: 3, class: gpr, preferred-register: '' }
- - { id: 4, class: gpr, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 4
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
- - { id: 0, type: default, offset: 4, size: 1, alignment: 4, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 1, alignment: 16, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- ; CHECK-LABEL: name: test_srem_i8
- ; CHECK: [[MOV8rm:%[0-9]+]]:gr8 = MOV8rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load (s8) from %fixed-stack.0, align 16)
- ; CHECK: [[MOV8rm1:%[0-9]+]]:gr8 = MOV8rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (invariant load (s8) from %fixed-stack.1, align 4)
- ; CHECK: $ax = MOVSX16rr8 [[MOV8rm]]
- ; CHECK: IDIV8r [[MOV8rm1]], implicit-def $al, implicit-def $ah, implicit-def $eflags, implicit $ax
- ; CHECK: [[COPY:%[0-9]+]]:gr8 = COPY $ah
- ; CHECK: $al = COPY [[COPY]]
- ; CHECK: RET 0, implicit $al
- %2:gpr(p0) = G_FRAME_INDEX %fixed-stack.1
- %0:gpr(s8) = G_LOAD %2(p0) :: (invariant load (s8) from %fixed-stack.1, align 16)
- %3:gpr(p0) = G_FRAME_INDEX %fixed-stack.0
- %1:gpr(s8) = G_LOAD %3(p0) :: (invariant load (s8) from %fixed-stack.0, align 4)
- %4:gpr(s8) = G_SREM %0, %1
- $al = COPY %4(s8)
- RET 0, implicit $al
-
-...
----
-name: test_srem_i16
-alignment: 16
-exposesReturnsTwice: false
-legalized: true
-regBankSelected: true
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr, preferred-register: '' }
- - { id: 1, class: gpr, preferred-register: '' }
- - { id: 2, class: gpr, preferred-register: '' }
- - { id: 3, class: gpr, preferred-register: '' }
- - { id: 4, class: gpr, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 4
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
- - { id: 0, type: default, offset: 4, size: 2, alignment: 4, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 2, alignment: 16, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- ; CHECK-LABEL: name: test_srem_i16
- ; CHECK: [[MOV16rm:%[0-9]+]]:gr16 = MOV16rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load (s16) from %fixed-stack.0, align 16)
- ; CHECK: [[MOV16rm1:%[0-9]+]]:gr16 = MOV16rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (invariant load (s16) from %fixed-stack.1, align 4)
- ; CHECK: $ax = COPY [[MOV16rm]]
- ; CHECK: CWD implicit-def $ax, implicit-def $dx, implicit $ax
- ; CHECK: IDIV16r [[MOV16rm1]], implicit-def $ax, implicit-def $dx, implicit-def $eflags, implicit $ax, implicit $dx
- ; CHECK: [[COPY:%[0-9]+]]:gr16 = COPY $dx
- ; CHECK: $ax = COPY [[COPY]]
- ; CHECK: RET 0, implicit $ax
- %2:gpr(p0) = G_FRAME_INDEX %fixed-stack.1
- %0:gpr(s16) = G_LOAD %2(p0) :: (invariant load (s16) from %fixed-stack.1, align 16)
- %3:gpr(p0) = G_FRAME_INDEX %fixed-stack.0
- %1:gpr(s16) = G_LOAD %3(p0) :: (invariant load (s16) from %fixed-stack.0, align 4)
- %4:gpr(s16) = G_SREM %0, %1
- $ax = COPY %4(s16)
- RET 0, implicit $ax
-
-...
----
-name: test_srem_i32
-alignment: 16
-exposesReturnsTwice: false
-legalized: true
-regBankSelected: true
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr, preferred-register: '' }
- - { id: 1, class: gpr, preferred-register: '' }
- - { id: 2, class: gpr, preferred-register: '' }
- - { id: 3, class: gpr, preferred-register: '' }
- - { id: 4, class: gpr, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 4
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
- - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 4, alignment: 16, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- ; CHECK-LABEL: name: test_srem_i32
- ; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load (s32) from %fixed-stack.0, align 16)
- ; CHECK: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (invariant load (s32) from %fixed-stack.1)
- ; CHECK: $eax = COPY [[MOV32rm]]
- ; CHECK: CDQ implicit-def $eax, implicit-def $edx, implicit $eax
- ; CHECK: IDIV32r [[MOV32rm1]], implicit-def $eax, implicit-def $edx, implicit-def $eflags, implicit $eax, implicit $edx
- ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edx
- ; CHECK: $eax = COPY [[COPY]]
- ; CHECK: RET 0, implicit $eax
- %2:gpr(p0) = G_FRAME_INDEX %fixed-stack.1
- %0:gpr(s32) = G_LOAD %2(p0) :: (invariant load (s32) from %fixed-stack.1, align 16)
- %3:gpr(p0) = G_FRAME_INDEX %fixed-stack.0
- %1:gpr(s32) = G_LOAD %3(p0) :: (invariant load (s32) from %fixed-stack.0, align 4)
- %4:gpr(s32) = G_SREM %0, %1
- $eax = COPY %4(s32)
- RET 0, implicit $eax
-
-...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-select-udiv.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-select-udiv.mir
deleted file mode 100644
index 1a960f9ad9e2c6..00000000000000
--- a/llvm/test/CodeGen/X86/GlobalISel/x86-select-udiv.mir
+++ /dev/null
@@ -1,215 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=i386-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
-
---- |
- ; ModuleID = 'udiv.ll'
- source_filename = "udiv.ll"
- target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
- target triple = "i386--linux-gnu"
-
- define i8 @test_udiv_i8(i8 %arg1, i8 %arg2) {
- %res = udiv i8 %arg1, %arg2
- ret i8 %res
- }
-
- define i16 @test_udiv_i16(i16 %arg1, i16 %arg2) {
- %res = udiv i16 %arg1, %arg2
- ret i16 %res
- }
-
- define i32 @test_udiv_i32(i32 %arg1, i32 %arg2) {
- %res = udiv i32 %arg1, %arg2
- ret i32 %res
- }
-
-...
----
-name: test_udiv_i8
-alignment: 16
-exposesReturnsTwice: false
-legalized: true
-regBankSelected: true
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr, preferred-register: '' }
- - { id: 1, class: gpr, preferred-register: '' }
- - { id: 2, class: gpr, preferred-register: '' }
- - { id: 3, class: gpr, preferred-register: '' }
- - { id: 4, class: gpr, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 4
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
- - { id: 0, type: default, offset: 4, size: 1, alignment: 4, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 1, alignment: 16, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- ; CHECK-LABEL: name: test_udiv_i8
- ; CHECK: [[MOV8rm:%[0-9]+]]:gr8 = MOV8rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load (s8) from %fixed-stack.0, align 16)
- ; CHECK: [[MOV8rm1:%[0-9]+]]:gr8 = MOV8rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (invariant load (s8) from %fixed-stack.1, align 4)
- ; CHECK: $ax = MOVZX16rr8 [[MOV8rm]]
- ; CHECK: DIV8r [[MOV8rm1]], implicit-def $al, implicit-def $ah, implicit-def $eflags, implicit $ax
- ; CHECK: [[COPY:%[0-9]+]]:gr8 = COPY $al
- ; CHECK: $al = COPY [[COPY]]
- ; CHECK: RET 0, implicit $al
- %2:gpr(p0) = G_FRAME_INDEX %fixed-stack.1
- %0:gpr(s8) = G_LOAD %2(p0) :: (invariant load (s8) from %fixed-stack.1, align 16)
- %3:gpr(p0) = G_FRAME_INDEX %fixed-stack.0
- %1:gpr(s8) = G_LOAD %3(p0) :: (invariant load (s8) from %fixed-stack.0, align 4)
- %4:gpr(s8) = G_UDIV %0, %1
- $al = COPY %4(s8)
- RET 0, implicit $al
-
-...
----
-name: test_udiv_i16
-alignment: 16
-exposesReturnsTwice: false
-legalized: true
-regBankSelected: true
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr, preferred-register: '' }
- - { id: 1, class: gpr, preferred-register: '' }
- - { id: 2, class: gpr, preferred-register: '' }
- - { id: 3, class: gpr, preferred-register: '' }
- - { id: 4, class: gpr, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 4
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
- - { id: 0, type: default, offset: 4, size: 2, alignment: 4, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 2, alignment: 16, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- ; CHECK-LABEL: name: test_udiv_i16
- ; CHECK: [[MOV16rm:%[0-9]+]]:gr16 = MOV16rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load (s16) from %fixed-stack.0, align 16)
- ; CHECK: [[MOV16rm1:%[0-9]+]]:gr16 = MOV16rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (invariant load (s16) from %fixed-stack.1, align 4)
- ; CHECK: $ax = COPY [[MOV16rm]]
- ; CHECK: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
- ; CHECK: $dx = COPY [[MOV32r0_]].sub_16bit
- ; CHECK: DIV16r [[MOV16rm1]], implicit-def $ax, implicit-def $dx, implicit-def $eflags, implicit $ax, implicit $dx
- ; CHECK: [[COPY:%[0-9]+]]:gr16 = COPY $ax
- ; CHECK: $ax = COPY [[COPY]]
- ; CHECK: RET 0, implicit $ax
- %2:gpr(p0) = G_FRAME_INDEX %fixed-stack.1
- %0:gpr(s16) = G_LOAD %2(p0) :: (invariant load (s16) from %fixed-stack.1, align 16)
- %3:gpr(p0) = G_FRAME_INDEX %fixed-stack.0
- %1:gpr(s16) = G_LOAD %3(p0) :: (invariant load (s16) from %fixed-stack.0, align 4)
- %4:gpr(s16) = G_UDIV %0, %1
- $ax = COPY %4(s16)
- RET 0, implicit $ax
-
-...
----
-name: test_udiv_i32
-alignment: 16
-exposesReturnsTwice: false
-legalized: true
-regBankSelected: true
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr, preferred-register: '' }
- - { id: 1, class: gpr, preferred-register: '' }
- - { id: 2, class: gpr, preferred-register: '' }
- - { id: 3, class: gpr, preferred-register: '' }
- - { id: 4, class: gpr, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 4
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
- - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 4, alignment: 16, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- ; CHECK-LABEL: name: test_udiv_i32
- ; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load (s32) from %fixed-stack.0)
- ; CHECK: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (invariant load (s32) from %fixed-stack.1, align 16)
- ; CHECK: $eax = COPY [[MOV32rm]]
- ; CHECK: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
- ; CHECK: $edx = COPY [[MOV32r0_]]
- ; CHECK: DIV32r [[MOV32rm1]], implicit-def $eax, implicit-def $edx, implicit-def $eflags, implicit $eax, implicit $edx
- ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $eax
- ; CHECK: $eax = COPY [[COPY]]
- ; CHECK: RET 0, implicit $eax
- %2:gpr(p0) = G_FRAME_INDEX %fixed-stack.1
- %0:gpr(s32) = G_LOAD %2(p0) :: (invariant load (s32) from %fixed-stack.1, align 4)
- %3:gpr(p0) = G_FRAME_INDEX %fixed-stack.0
- %1:gpr(s32) = G_LOAD %3(p0) :: (invariant load (s32) from %fixed-stack.0, align 16)
- %4:gpr(s32) = G_UDIV %0, %1
- $eax = COPY %4(s32)
- RET 0, implicit $eax
-
-...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-select-urem.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-select-urem.mir
deleted file mode 100644
index 23d2892ad91104..00000000000000
--- a/llvm/test/CodeGen/X86/GlobalISel/x86-select-urem.mir
+++ /dev/null
@@ -1,215 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=i386-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
-
---- |
- ; ModuleID = 'urem.ll'
- source_filename = "urem.ll"
- target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
- target triple = "i386--linux-gnu"
-
- define i8 @test_urem_i8(i8 %arg1, i8 %arg2) {
- %res = urem i8 %arg1, %arg2
- ret i8 %res
- }
-
- define i16 @test_urem_i16(i16 %arg1, i16 %arg2) {
- %res = urem i16 %arg1, %arg2
- ret i16 %res
- }
-
- define i32 @test_urem_i32(i32 %arg1, i32 %arg2) {
- %res = urem i32 %arg1, %arg2
- ret i32 %res
- }
-
-...
----
-name: test_urem_i8
-alignment: 16
-exposesReturnsTwice: false
-legalized: true
-regBankSelected: true
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr, preferred-register: '' }
- - { id: 1, class: gpr, preferred-register: '' }
- - { id: 2, class: gpr, preferred-register: '' }
- - { id: 3, class: gpr, preferred-register: '' }
- - { id: 4, class: gpr, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 4
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
- - { id: 0, type: default, offset: 4, size: 1, alignment: 4, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 1, alignment: 16, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- ; CHECK-LABEL: name: test_urem_i8
- ; CHECK: [[MOV8rm:%[0-9]+]]:gr8 = MOV8rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load (s8) from %fixed-stack.0, align 16)
- ; CHECK: [[MOV8rm1:%[0-9]+]]:gr8 = MOV8rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (invariant load (s8) from %fixed-stack.1, align 4)
- ; CHECK: $ax = MOVZX16rr8 [[MOV8rm]]
- ; CHECK: DIV8r [[MOV8rm1]], implicit-def $al, implicit-def $ah, implicit-def $eflags, implicit $ax
- ; CHECK: [[COPY:%[0-9]+]]:gr8 = COPY $ah
- ; CHECK: $al = COPY [[COPY]]
- ; CHECK: RET 0, implicit $al
- %2:gpr(p0) = G_FRAME_INDEX %fixed-stack.1
- %0:gpr(s8) = G_LOAD %2(p0) :: (invariant load (s8) from %fixed-stack.1, align 16)
- %3:gpr(p0) = G_FRAME_INDEX %fixed-stack.0
- %1:gpr(s8) = G_LOAD %3(p0) :: (invariant load (s8) from %fixed-stack.0, align 4)
- %4:gpr(s8) = G_UREM %0, %1
- $al = COPY %4(s8)
- RET 0, implicit $al
-
-...
----
-name: test_urem_i16
-alignment: 16
-exposesReturnsTwice: false
-legalized: true
-regBankSelected: true
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr, preferred-register: '' }
- - { id: 1, class: gpr, preferred-register: '' }
- - { id: 2, class: gpr, preferred-register: '' }
- - { id: 3, class: gpr, preferred-register: '' }
- - { id: 4, class: gpr, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 4
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
- - { id: 0, type: default, offset: 4, size: 2, alignment: 4, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 2, alignment: 16, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- ; CHECK-LABEL: name: test_urem_i16
- ; CHECK: [[MOV16rm:%[0-9]+]]:gr16 = MOV16rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load (s16) from %fixed-stack.0, align 16)
- ; CHECK: [[MOV16rm1:%[0-9]+]]:gr16 = MOV16rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (invariant load (s16) from %fixed-stack.1, align 4)
- ; CHECK: $ax = COPY [[MOV16rm]]
- ; CHECK: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
- ; CHECK: $dx = COPY [[MOV32r0_]].sub_16bit
- ; CHECK: DIV16r [[MOV16rm1]], implicit-def $ax, implicit-def $dx, implicit-def $eflags, implicit $ax, implicit $dx
- ; CHECK: [[COPY:%[0-9]+]]:gr16 = COPY $dx
- ; CHECK: $ax = COPY [[COPY]]
- ; CHECK: RET 0, implicit $ax
- %2:gpr(p0) = G_FRAME_INDEX %fixed-stack.1
- %0:gpr(s16) = G_LOAD %2(p0) :: (invariant load (s16) from %fixed-stack.1, align 16)
- %3:gpr(p0) = G_FRAME_INDEX %fixed-stack.0
- %1:gpr(s16) = G_LOAD %3(p0) :: (invariant load (s16) from %fixed-stack.0, align 4)
- %4:gpr(s16) = G_UREM %0, %1
- $ax = COPY %4(s16)
- RET 0, implicit $ax
-
-...
----
-name: test_urem_i32
-alignment: 16
-exposesReturnsTwice: false
-legalized: true
-regBankSelected: true
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr, preferred-register: '' }
- - { id: 1, class: gpr, preferred-register: '' }
- - { id: 2, class: gpr, preferred-register: '' }
- - { id: 3, class: gpr, preferred-register: '' }
- - { id: 4, class: gpr, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 4
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
- - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 4, alignment: 16, stack-id: default,
- isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- ; CHECK-LABEL: name: test_urem_i32
- ; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load (s32) from %fixed-stack.0, align 16)
- ; CHECK: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (invariant load (s32) from %fixed-stack.1)
- ; CHECK: $eax = COPY [[MOV32rm]]
- ; CHECK: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
- ; CHECK: $edx = COPY [[MOV32r0_]]
- ; CHECK: DIV32r [[MOV32rm1]], implicit-def $eax, implicit-def $edx, implicit-def $eflags, implicit $eax, implicit $edx
- ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edx
- ; CHECK: $eax = COPY [[COPY]]
- ; CHECK: RET 0, implicit $eax
- %2:gpr(p0) = G_FRAME_INDEX %fixed-stack.1
- %0:gpr(s32) = G_LOAD %2(p0) :: (invariant load (s32) from %fixed-stack.1, align 16)
- %3:gpr(p0) = G_FRAME_INDEX %fixed-stack.0
- %1:gpr(s32) = G_LOAD %3(p0) :: (invariant load (s32) from %fixed-stack.0, align 4)
- %4:gpr(s32) = G_UREM %0, %1
- $eax = COPY %4(s32)
- RET 0, implicit $eax
-
-...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-sdiv.mir b/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-sdiv.mir
deleted file mode 100644
index faccc3750c806e..00000000000000
--- a/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-sdiv.mir
+++ /dev/null
@@ -1,145 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
-
---- |
- ; ModuleID = 'sdiv.ll'
- source_filename = "sdiv.ll"
- target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-
- define i8 @test_sdiv_i8(i8 %arg1, i8 %arg2) {
- %res = sdiv i8 %arg1, %arg2
- ret i8 %res
- }
-
- define i16 @test_sdiv_i16(i16 %arg1, i16 %arg2) {
- %res = sdiv i16 %arg1, %arg2
- ret i16 %res
- }
-
- define i32 @test_sdiv_i32(i32 %arg1, i32 %arg2) {
- %res = sdiv i32 %arg1, %arg2
- ret i32 %res
- }
-
- define i64 @test_sdiv_i64(i64 %arg1, i64 %arg2) {
- %res = sdiv i64 %arg1, %arg2
- ret i64 %res
- }
-
-...
----
-name: test_sdiv_i8
-alignment: 16
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _ }
- - { id: 1, class: _ }
- - { id: 2, class: _ }
- - { id: 3, class: _ }
- - { id: 4, class: _ }
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_sdiv_i8
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
- ; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
- ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
- ; CHECK: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
- ; CHECK: [[SDIV:%[0-9]+]]:_(s8) = G_SDIV [[TRUNC]], [[TRUNC1]]
- ; CHECK: $al = COPY [[SDIV]](s8)
- ; CHECK: RET 0, implicit $al
- %2:_(s32) = COPY $edi
- %0:_(s8) = G_TRUNC %2(s32)
- %3:_(s32) = COPY $esi
- %1:_(s8) = G_TRUNC %3(s32)
- %4:_(s8) = G_SDIV %0, %1
- $al = COPY %4(s8)
- RET 0, implicit $al
-
-...
----
-name: test_sdiv_i16
-alignment: 16
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _ }
- - { id: 1, class: _ }
- - { id: 2, class: _ }
- - { id: 3, class: _ }
- - { id: 4, class: _ }
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_sdiv_i16
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
- ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
- ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
- ; CHECK: [[SDIV:%[0-9]+]]:_(s16) = G_SDIV [[TRUNC]], [[TRUNC1]]
- ; CHECK: $ax = COPY [[SDIV]](s16)
- ; CHECK: RET 0, implicit $ax
- %2:_(s32) = COPY $edi
- %0:_(s16) = G_TRUNC %2(s32)
- %3:_(s32) = COPY $esi
- %1:_(s16) = G_TRUNC %3(s32)
- %4:_(s16) = G_SDIV %0, %1
- $ax = COPY %4(s16)
- RET 0, implicit $ax
-
-...
----
-name: test_sdiv_i32
-alignment: 16
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _ }
- - { id: 1, class: _ }
- - { id: 2, class: _ }
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_sdiv_i32
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
- ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
- ; CHECK: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[COPY]], [[COPY1]]
- ; CHECK: $eax = COPY [[SDIV]](s32)
- ; CHECK: RET 0, implicit $eax
- %0:_(s32) = COPY $edi
- %1:_(s32) = COPY $esi
- %2:_(s32) = G_SDIV %0, %1
- $eax = COPY %2(s32)
- RET 0, implicit $eax
-
-...
----
-name: test_sdiv_i64
-alignment: 16
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _ }
- - { id: 1, class: _ }
- - { id: 2, class: _ }
-body: |
- bb.1 (%ir-block.0):
- liveins: $rdi, $rsi
-
- ; CHECK-LABEL: name: test_sdiv_i64
- ; CHECK: liveins: $rdi, $rsi
- ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $rdi
- ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $rsi
- ; CHECK: [[SDIV:%[0-9]+]]:_(s64) = G_SDIV [[COPY]], [[COPY1]]
- ; CHECK: $rax = COPY [[SDIV]](s64)
- ; CHECK: RET 0, implicit $rax
- %0:_(s64) = COPY $rdi
- %1:_(s64) = COPY $rsi
- %2:_(s64) = G_SDIV %0, %1
- $rax = COPY %2(s64)
- RET 0, implicit $rax
-
-...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-srem.mir b/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-srem.mir
deleted file mode 100644
index f02442f2b8501e..00000000000000
--- a/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-srem.mir
+++ /dev/null
@@ -1,253 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
-
---- |
- ; ModuleID = 'srem.ll'
- source_filename = "srem.ll"
- target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-
- define i8 @test_srem_i8(i8 %arg1, i8 %arg2) {
- %res = srem i8 %arg1, %arg2
- ret i8 %res
- }
-
- define i16 @test_srem_i16(i16 %arg1, i16 %arg2) {
- %res = srem i16 %arg1, %arg2
- ret i16 %res
- }
-
- define i32 @test_srem_i32(i32 %arg1, i32 %arg2) {
- %res = srem i32 %arg1, %arg2
- ret i32 %res
- }
-
- define i64 @test_srem_i64(i64 %arg1, i64 %arg2) {
- %res = srem i64 %arg1, %arg2
- ret i64 %res
- }
-
-...
----
-name: test_srem_i8
-alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
- - { id: 2, class: _, preferred-register: '' }
- - { id: 3, class: _, preferred-register: '' }
- - { id: 4, class: _, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_srem_i8
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
- ; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
- ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
- ; CHECK: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
- ; CHECK: [[SREM:%[0-9]+]]:_(s8) = G_SREM [[TRUNC]], [[TRUNC1]]
- ; CHECK: $al = COPY [[SREM]](s8)
- ; CHECK: RET 0, implicit $al
- %2:_(s32) = COPY $edi
- %0:_(s8) = G_TRUNC %2(s32)
- %3:_(s32) = COPY $esi
- %1:_(s8) = G_TRUNC %3(s32)
- %4:_(s8) = G_SREM %0, %1
- $al = COPY %4(s8)
- RET 0, implicit $al
-
-...
----
-name: test_srem_i16
-alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
- - { id: 2, class: _, preferred-register: '' }
- - { id: 3, class: _, preferred-register: '' }
- - { id: 4, class: _, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_srem_i16
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
- ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
- ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
- ; CHECK: [[SREM:%[0-9]+]]:_(s16) = G_SREM [[TRUNC]], [[TRUNC1]]
- ; CHECK: $ax = COPY [[SREM]](s16)
- ; CHECK: RET 0, implicit $ax
- %2:_(s32) = COPY $edi
- %0:_(s16) = G_TRUNC %2(s32)
- %3:_(s32) = COPY $esi
- %1:_(s16) = G_TRUNC %3(s32)
- %4:_(s16) = G_SREM %0, %1
- $ax = COPY %4(s16)
- RET 0, implicit $ax
-
-...
----
-name: test_srem_i32
-alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
- - { id: 2, class: _, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_srem_i32
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
- ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
- ; CHECK: [[SREM:%[0-9]+]]:_(s32) = G_SREM [[COPY]], [[COPY1]]
- ; CHECK: $eax = COPY [[SREM]](s32)
- ; CHECK: RET 0, implicit $eax
- %0:_(s32) = COPY $edi
- %1:_(s32) = COPY $esi
- %2:_(s32) = G_SREM %0, %1
- $eax = COPY %2(s32)
- RET 0, implicit $eax
-
-...
----
-name: test_srem_i64
-alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
- - { id: 2, class: _, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $rdi, $rsi
-
- ; CHECK-LABEL: name: test_srem_i64
- ; CHECK: liveins: $rdi, $rsi
- ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $rdi
- ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $rsi
- ; CHECK: [[SREM:%[0-9]+]]:_(s64) = G_SREM [[COPY]], [[COPY1]]
- ; CHECK: $rax = COPY [[SREM]](s64)
- ; CHECK: RET 0, implicit $rax
- %0:_(s64) = COPY $rdi
- %1:_(s64) = COPY $rsi
- %2:_(s64) = G_SREM %0, %1
- $rax = COPY %2(s64)
- RET 0, implicit $rax
-
-...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-udiv.mir b/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-udiv.mir
deleted file mode 100644
index 35073e2bcb1b1c..00000000000000
--- a/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-udiv.mir
+++ /dev/null
@@ -1,253 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
-
---- |
- ; ModuleID = 'udiv.ll'
- source_filename = "udiv.ll"
- target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-
- define i8 @test_udiv_i8(i8 %arg1, i8 %arg2) {
- %res = udiv i8 %arg1, %arg2
- ret i8 %res
- }
-
- define i16 @test_udiv_i16(i16 %arg1, i16 %arg2) {
- %res = udiv i16 %arg1, %arg2
- ret i16 %res
- }
-
- define i32 @test_udiv_i32(i32 %arg1, i32 %arg2) {
- %res = udiv i32 %arg1, %arg2
- ret i32 %res
- }
-
- define i64 @test_udiv_i64(i64 %arg1, i64 %arg2) {
- %res = udiv i64 %arg1, %arg2
- ret i64 %res
- }
-
-...
----
-name: test_udiv_i8
-alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
- - { id: 2, class: _, preferred-register: '' }
- - { id: 3, class: _, preferred-register: '' }
- - { id: 4, class: _, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_udiv_i8
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
- ; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
- ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
- ; CHECK: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
- ; CHECK: [[UDIV:%[0-9]+]]:_(s8) = G_UDIV [[TRUNC]], [[TRUNC1]]
- ; CHECK: $al = COPY [[UDIV]](s8)
- ; CHECK: RET 0, implicit $al
- %2:_(s32) = COPY $edi
- %0:_(s8) = G_TRUNC %2(s32)
- %3:_(s32) = COPY $esi
- %1:_(s8) = G_TRUNC %3(s32)
- %4:_(s8) = G_UDIV %0, %1
- $al = COPY %4(s8)
- RET 0, implicit $al
-
-...
----
-name: test_udiv_i16
-alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
- - { id: 2, class: _, preferred-register: '' }
- - { id: 3, class: _, preferred-register: '' }
- - { id: 4, class: _, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_udiv_i16
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
- ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
- ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
- ; CHECK: [[UDIV:%[0-9]+]]:_(s16) = G_UDIV [[TRUNC]], [[TRUNC1]]
- ; CHECK: $ax = COPY [[UDIV]](s16)
- ; CHECK: RET 0, implicit $ax
- %2:_(s32) = COPY $edi
- %0:_(s16) = G_TRUNC %2(s32)
- %3:_(s32) = COPY $esi
- %1:_(s16) = G_TRUNC %3(s32)
- %4:_(s16) = G_UDIV %0, %1
- $ax = COPY %4(s16)
- RET 0, implicit $ax
-
-...
----
-name: test_udiv_i32
-alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
- - { id: 2, class: _, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_udiv_i32
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
- ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
- ; CHECK: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[COPY]], [[COPY1]]
- ; CHECK: $eax = COPY [[UDIV]](s32)
- ; CHECK: RET 0, implicit $eax
- %0:_(s32) = COPY $edi
- %1:_(s32) = COPY $esi
- %2:_(s32) = G_UDIV %0, %1
- $eax = COPY %2(s32)
- RET 0, implicit $eax
-
-...
----
-name: test_udiv_i64
-alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
- - { id: 2, class: _, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $rdi, $rsi
-
- ; CHECK-LABEL: name: test_udiv_i64
- ; CHECK: liveins: $rdi, $rsi
- ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $rdi
- ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $rsi
- ; CHECK: [[UDIV:%[0-9]+]]:_(s64) = G_UDIV [[COPY]], [[COPY1]]
- ; CHECK: $rax = COPY [[UDIV]](s64)
- ; CHECK: RET 0, implicit $rax
- %0:_(s64) = COPY $rdi
- %1:_(s64) = COPY $rsi
- %2:_(s64) = G_UDIV %0, %1
- $rax = COPY %2(s64)
- RET 0, implicit $rax
-
-...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-urem.mir b/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-urem.mir
deleted file mode 100644
index c0ca5ae74fc31f..00000000000000
--- a/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-urem.mir
+++ /dev/null
@@ -1,253 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
-
---- |
- ; ModuleID = 'urem.ll'
- source_filename = "urem.ll"
- target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-
- define i8 @test_urem_i8(i8 %arg1, i8 %arg2) {
- %res = urem i8 %arg1, %arg2
- ret i8 %res
- }
-
- define i16 @test_urem_i16(i16 %arg1, i16 %arg2) {
- %res = urem i16 %arg1, %arg2
- ret i16 %res
- }
-
- define i32 @test_urem_i32(i32 %arg1, i32 %arg2) {
- %res = urem i32 %arg1, %arg2
- ret i32 %res
- }
-
- define i64 @test_urem_i64(i64 %arg1, i64 %arg2) {
- %res = urem i64 %arg1, %arg2
- ret i64 %res
- }
-
-...
----
-name: test_urem_i8
-alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
- - { id: 2, class: _, preferred-register: '' }
- - { id: 3, class: _, preferred-register: '' }
- - { id: 4, class: _, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_urem_i8
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
- ; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
- ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
- ; CHECK: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
- ; CHECK: [[UREM:%[0-9]+]]:_(s8) = G_UREM [[TRUNC]], [[TRUNC1]]
- ; CHECK: $al = COPY [[UREM]](s8)
- ; CHECK: RET 0, implicit $al
- %2:_(s32) = COPY $edi
- %0:_(s8) = G_TRUNC %2(s32)
- %3:_(s32) = COPY $esi
- %1:_(s8) = G_TRUNC %3(s32)
- %4:_(s8) = G_UREM %0, %1
- $al = COPY %4(s8)
- RET 0, implicit $al
-
-...
----
-name: test_urem_i16
-alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
- - { id: 2, class: _, preferred-register: '' }
- - { id: 3, class: _, preferred-register: '' }
- - { id: 4, class: _, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_urem_i16
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
- ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
- ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
- ; CHECK: [[UREM:%[0-9]+]]:_(s16) = G_UREM [[TRUNC]], [[TRUNC1]]
- ; CHECK: $ax = COPY [[UREM]](s16)
- ; CHECK: RET 0, implicit $ax
- %2:_(s32) = COPY $edi
- %0:_(s16) = G_TRUNC %2(s32)
- %3:_(s32) = COPY $esi
- %1:_(s16) = G_TRUNC %3(s32)
- %4:_(s16) = G_UREM %0, %1
- $ax = COPY %4(s16)
- RET 0, implicit $ax
-
-...
----
-name: test_urem_i32
-alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
- - { id: 2, class: _, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_urem_i32
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
- ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
- ; CHECK: [[UREM:%[0-9]+]]:_(s32) = G_UREM [[COPY]], [[COPY1]]
- ; CHECK: $eax = COPY [[UREM]](s32)
- ; CHECK: RET 0, implicit $eax
- %0:_(s32) = COPY $edi
- %1:_(s32) = COPY $esi
- %2:_(s32) = G_UREM %0, %1
- $eax = COPY %2(s32)
- RET 0, implicit $eax
-
-...
----
-name: test_urem_i64
-alignment: 16
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: _, preferred-register: '' }
- - { id: 1, class: _, preferred-register: '' }
- - { id: 2, class: _, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $rdi, $rsi
-
- ; CHECK-LABEL: name: test_urem_i64
- ; CHECK: liveins: $rdi, $rsi
- ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $rdi
- ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $rsi
- ; CHECK: [[UREM:%[0-9]+]]:_(s64) = G_UREM [[COPY]], [[COPY1]]
- ; CHECK: $rax = COPY [[UREM]](s64)
- ; CHECK: RET 0, implicit $rax
- %0:_(s64) = COPY $rdi
- %1:_(s64) = COPY $rsi
- %2:_(s64) = G_UREM %0, %1
- $rax = COPY %2(s64)
- RET 0, implicit $rax
-
-...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-sdiv.mir b/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-sdiv.mir
deleted file mode 100644
index d3a1608be52a1b..00000000000000
--- a/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-sdiv.mir
+++ /dev/null
@@ -1,164 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
-
---- |
- ; ModuleID = 'sdiv.ll'
- source_filename = "sdiv.ll"
- target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-
- define i8 @test_sdiv_i8(i8 %arg1, i8 %arg2) {
- %res = sdiv i8 %arg1, %arg2
- ret i8 %res
- }
-
- define i16 @test_sdiv_i16(i16 %arg1, i16 %arg2) {
- %res = sdiv i16 %arg1, %arg2
- ret i16 %res
- }
-
- define i32 @test_sdiv_i32(i32 %arg1, i32 %arg2) {
- %res = sdiv i32 %arg1, %arg2
- ret i32 %res
- }
-
- define i64 @test_sdiv_i64(i64 %arg1, i64 %arg2) {
- %res = sdiv i64 %arg1, %arg2
- ret i64 %res
- }
-
-...
----
-name: test_sdiv_i8
-alignment: 16
-legalized: true
-regBankSelected: true
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr }
- - { id: 1, class: gpr }
- - { id: 2, class: gpr }
- - { id: 3, class: gpr }
- - { id: 4, class: gpr }
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_sdiv_i8
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
- ; CHECK: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
- ; CHECK: [[COPY2:%[0-9]+]]:gr32 = COPY $esi
- ; CHECK: [[COPY3:%[0-9]+]]:gr8 = COPY [[COPY2]].sub_8bit
- ; CHECK: $ax = MOVSX16rr8 [[COPY1]]
- ; CHECK: IDIV8r [[COPY3]], implicit-def $al, implicit-def $ah, implicit-def $eflags, implicit $ax
- ; CHECK: [[COPY4:%[0-9]+]]:gr8 = COPY $al
- ; CHECK: $al = COPY [[COPY4]]
- ; CHECK: RET 0, implicit $al
- %2:gpr(s32) = COPY $edi
- %0:gpr(s8) = G_TRUNC %2(s32)
- %3:gpr(s32) = COPY $esi
- %1:gpr(s8) = G_TRUNC %3(s32)
- %4:gpr(s8) = G_SDIV %0, %1
- $al = COPY %4(s8)
- RET 0, implicit $al
-
-...
----
-name: test_sdiv_i16
-alignment: 16
-legalized: true
-regBankSelected: true
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr }
- - { id: 1, class: gpr }
- - { id: 2, class: gpr }
- - { id: 3, class: gpr }
- - { id: 4, class: gpr }
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_sdiv_i16
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
- ; CHECK: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit
- ; CHECK: [[COPY2:%[0-9]+]]:gr32 = COPY $esi
- ; CHECK: [[COPY3:%[0-9]+]]:gr16 = COPY [[COPY2]].sub_16bit
- ; CHECK: $ax = COPY [[COPY1]]
- ; CHECK: CWD implicit-def $ax, implicit-def $dx, implicit $ax
- ; CHECK: IDIV16r [[COPY3]], implicit-def $ax, implicit-def $dx, implicit-def $eflags, implicit $ax, implicit $dx
- ; CHECK: [[COPY4:%[0-9]+]]:gr16 = COPY $ax
- ; CHECK: $ax = COPY [[COPY4]]
- ; CHECK: RET 0, implicit $ax
- %2:gpr(s32) = COPY $edi
- %0:gpr(s16) = G_TRUNC %2(s32)
- %3:gpr(s32) = COPY $esi
- %1:gpr(s16) = G_TRUNC %3(s32)
- %4:gpr(s16) = G_SDIV %0, %1
- $ax = COPY %4(s16)
- RET 0, implicit $ax
-
-...
----
-name: test_sdiv_i32
-alignment: 16
-legalized: true
-regBankSelected: true
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr }
- - { id: 1, class: gpr }
- - { id: 2, class: gpr }
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_sdiv_i32
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
- ; CHECK: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
- ; CHECK: $eax = COPY [[COPY]]
- ; CHECK: CDQ implicit-def $eax, implicit-def $edx, implicit $eax
- ; CHECK: IDIV32r [[COPY1]], implicit-def $eax, implicit-def $edx, implicit-def $eflags, implicit $eax, implicit $edx
- ; CHECK: [[COPY2:%[0-9]+]]:gr32 = COPY $eax
- ; CHECK: $eax = COPY [[COPY2]]
- ; CHECK: RET 0, implicit $eax
- %0:gpr(s32) = COPY $edi
- %1:gpr(s32) = COPY $esi
- %2:gpr(s32) = G_SDIV %0, %1
- $eax = COPY %2(s32)
- RET 0, implicit $eax
-
-...
----
-name: test_sdiv_i64
-alignment: 16
-legalized: true
-regBankSelected: true
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr }
- - { id: 1, class: gpr }
- - { id: 2, class: gpr }
-body: |
- bb.1 (%ir-block.0):
- liveins: $rdi, $rsi
-
- ; CHECK-LABEL: name: test_sdiv_i64
- ; CHECK: liveins: $rdi, $rsi
- ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
- ; CHECK: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi
- ; CHECK: $rax = COPY [[COPY]]
- ; CHECK: CQO implicit-def $rax, implicit-def $rdx, implicit $rax
- ; CHECK: IDIV64r [[COPY1]], implicit-def $rax, implicit-def $rdx, implicit-def $eflags, implicit $rax, implicit $rdx
- ; CHECK: [[COPY2:%[0-9]+]]:gr64 = COPY $rax
- ; CHECK: $rax = COPY [[COPY2]]
- ; CHECK: RET 0, implicit $rax
- %0:gpr(s64) = COPY $rdi
- %1:gpr(s64) = COPY $rsi
- %2:gpr(s64) = G_SDIV %0, %1
- $rax = COPY %2(s64)
- RET 0, implicit $rax
-
-...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-srem.mir b/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-srem.mir
deleted file mode 100644
index 0988883145bcdf..00000000000000
--- a/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-srem.mir
+++ /dev/null
@@ -1,270 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
-
---- |
- ; ModuleID = 'srem.ll'
- source_filename = "srem.ll"
- target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-
- define i8 @test_srem_i8(i8 %arg1, i8 %arg2) {
- %res = srem i8 %arg1, %arg2
- ret i8 %res
- }
-
- define i16 @test_srem_i16(i16 %arg1, i16 %arg2) {
- %res = srem i16 %arg1, %arg2
- ret i16 %res
- }
-
- define i32 @test_srem_i32(i32 %arg1, i32 %arg2) {
- %res = srem i32 %arg1, %arg2
- ret i32 %res
- }
-
- define i64 @test_srem_i64(i64 %arg1, i64 %arg2) {
- %res = srem i64 %arg1, %arg2
- ret i64 %res
- }
-
-...
----
-name: test_srem_i8
-alignment: 16
-exposesReturnsTwice: false
-legalized: true
-regBankSelected: true
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr, preferred-register: '' }
- - { id: 1, class: gpr, preferred-register: '' }
- - { id: 2, class: gpr, preferred-register: '' }
- - { id: 3, class: gpr, preferred-register: '' }
- - { id: 4, class: gpr, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_srem_i8
- ; CHECK: liveins: $edi, $esi
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
- ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr32 = COPY $esi
- ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gr8 = COPY [[COPY2]].sub_8bit
- ; CHECK-NEXT: $ax = MOVSX16rr8 [[COPY1]]
- ; CHECK-NEXT: IDIV8r [[COPY3]], implicit-def $al, implicit-def $ah, implicit-def $eflags, implicit $ax
- ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gr16 = COPY $ax
- ; CHECK-NEXT: [[SHR16ri:%[0-9]+]]:gr16 = SHR16ri [[COPY4]], 8, implicit-def $eflags
- ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr8 = SUBREG_TO_REG 0, [[SHR16ri]], %subreg.sub_8bit
- ; CHECK-NEXT: $al = COPY [[SUBREG_TO_REG]]
- ; CHECK-NEXT: RET 0, implicit $al
- %2:gpr(s32) = COPY $edi
- %0:gpr(s8) = G_TRUNC %2(s32)
- %3:gpr(s32) = COPY $esi
- %1:gpr(s8) = G_TRUNC %3(s32)
- %4:gpr(s8) = G_SREM %0, %1
- $al = COPY %4(s8)
- RET 0, implicit $al
-
-...
----
-name: test_srem_i16
-alignment: 16
-exposesReturnsTwice: false
-legalized: true
-regBankSelected: true
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr, preferred-register: '' }
- - { id: 1, class: gpr, preferred-register: '' }
- - { id: 2, class: gpr, preferred-register: '' }
- - { id: 3, class: gpr, preferred-register: '' }
- - { id: 4, class: gpr, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_srem_i16
- ; CHECK: liveins: $edi, $esi
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit
- ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr32 = COPY $esi
- ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gr16 = COPY [[COPY2]].sub_16bit
- ; CHECK-NEXT: $ax = COPY [[COPY1]]
- ; CHECK-NEXT: CWD implicit-def $ax, implicit-def $dx, implicit $ax
- ; CHECK-NEXT: IDIV16r [[COPY3]], implicit-def $ax, implicit-def $dx, implicit-def $eflags, implicit $ax, implicit $dx
- ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gr16 = COPY $dx
- ; CHECK-NEXT: $ax = COPY [[COPY4]]
- ; CHECK-NEXT: RET 0, implicit $ax
- %2:gpr(s32) = COPY $edi
- %0:gpr(s16) = G_TRUNC %2(s32)
- %3:gpr(s32) = COPY $esi
- %1:gpr(s16) = G_TRUNC %3(s32)
- %4:gpr(s16) = G_SREM %0, %1
- $ax = COPY %4(s16)
- RET 0, implicit $ax
-
-...
----
-name: test_srem_i32
-alignment: 16
-exposesReturnsTwice: false
-legalized: true
-regBankSelected: true
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr, preferred-register: '' }
- - { id: 1, class: gpr, preferred-register: '' }
- - { id: 2, class: gpr, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_srem_i32
- ; CHECK: liveins: $edi, $esi
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
- ; CHECK-NEXT: $eax = COPY [[COPY]]
- ; CHECK-NEXT: CDQ implicit-def $eax, implicit-def $edx, implicit $eax
- ; CHECK-NEXT: IDIV32r [[COPY1]], implicit-def $eax, implicit-def $edx, implicit-def $eflags, implicit $eax, implicit $edx
- ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr32 = COPY $edx
- ; CHECK-NEXT: $eax = COPY [[COPY2]]
- ; CHECK-NEXT: RET 0, implicit $eax
- %0:gpr(s32) = COPY $edi
- %1:gpr(s32) = COPY $esi
- %2:gpr(s32) = G_SREM %0, %1
- $eax = COPY %2(s32)
- RET 0, implicit $eax
-
-...
----
-name: test_srem_i64
-alignment: 16
-exposesReturnsTwice: false
-legalized: true
-regBankSelected: true
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr, preferred-register: '' }
- - { id: 1, class: gpr, preferred-register: '' }
- - { id: 2, class: gpr, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $rdi, $rsi
-
- ; CHECK-LABEL: name: test_srem_i64
- ; CHECK: liveins: $rdi, $rsi
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi
- ; CHECK-NEXT: $rax = COPY [[COPY]]
- ; CHECK-NEXT: CQO implicit-def $rax, implicit-def $rdx, implicit $rax
- ; CHECK-NEXT: IDIV64r [[COPY1]], implicit-def $rax, implicit-def $rdx, implicit-def $eflags, implicit $rax, implicit $rdx
- ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr64 = COPY $rdx
- ; CHECK-NEXT: $rax = COPY [[COPY2]]
- ; CHECK-NEXT: RET 0, implicit $rax
- %0:gpr(s64) = COPY $rdi
- %1:gpr(s64) = COPY $rsi
- %2:gpr(s64) = G_SREM %0, %1
- $rax = COPY %2(s64)
- RET 0, implicit $rax
-
-...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-udiv.mir b/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-udiv.mir
deleted file mode 100644
index 71c03fd6e28fd1..00000000000000
--- a/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-udiv.mir
+++ /dev/null
@@ -1,267 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
-
---- |
- ; ModuleID = 'udiv.ll'
- source_filename = "udiv.ll"
- target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-
- define i8 @test_udiv_i8(i8 %arg1, i8 %arg2) {
- %res = udiv i8 %arg1, %arg2
- ret i8 %res
- }
-
- define i16 @test_udiv_i16(i16 %arg1, i16 %arg2) {
- %res = udiv i16 %arg1, %arg2
- ret i16 %res
- }
-
- define i32 @test_udiv_i32(i32 %arg1, i32 %arg2) {
- %res = udiv i32 %arg1, %arg2
- ret i32 %res
- }
-
- define i64 @test_udiv_i64(i64 %arg1, i64 %arg2) {
- %res = udiv i64 %arg1, %arg2
- ret i64 %res
- }
-
-...
----
-name: test_udiv_i8
-alignment: 16
-exposesReturnsTwice: false
-legalized: true
-regBankSelected: true
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr, preferred-register: '' }
- - { id: 1, class: gpr, preferred-register: '' }
- - { id: 2, class: gpr, preferred-register: '' }
- - { id: 3, class: gpr, preferred-register: '' }
- - { id: 4, class: gpr, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_udiv_i8
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
- ; CHECK: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
- ; CHECK: [[COPY2:%[0-9]+]]:gr32 = COPY $esi
- ; CHECK: [[COPY3:%[0-9]+]]:gr8 = COPY [[COPY2]].sub_8bit
- ; CHECK: $ax = MOVZX16rr8 [[COPY1]]
- ; CHECK: DIV8r [[COPY3]], implicit-def $al, implicit-def $ah, implicit-def $eflags, implicit $ax
- ; CHECK: [[COPY4:%[0-9]+]]:gr8 = COPY $al
- ; CHECK: $al = COPY [[COPY4]]
- ; CHECK: RET 0, implicit $al
- %2:gpr(s32) = COPY $edi
- %0:gpr(s8) = G_TRUNC %2(s32)
- %3:gpr(s32) = COPY $esi
- %1:gpr(s8) = G_TRUNC %3(s32)
- %4:gpr(s8) = G_UDIV %0, %1
- $al = COPY %4(s8)
- RET 0, implicit $al
-
-...
----
-name: test_udiv_i16
-alignment: 16
-exposesReturnsTwice: false
-legalized: true
-regBankSelected: true
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr, preferred-register: '' }
- - { id: 1, class: gpr, preferred-register: '' }
- - { id: 2, class: gpr, preferred-register: '' }
- - { id: 3, class: gpr, preferred-register: '' }
- - { id: 4, class: gpr, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_udiv_i16
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
- ; CHECK: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit
- ; CHECK: [[COPY2:%[0-9]+]]:gr32 = COPY $esi
- ; CHECK: [[COPY3:%[0-9]+]]:gr16 = COPY [[COPY2]].sub_16bit
- ; CHECK: $ax = COPY [[COPY1]]
- ; CHECK: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
- ; CHECK: $dx = COPY [[MOV32r0_]].sub_16bit
- ; CHECK: DIV16r [[COPY3]], implicit-def $ax, implicit-def $dx, implicit-def $eflags, implicit $ax, implicit $dx
- ; CHECK: [[COPY4:%[0-9]+]]:gr16 = COPY $ax
- ; CHECK: $ax = COPY [[COPY4]]
- ; CHECK: RET 0, implicit $ax
- %2:gpr(s32) = COPY $edi
- %0:gpr(s16) = G_TRUNC %2(s32)
- %3:gpr(s32) = COPY $esi
- %1:gpr(s16) = G_TRUNC %3(s32)
- %4:gpr(s16) = G_UDIV %0, %1
- $ax = COPY %4(s16)
- RET 0, implicit $ax
-
-...
----
-name: test_udiv_i32
-alignment: 16
-exposesReturnsTwice: false
-legalized: true
-regBankSelected: true
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr, preferred-register: '' }
- - { id: 1, class: gpr, preferred-register: '' }
- - { id: 2, class: gpr, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_udiv_i32
- ; CHECK: liveins: $edi, $esi
- ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
- ; CHECK: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
- ; CHECK: $eax = COPY [[COPY]]
- ; CHECK: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
- ; CHECK: $edx = COPY [[MOV32r0_]]
- ; CHECK: DIV32r [[COPY1]], implicit-def $eax, implicit-def $edx, implicit-def $eflags, implicit $eax, implicit $edx
- ; CHECK: [[COPY2:%[0-9]+]]:gr32 = COPY $eax
- ; CHECK: $eax = COPY [[COPY2]]
- ; CHECK: RET 0, implicit $eax
- %0:gpr(s32) = COPY $edi
- %1:gpr(s32) = COPY $esi
- %2:gpr(s32) = G_UDIV %0, %1
- $eax = COPY %2(s32)
- RET 0, implicit $eax
-
-...
----
-name: test_udiv_i64
-alignment: 16
-exposesReturnsTwice: false
-legalized: true
-regBankSelected: true
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr, preferred-register: '' }
- - { id: 1, class: gpr, preferred-register: '' }
- - { id: 2, class: gpr, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $rdi, $rsi
-
- ; CHECK-LABEL: name: test_udiv_i64
- ; CHECK: liveins: $rdi, $rsi
- ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
- ; CHECK: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi
- ; CHECK: $rax = COPY [[COPY]]
- ; CHECK: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
- ; CHECK: $rdx = SUBREG_TO_REG 0, [[MOV32r0_]], %subreg.sub_32bit
- ; CHECK: DIV64r [[COPY1]], implicit-def $rax, implicit-def $rdx, implicit-def $eflags, implicit $rax, implicit $rdx
- ; CHECK: [[COPY2:%[0-9]+]]:gr64 = COPY $rax
- ; CHECK: $rax = COPY [[COPY2]]
- ; CHECK: RET 0, implicit $rax
- %0:gpr(s64) = COPY $rdi
- %1:gpr(s64) = COPY $rsi
- %2:gpr(s64) = G_UDIV %0, %1
- $rax = COPY %2(s64)
- RET 0, implicit $rax
-
-...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-urem.mir b/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-urem.mir
deleted file mode 100644
index 657cf499949734..00000000000000
--- a/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-urem.mir
+++ /dev/null
@@ -1,273 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
-
---- |
- ; ModuleID = 'urem.ll'
- source_filename = "urem.ll"
- target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-
- define i8 @test_urem_i8(i8 %arg1, i8 %arg2) {
- %res = urem i8 %arg1, %arg2
- ret i8 %res
- }
-
- define i16 @test_urem_i16(i16 %arg1, i16 %arg2) {
- %res = urem i16 %arg1, %arg2
- ret i16 %res
- }
-
- define i32 @test_urem_i32(i32 %arg1, i32 %arg2) {
- %res = urem i32 %arg1, %arg2
- ret i32 %res
- }
-
- define i64 @test_urem_i64(i64 %arg1, i64 %arg2) {
- %res = urem i64 %arg1, %arg2
- ret i64 %res
- }
-
-...
----
-name: test_urem_i8
-alignment: 16
-exposesReturnsTwice: false
-legalized: true
-regBankSelected: true
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr, preferred-register: '' }
- - { id: 1, class: gpr, preferred-register: '' }
- - { id: 2, class: gpr, preferred-register: '' }
- - { id: 3, class: gpr, preferred-register: '' }
- - { id: 4, class: gpr, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_urem_i8
- ; CHECK: liveins: $edi, $esi
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
- ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr32 = COPY $esi
- ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gr8 = COPY [[COPY2]].sub_8bit
- ; CHECK-NEXT: $ax = MOVZX16rr8 [[COPY1]]
- ; CHECK-NEXT: DIV8r [[COPY3]], implicit-def $al, implicit-def $ah, implicit-def $eflags, implicit $ax
- ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gr16 = COPY $ax
- ; CHECK-NEXT: [[SHR16ri:%[0-9]+]]:gr16 = SHR16ri [[COPY4]], 8, implicit-def $eflags
- ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr8 = SUBREG_TO_REG 0, [[SHR16ri]], %subreg.sub_8bit
- ; CHECK-NEXT: $al = COPY [[SUBREG_TO_REG]]
- ; CHECK-NEXT: RET 0, implicit $al
- %2:gpr(s32) = COPY $edi
- %0:gpr(s8) = G_TRUNC %2(s32)
- %3:gpr(s32) = COPY $esi
- %1:gpr(s8) = G_TRUNC %3(s32)
- %4:gpr(s8) = G_UREM %0, %1
- $al = COPY %4(s8)
- RET 0, implicit $al
-
-...
----
-name: test_urem_i16
-alignment: 16
-exposesReturnsTwice: false
-legalized: true
-regBankSelected: true
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr, preferred-register: '' }
- - { id: 1, class: gpr, preferred-register: '' }
- - { id: 2, class: gpr, preferred-register: '' }
- - { id: 3, class: gpr, preferred-register: '' }
- - { id: 4, class: gpr, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_urem_i16
- ; CHECK: liveins: $edi, $esi
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit
- ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr32 = COPY $esi
- ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gr16 = COPY [[COPY2]].sub_16bit
- ; CHECK-NEXT: $ax = COPY [[COPY1]]
- ; CHECK-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
- ; CHECK-NEXT: $dx = COPY [[MOV32r0_]].sub_16bit
- ; CHECK-NEXT: DIV16r [[COPY3]], implicit-def $ax, implicit-def $dx, implicit-def $eflags, implicit $ax, implicit $dx
- ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gr16 = COPY $dx
- ; CHECK-NEXT: $ax = COPY [[COPY4]]
- ; CHECK-NEXT: RET 0, implicit $ax
- %2:gpr(s32) = COPY $edi
- %0:gpr(s16) = G_TRUNC %2(s32)
- %3:gpr(s32) = COPY $esi
- %1:gpr(s16) = G_TRUNC %3(s32)
- %4:gpr(s16) = G_UREM %0, %1
- $ax = COPY %4(s16)
- RET 0, implicit $ax
-
-...
----
-name: test_urem_i32
-alignment: 16
-exposesReturnsTwice: false
-legalized: true
-regBankSelected: true
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr, preferred-register: '' }
- - { id: 1, class: gpr, preferred-register: '' }
- - { id: 2, class: gpr, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $edi, $esi
-
- ; CHECK-LABEL: name: test_urem_i32
- ; CHECK: liveins: $edi, $esi
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
- ; CHECK-NEXT: $eax = COPY [[COPY]]
- ; CHECK-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
- ; CHECK-NEXT: $edx = COPY [[MOV32r0_]]
- ; CHECK-NEXT: DIV32r [[COPY1]], implicit-def $eax, implicit-def $edx, implicit-def $eflags, implicit $eax, implicit $edx
- ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr32 = COPY $edx
- ; CHECK-NEXT: $eax = COPY [[COPY2]]
- ; CHECK-NEXT: RET 0, implicit $eax
- %0:gpr(s32) = COPY $edi
- %1:gpr(s32) = COPY $esi
- %2:gpr(s32) = G_UREM %0, %1
- $eax = COPY %2(s32)
- RET 0, implicit $eax
-
-...
----
-name: test_urem_i64
-alignment: 16
-exposesReturnsTwice: false
-legalized: true
-regBankSelected: true
-selected: false
-failedISel: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr, preferred-register: '' }
- - { id: 1, class: gpr, preferred-register: '' }
- - { id: 2, class: gpr, preferred-register: '' }
-liveins:
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.1 (%ir-block.0):
- liveins: $rdi, $rsi
-
- ; CHECK-LABEL: name: test_urem_i64
- ; CHECK: liveins: $rdi, $rsi
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi
- ; CHECK-NEXT: $rax = COPY [[COPY]]
- ; CHECK-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
- ; CHECK-NEXT: $rdx = SUBREG_TO_REG 0, [[MOV32r0_]], %subreg.sub_32bit
- ; CHECK-NEXT: DIV64r [[COPY1]], implicit-def $rax, implicit-def $rdx, implicit-def $eflags, implicit $rax, implicit $rdx
- ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr64 = COPY $rdx
- ; CHECK-NEXT: $rax = COPY [[COPY2]]
- ; CHECK-NEXT: RET 0, implicit $rax
- %0:gpr(s64) = COPY $rdi
- %1:gpr(s64) = COPY $rsi
- %2:gpr(s64) = G_UREM %0, %1
- $rax = COPY %2(s64)
- RET 0, implicit $rax
-
-...
diff --git a/llvm/test/CodeGen/X86/isel-sdiv.ll b/llvm/test/CodeGen/X86/isel-sdiv.ll
new file mode 100644
index 00000000000000..6a6b2da8dc2f8d
--- /dev/null
+++ b/llvm/test/CodeGen/X86/isel-sdiv.ll
@@ -0,0 +1,116 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -global-isel=0 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
+; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
+; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
+; RUN: llc < %s -global-isel=0 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
+; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
+; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,GISEL-X86
+
+define i8 @test_sdiv_i8(i8 %arg1, i8 %arg2) nounwind {
+; X64-LABEL: test_sdiv_i8:
+; X64: # %bb.0:
+; X64-NEXT: movsbl %dil, %eax
+; X64-NEXT: idivb %sil
+; X64-NEXT: retq
+;
+; DAG-X86-LABEL: test_sdiv_i8:
+; DAG-X86: # %bb.0:
+; DAG-X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
+; DAG-X86-NEXT: idivb {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_sdiv_i8:
+; GISEL-X86: # %bb.0:
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; GISEL-X86-NEXT: cbtw
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: idivb %cl
+; GISEL-X86-NEXT: retl
+ %ret = sdiv i8 %arg1, %arg2
+ ret i8 %ret
+}
+
+define i16 @test_sdiv_i16(i16 %arg1, i16 %arg2) nounwind {
+; X64-LABEL: test_sdiv_i16:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-NEXT: cwtd
+; X64-NEXT: idivw %si
+; X64-NEXT: retq
+;
+; DAG-X86-LABEL: test_sdiv_i16:
+; DAG-X86: # %bb.0:
+; DAG-X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; DAG-X86-NEXT: cwtd
+; DAG-X86-NEXT: idivw {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_sdiv_i16:
+; GISEL-X86: # %bb.0:
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: # kill: def $ax killed $ax killed $eax
+; GISEL-X86-NEXT: cwtd
+; GISEL-X86-NEXT: idivw %cx
+; GISEL-X86-NEXT: retl
+ %ret = sdiv i16 %arg1, %arg2
+ ret i16 %ret
+}
+
+define i32 @test_sdiv_i32(i32 %arg1, i32 %arg2) nounwind {
+; X64-LABEL: test_sdiv_i32:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: cltd
+; X64-NEXT: idivl %esi
+; X64-NEXT: retq
+;
+; X86-LABEL: test_sdiv_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cltd
+; X86-NEXT: idivl {{[0-9]+}}(%esp)
+; X86-NEXT: retl
+ %ret = sdiv i32 %arg1, %arg2
+ ret i32 %ret
+}
+
+define i64 @test_sdiv_i64(i64 %arg1, i64 %arg2) nounwind {
+; X64-LABEL: test_sdiv_i64:
+; X64: # %bb.0:
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: cqto
+; X64-NEXT: idivq %rsi
+; X64-NEXT: retq
+;
+; DAG-X86-LABEL: test_sdiv_i64:
+; DAG-X86: # %bb.0:
+; DAG-X86-NEXT: subl $12, %esp
+; DAG-X86-NEXT: pushl {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: pushl {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: pushl {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: pushl {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: calll __divdi3
+; DAG-X86-NEXT: addl $28, %esp
+; DAG-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_sdiv_i64:
+; GISEL-X86: # %bb.0:
+; GISEL-X86-NEXT: pushl %esi
+; GISEL-X86-NEXT: subl $24, %esp
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; GISEL-X86-NEXT: movl %eax, (%esp)
+; GISEL-X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: movl %edx, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: movl %esi, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: calll __divdi3
+; GISEL-X86-NEXT: addl $24, %esp
+; GISEL-X86-NEXT: popl %esi
+; GISEL-X86-NEXT: retl
+ %ret = sdiv i64 %arg1, %arg2
+ ret i64 %ret
+}
diff --git a/llvm/test/CodeGen/X86/isel-srem.ll b/llvm/test/CodeGen/X86/isel-srem.ll
new file mode 100644
index 00000000000000..56716e10a9d996
--- /dev/null
+++ b/llvm/test/CodeGen/X86/isel-srem.ll
@@ -0,0 +1,150 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -global-isel=0 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,FAST-X64
+; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,GISEL-X64
+; RUN: llc < %s -global-isel=0 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86,SDAG-X86
+; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86,FAST-X86
+; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,GISEL-X86
+
+define i8 @test_srem_i8(i8 %arg1, i8 %arg2) nounwind {
+; SDAG-X64-LABEL: test_srem_i8:
+; SDAG-X64: # %bb.0:
+; SDAG-X64-NEXT: movsbl %dil, %eax
+; SDAG-X64-NEXT: idivb %sil
+; SDAG-X64-NEXT: movsbl %ah, %eax
+; SDAG-X64-NEXT: # kill: def $al killed $al killed $eax
+; SDAG-X64-NEXT: retq
+;
+; FAST-X64-LABEL: test_srem_i8:
+; FAST-X64: # %bb.0:
+; FAST-X64-NEXT: movsbl %dil, %eax
+; FAST-X64-NEXT: idivb %sil
+; FAST-X64-NEXT: shrw $8, %ax
+; FAST-X64-NEXT: # kill: def $al killed $al killed $ax
+; FAST-X64-NEXT: retq
+;
+; GISEL-X64-LABEL: test_srem_i8:
+; GISEL-X64: # %bb.0:
+; GISEL-X64-NEXT: movsbl %dil, %eax
+; GISEL-X64-NEXT: idivb %sil
+; GISEL-X64-NEXT: shrw $8, %ax
+; GISEL-X64-NEXT: # kill: def $al killed $al killed $ax
+; GISEL-X64-NEXT: retq
+;
+; SDAG-X86-LABEL: test_srem_i8:
+; SDAG-X86: # %bb.0:
+; SDAG-X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
+; SDAG-X86-NEXT: idivb {{[0-9]+}}(%esp)
+; SDAG-X86-NEXT: movsbl %ah, %eax
+; SDAG-X86-NEXT: # kill: def $al killed $al killed $eax
+; SDAG-X86-NEXT: retl
+;
+; FAST-X86-LABEL: test_srem_i8:
+; FAST-X86: # %bb.0:
+; FAST-X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
+; FAST-X86-NEXT: idivb {{[0-9]+}}(%esp)
+; FAST-X86-NEXT: movb %ah, %al
+; FAST-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_srem_i8:
+; GISEL-X86: # %bb.0:
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; GISEL-X86-NEXT: cbtw
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: idivb %cl
+; GISEL-X86-NEXT: movb %ah, %al
+; GISEL-X86-NEXT: retl
+ %ret = srem i8 %arg1, %arg2
+ ret i8 %ret
+}
+
+define i16 @test_srem_i16(i16 %arg1, i16 %arg2) nounwind {
+; X64-LABEL: test_srem_i16:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-NEXT: cwtd
+; X64-NEXT: idivw %si
+; X64-NEXT: movl %edx, %eax
+; X64-NEXT: retq
+;
+; DAG-X86-LABEL: test_srem_i16:
+; DAG-X86: # %bb.0:
+; DAG-X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; DAG-X86-NEXT: cwtd
+; DAG-X86-NEXT: idivw {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: movl %edx, %eax
+; DAG-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_srem_i16:
+; GISEL-X86: # %bb.0:
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: # kill: def $ax killed $ax killed $eax
+; GISEL-X86-NEXT: cwtd
+; GISEL-X86-NEXT: idivw %cx
+; GISEL-X86-NEXT: movl %edx, %eax
+; GISEL-X86-NEXT: retl
+ %ret = srem i16 %arg1, %arg2
+ ret i16 %ret
+}
+
+define i32 @test_srem_i32(i32 %arg1, i32 %arg2) nounwind {
+; X64-LABEL: test_srem_i32:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: cltd
+; X64-NEXT: idivl %esi
+; X64-NEXT: movl %edx, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: test_srem_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cltd
+; X86-NEXT: idivl {{[0-9]+}}(%esp)
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: retl
+ %ret = srem i32 %arg1, %arg2
+ ret i32 %ret
+}
+
+define i64 @test_srem_i64(i64 %arg1, i64 %arg2) nounwind {
+; X64-LABEL: test_srem_i64:
+; X64: # %bb.0:
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: cqto
+; X64-NEXT: idivq %rsi
+; X64-NEXT: movq %rdx, %rax
+; X64-NEXT: retq
+;
+; DAG-X86-LABEL: test_srem_i64:
+; DAG-X86: # %bb.0:
+; DAG-X86-NEXT: subl $12, %esp
+; DAG-X86-NEXT: pushl {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: pushl {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: pushl {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: pushl {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: calll __moddi3
+; DAG-X86-NEXT: addl $28, %esp
+; DAG-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_srem_i64:
+; GISEL-X86: # %bb.0:
+; GISEL-X86-NEXT: pushl %esi
+; GISEL-X86-NEXT: subl $24, %esp
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; GISEL-X86-NEXT: movl %eax, (%esp)
+; GISEL-X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: movl %edx, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: movl %esi, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: calll __moddi3
+; GISEL-X86-NEXT: addl $24, %esp
+; GISEL-X86-NEXT: popl %esi
+; GISEL-X86-NEXT: retl
+ %ret = srem i64 %arg1, %arg2
+ ret i64 %ret
+}
diff --git a/llvm/test/CodeGen/X86/isel-udiv.ll b/llvm/test/CodeGen/X86/isel-udiv.ll
new file mode 100644
index 00000000000000..b56b8b112fe471
--- /dev/null
+++ b/llvm/test/CodeGen/X86/isel-udiv.ll
@@ -0,0 +1,116 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -global-isel=0 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
+; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
+; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
+; RUN: llc < %s -global-isel=0 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
+; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
+; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,GISEL-X86
+
+define i8 @test_udiv_i8(i8 %arg1, i8 %arg2) nounwind {
+; X64-LABEL: test_udiv_i8:
+; X64: # %bb.0:
+; X64-NEXT: movzbl %dil, %eax
+; X64-NEXT: divb %sil
+; X64-NEXT: retq
+;
+; DAG-X86-LABEL: test_udiv_i8:
+; DAG-X86: # %bb.0:
+; DAG-X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; DAG-X86-NEXT: divb {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_udiv_i8:
+; GISEL-X86: # %bb.0:
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; GISEL-X86-NEXT: movzbl %al, %eax
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: divb %cl
+; GISEL-X86-NEXT: retl
+ %ret = udiv i8 %arg1, %arg2
+ ret i8 %ret
+}
+
+define i16 @test_udiv_i16(i16 %arg1, i16 %arg2) nounwind {
+; X64-LABEL: test_udiv_i16:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-NEXT: xorl %edx, %edx
+; X64-NEXT: divw %si
+; X64-NEXT: retq
+;
+; DAG-X86-LABEL: test_udiv_i16:
+; DAG-X86: # %bb.0:
+; DAG-X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; DAG-X86-NEXT: xorl %edx, %edx
+; DAG-X86-NEXT: divw {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_udiv_i16:
+; GISEL-X86: # %bb.0:
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: # kill: def $ax killed $ax killed $eax
+; GISEL-X86-NEXT: xorl %edx, %edx
+; GISEL-X86-NEXT: divw %cx
+; GISEL-X86-NEXT: retl
+ %ret = udiv i16 %arg1, %arg2
+ ret i16 %ret
+}
+
+define i32 @test_udiv_i32(i32 %arg1, i32 %arg2) nounwind {
+; X64-LABEL: test_udiv_i32:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: xorl %edx, %edx
+; X64-NEXT: divl %esi
+; X64-NEXT: retq
+;
+; X86-LABEL: test_udiv_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: divl {{[0-9]+}}(%esp)
+; X86-NEXT: retl
+ %ret = udiv i32 %arg1, %arg2
+ ret i32 %ret
+}
+
+define i64 @test_udiv_i64(i64 %arg1, i64 %arg2) nounwind {
+; X64-LABEL: test_udiv_i64:
+; X64: # %bb.0:
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: xorl %edx, %edx
+; X64-NEXT: divq %rsi
+; X64-NEXT: retq
+;
+; DAG-X86-LABEL: test_udiv_i64:
+; DAG-X86: # %bb.0:
+; DAG-X86-NEXT: subl $12, %esp
+; DAG-X86-NEXT: pushl {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: pushl {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: pushl {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: pushl {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: calll __udivdi3
+; DAG-X86-NEXT: addl $28, %esp
+; DAG-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_udiv_i64:
+; GISEL-X86: # %bb.0:
+; GISEL-X86-NEXT: pushl %esi
+; GISEL-X86-NEXT: subl $24, %esp
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; GISEL-X86-NEXT: movl %eax, (%esp)
+; GISEL-X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: movl %edx, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: movl %esi, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: calll __udivdi3
+; GISEL-X86-NEXT: addl $24, %esp
+; GISEL-X86-NEXT: popl %esi
+; GISEL-X86-NEXT: retl
+ %ret = udiv i64 %arg1, %arg2
+ ret i64 %ret
+}
diff --git a/llvm/test/CodeGen/X86/isel-urem.ll b/llvm/test/CodeGen/X86/isel-urem.ll
new file mode 100644
index 00000000000000..50b9c1250ff875
--- /dev/null
+++ b/llvm/test/CodeGen/X86/isel-urem.ll
@@ -0,0 +1,150 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -global-isel=0 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,FAST-X64
+; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,GISEL-X64
+; RUN: llc < %s -global-isel=0 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86,SDAG-X86
+; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86,FAST-X86
+; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,GISEL-X86
+
+define i8 @test_urem_i8(i8 %arg1, i8 %arg2) nounwind {
+; SDAG-X64-LABEL: test_urem_i8:
+; SDAG-X64: # %bb.0:
+; SDAG-X64-NEXT: movzbl %dil, %eax
+; SDAG-X64-NEXT: divb %sil
+; SDAG-X64-NEXT: movzbl %ah, %eax
+; SDAG-X64-NEXT: # kill: def $al killed $al killed $eax
+; SDAG-X64-NEXT: retq
+;
+; FAST-X64-LABEL: test_urem_i8:
+; FAST-X64: # %bb.0:
+; FAST-X64-NEXT: movzbl %dil, %eax
+; FAST-X64-NEXT: divb %sil
+; FAST-X64-NEXT: shrw $8, %ax
+; FAST-X64-NEXT: # kill: def $al killed $al killed $ax
+; FAST-X64-NEXT: retq
+;
+; GISEL-X64-LABEL: test_urem_i8:
+; GISEL-X64: # %bb.0:
+; GISEL-X64-NEXT: movzbl %dil, %eax
+; GISEL-X64-NEXT: divb %sil
+; GISEL-X64-NEXT: shrw $8, %ax
+; GISEL-X64-NEXT: # kill: def $al killed $al killed $ax
+; GISEL-X64-NEXT: retq
+;
+; SDAG-X86-LABEL: test_urem_i8:
+; SDAG-X86: # %bb.0:
+; SDAG-X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; SDAG-X86-NEXT: divb {{[0-9]+}}(%esp)
+; SDAG-X86-NEXT: movzbl %ah, %eax
+; SDAG-X86-NEXT: # kill: def $al killed $al killed $eax
+; SDAG-X86-NEXT: retl
+;
+; FAST-X86-LABEL: test_urem_i8:
+; FAST-X86: # %bb.0:
+; FAST-X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; FAST-X86-NEXT: divb {{[0-9]+}}(%esp)
+; FAST-X86-NEXT: movb %ah, %al
+; FAST-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_urem_i8:
+; GISEL-X86: # %bb.0:
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; GISEL-X86-NEXT: movzbl %al, %eax
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: divb %cl
+; GISEL-X86-NEXT: movb %ah, %al
+; GISEL-X86-NEXT: retl
+ %ret = urem i8 %arg1, %arg2
+ ret i8 %ret
+}
+
+define i16 @test_urem_i16(i16 %arg1, i16 %arg2) nounwind {
+; X64-LABEL: test_urem_i16:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-NEXT: xorl %edx, %edx
+; X64-NEXT: divw %si
+; X64-NEXT: movl %edx, %eax
+; X64-NEXT: retq
+;
+; DAG-X86-LABEL: test_urem_i16:
+; DAG-X86: # %bb.0:
+; DAG-X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; DAG-X86-NEXT: xorl %edx, %edx
+; DAG-X86-NEXT: divw {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: movl %edx, %eax
+; DAG-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_urem_i16:
+; GISEL-X86: # %bb.0:
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: # kill: def $ax killed $ax killed $eax
+; GISEL-X86-NEXT: xorl %edx, %edx
+; GISEL-X86-NEXT: divw %cx
+; GISEL-X86-NEXT: movl %edx, %eax
+; GISEL-X86-NEXT: retl
+ %ret = urem i16 %arg1, %arg2
+ ret i16 %ret
+}
+
+define i32 @test_urem_i32(i32 %arg1, i32 %arg2) nounwind {
+; X64-LABEL: test_urem_i32:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: xorl %edx, %edx
+; X64-NEXT: divl %esi
+; X64-NEXT: movl %edx, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: test_urem_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: divl {{[0-9]+}}(%esp)
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: retl
+ %ret = urem i32 %arg1, %arg2
+ ret i32 %ret
+}
+
+define i64 @test_urem_i64(i64 %arg1, i64 %arg2) nounwind {
+; X64-LABEL: test_urem_i64:
+; X64: # %bb.0:
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: xorl %edx, %edx
+; X64-NEXT: divq %rsi
+; X64-NEXT: movq %rdx, %rax
+; X64-NEXT: retq
+;
+; DAG-X86-LABEL: test_urem_i64:
+; DAG-X86: # %bb.0:
+; DAG-X86-NEXT: subl $12, %esp
+; DAG-X86-NEXT: pushl {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: pushl {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: pushl {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: pushl {{[0-9]+}}(%esp)
+; DAG-X86-NEXT: calll __umoddi3
+; DAG-X86-NEXT: addl $28, %esp
+; DAG-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_urem_i64:
+; GISEL-X86: # %bb.0:
+; GISEL-X86-NEXT: pushl %esi
+; GISEL-X86-NEXT: subl $24, %esp
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; GISEL-X86-NEXT: movl %eax, (%esp)
+; GISEL-X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: movl %edx, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: movl %esi, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT: calll __umoddi3
+; GISEL-X86-NEXT: addl $24, %esp
+; GISEL-X86-NEXT: popl %esi
+; GISEL-X86-NEXT: retl
+ %ret = urem i64 %arg1, %arg2
+ ret i64 %ret
+}
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