[llvm] [RISCV] Enable the TypePromotion pass from AArch64/ARM. (PR #81574)

[Yingwei Zheng via llvm-commits]

dtcxzyw wrote:

> The generated code isn't perfect on the lit test, but my data shows a net
dynamic instruction count improvement on spec2017 for both base and
Zba+Zbb+Zbs.

I agree.


https://github.com/llvm/llvm-project/pull/81574