[llvm] [AArch64][GlobalISel] Expand abs.v4i8 to v4i16 and abs.v2s16 to v2s32 (PR #81231)

[Madhur Amilkanthwar via llvm-commits]

madhur13490 wrote:

> Following what DAG did if it's known not to be optimal probably isn't the best. DAG would promote integers but widen floats. GlobalISel loses type information so needs to pick one to use for both. I think in the long run we might want pick one (I was originally thinking widening), and fixup the places where it doesn't work so well.
> 
> Is the falling back due to G_ANYEXT not being handled? What would it take to make that work?

Hi @davemgreen 
yes, we can confirm that it is happening due to G_ANYEXT. Indeed, support is missing in instruction selection. However, after debugging, we found that there is a mismatch in register bank. 

`G_ANYEXT on bank: FPR, expected: GPR
`
d0 is defined in FPR register bank which seems odd. fpr is further propagated through the code and thus the mismatch.
Do we want to deal with narrowing vs widening in a separate issue?



https://github.com/llvm/llvm-project/pull/81231