[llvm] [InstCombine] Simplify select if it combinated and/or/xor (PR #73362)

[via llvm-commits]

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@@ -1672,6 +1672,110 @@ static Value *foldSelectInstWithICmpConst(SelectInst &SI, ICmpInst *ICI,
   return nullptr;
 }
 
+static Instruction *foldSelectICmpEq(SelectInst &SI, ICmpInst *ICI,
+                                     InstCombinerImpl &IC) {
+  ICmpInst::Predicate Pred = ICI->getPredicate();
+  if (!ICmpInst::isEquality(Pred))
+    return nullptr;
+
+  Value *TrueVal = SI.getTrueValue();
+  Value *FalseVal = SI.getFalseValue();
+  Value *CmpLHS = ICI->getOperand(0);
+  Value *CmpRHS = ICI->getOperand(1);
+
+  if (Pred == ICmpInst::ICMP_NE) {
+    Pred = ICmpInst::ICMP_EQ;
+    std::swap(TrueVal, FalseVal);
+  }
+
+  if (!isa<BinaryOperator>(CmpLHS) || !isa<BinaryOperator>(TrueVal))
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goldsteinn wrote:

i think more precise would be to match `m_BitwiseLogic`

https://github.com/llvm/llvm-project/pull/73362