[llvm] [TTI][RISCV]Improve costs for fixed vector whole reg extract/insert. (PR #80164)

[Luke Lau via llvm-commits]

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@@ -326,6 +326,48 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind,
     switch (Kind) {
     default:
       break;
+    case TTI::SK_ExtractSubvector:
+      if (isa<FixedVectorType>(SubTp) &&
+          LT.second.getVectorElementType() != MVT::i1) {
+        unsigned SubTpRegs = getRegUsageForType(SubTp);
+        unsigned SubNumElems = NextPowerOf2(
+            divideCeil(SubTp->getElementCount().getFixedValue(), SubTpRegs));
+        // Whole vector extract - just the vector itself + (possible) vsetvli.
+        // TODO: consider adding the cost for vsetvli.
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lukel97 wrote:

Generally we've just been ignoring vsetvli costs throughout TTI, so it's probably ok to leave out the todo

https://github.com/llvm/llvm-project/pull/80164