[llvm] [GlobalISel][TableGen] Take first result for multi-output instructions (PR #81130)

Sergei Barannikov via llvm-commits llvm-commits at lists.llvm.org
Sat Feb 10 08:23:51 PST 2024


s-barannikov wrote:

@bjope 
> So I wanted to narrow it down to the specific scenario that we needed downstream (i.e. allowing additional implicit defs beside the one-and-only explicit def.

I've been having the same issue, but this patch does not help with it. Could you show how do you declare such instructions and patterns?

Here is how I do it.

An instruction is defined like this (I've omitted irrelevant pieces):
```
def ADDrf : Instruction {
  let OutOperandList = (outs GR:$rd);
  let InOperandList = (ins GR:$rs2, GR:$rs1);
  let Defs = [PSWR];
}
```

SDagISel part:
```
def NM_SDTBinOpWithFlagsOut : SDTypeProfile<2, 2, [
  SDTCisInt<0>,         // result
  SDTCisVT<1, FlagsVT>, // out flags
  SDTCisSameAs<2, 0>,   // lhs
  SDTCisSameAs<3, 0>    // rhs
]>;

def nm_add : SDNode<"NMISD::ADD", NM_SDTBinOpWithFlagsOut, [SDNPCommutative]>;

def : Pat<(nm_add i32:$lhs, i32:$rhs), (ADDrf i32:$lhs, i32:$rhs)>;
```

GISel part:
```
def G_NM_ADD : NMGenericInst {
  let OutOperandList = (outs type0:$dst, type1:$flags_out);
  let InOperandList = (ins type0:$lhs, type0:$rhs);
}

def : GINodeEquiv<G_NM_ADD, nm_add>;
```

SDagISel is able to use the pattern, bug -gen-global-isel reports that the pattern cannot be imported:
```
NMInstrPatterns.td:231:1: warning: Skipped pattern: Src pattern result has more defs than dst MI (2 def(s) vs 1 def(s))
def : Pat<(nm_add i32:$lhs, i32:$rhs), (ADDrf i32:$lhs, i32:$rhs)>;
```

I tried to fix the issue too, but got lost figuring out how SDagISel deals with it.


https://github.com/llvm/llvm-project/pull/81130


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