[llvm] [RISCV][ISel] Add codegen support for the experimental zabha extension (PR #80192)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 9 16:32:19 PST 2024


https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/80192

>From 0f25140b2a78a25a05291df73d21f8bf80e04a8e Mon Sep 17 00:00:00 2001
From: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: Thu, 1 Feb 2024 13:47:08 +0800
Subject: [PATCH 1/2] [RISCV][ISel] Add codegen support for the experimental
 zabha extension

---
 llvm/docs/RISCVUsage.rst                      |     2 +-
 llvm/docs/ReleaseNotes.rst                    |     2 +-
 llvm/lib/Target/RISCV/RISCVISelLowering.cpp   |    22 +-
 llvm/lib/Target/RISCV/RISCVInstrInfoZa.td     |    27 +
 .../RISCV/atomic-cmpxchg-branch-on-result.ll  |    22 +
 llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll     |  1122 +-
 llvm/test/CodeGen/RISCV/atomic-rmw.ll         | 14314 +++++++++++-----
 7 files changed, 11436 insertions(+), 4075 deletions(-)

diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index 5caf2fee197f25..156db366389840 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -227,7 +227,7 @@ LLVM supports (to various degrees) a number of experimental extensions.  All exp
 The primary goal of experimental support is to assist in the process of ratification by providing an existence proof of an implementation, and simplifying efforts to validate the value of a proposed extension against large code bases.  Experimental extensions are expected to either transition to ratified status, or be eventually removed.  The decision on whether to accept an experimental extension is currently done on an entirely case by case basis; if you want to propose one, attending the bi-weekly RISC-V sync-up call is strongly advised.
 
 ``experimental-zabha``
-  LLVM implements assembler support for the `v1.0-rc1 draft specification <https://github.com/riscv/riscv-zabha/tree/v1.0-rc1>`_.
+  LLVM implements the `v1.0-rc1 draft specification <https://github.com/riscv/riscv-zabha/tree/v1.0-rc1>`_.
 
 ``experimental-zacas``
   LLVM implements the `1.0-rc1 draft specification <https://github.com/riscv/riscv-zacas/releases/tag/v1.0-rc1>`_.
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index ad5b2ec1219e05..9810c02e78fd34 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -93,7 +93,7 @@ Changes to the RISC-V Backend
 -----------------------------
 
 * Support for the Zicond extension is no longer experimental.
-* Added assembler/disassembler support for the experimental Zabha (Byte and Halfword Atomic Memory Operations) extension.
+* Added full support for the experimental Zabha (Byte and Halfword Atomic Memory Operations) extension.
 
 Changes to the WebAssembly Backend
 ----------------------------------
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 75397bdab730c5..bd68f3c867ed41 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -629,7 +629,10 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
 
   if (Subtarget.hasStdExtA()) {
     setMaxAtomicSizeInBitsSupported(Subtarget.getXLen());
-    setMinCmpXchgSizeInBits(32);
+    if (Subtarget.hasStdExtZabha())
+      setMinCmpXchgSizeInBits(8);
+    else
+      setMinCmpXchgSizeInBits(32);
   } else if (Subtarget.hasForcedAtomics()) {
     setMaxAtomicSizeInBitsSupported(Subtarget.getXLen());
   } else {
@@ -19512,8 +19515,13 @@ RISCVTargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {
     return AtomicExpansionKind::None;
 
   unsigned Size = AI->getType()->getPrimitiveSizeInBits();
-  if (Size == 8 || Size == 16)
-    return AtomicExpansionKind::MaskedIntrinsic;
+  if (Size == 8 || Size == 16) {
+    if (!Subtarget.hasStdExtZabha())
+      return AtomicExpansionKind::MaskedIntrinsic;
+    if (AI->getOperation() == AtomicRMWInst::Nand)
+      return Subtarget.hasStdExtZacas() ? AtomicExpansionKind::CmpXChg
+                                        : AtomicExpansionKind::MaskedIntrinsic;
+  }
 
   if (Subtarget.hasStdExtZacas() && AI->getOperation() == AtomicRMWInst::Nand &&
       (Size == Subtarget.getXLen() || Size == 32))
@@ -19627,6 +19635,8 @@ Value *RISCVTargetLowering::emitMaskedAtomicRMWIntrinsic(
         Builder.CreateCall(LrwOpScwLoop, {AlignedAddr, Incr, Mask, Ordering});
   }
 
+  if (Subtarget.hasStdExtZabha())
+    return Builder.CreateTrunc(Result, AI->getValOperand()->getType());
   if (XLen == 64)
     Result = Builder.CreateTrunc(Result, Builder.getInt32Ty());
   return Result;
@@ -19640,7 +19650,8 @@ RISCVTargetLowering::shouldExpandAtomicCmpXchgInIR(
     return AtomicExpansionKind::None;
 
   unsigned Size = CI->getCompareOperand()->getType()->getPrimitiveSizeInBits();
-  if (Size == 8 || Size == 16)
+  if (!(Subtarget.hasStdExtZabha() && Subtarget.hasStdExtZacas()) &&
+      (Size == 8 || Size == 16))
     return AtomicExpansionKind::MaskedIntrinsic;
   return AtomicExpansionKind::None;
 }
@@ -19662,6 +19673,9 @@ Value *RISCVTargetLowering::emitMaskedAtomicCmpXchgIntrinsic(
       Intrinsic::getDeclaration(CI->getModule(), CmpXchgIntrID, Tys);
   Value *Result = Builder.CreateCall(
       MaskedCmpXchg, {AlignedAddr, CmpVal, NewVal, Mask, Ordering});
+
+  if (Subtarget.hasStdExtZabha())
+    return Builder.CreateTrunc(Result, CI->getCompareOperand()->getType());
   if (XLen == 64)
     Result = Builder.CreateTrunc(Result, Builder.getInt32Ty());
   return Result;
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoZa.td b/llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
index fa918d90ad160f..0cd41cac218f97 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
@@ -185,3 +185,30 @@ let Predicates = [HasStdExtZabha, HasStdExtZacas] in {
 defm AMOCAS_B : AMO_cas_aq_rl<0b00101, 0b000, "amocas.b", GPR>;
 defm AMOCAS_H : AMO_cas_aq_rl<0b00101, 0b001, "amocas.h", GPR>;
 }
+
+/// AMOs
+
+defm : AMOPat<"atomic_swap_8", "AMOSWAP_B", XLenVT, [HasStdExtZabha]>;
+defm : AMOPat<"atomic_load_add_8", "AMOADD_B", XLenVT, [HasStdExtZabha]>;
+defm : AMOPat<"atomic_load_and_8", "AMOAND_B", XLenVT, [HasStdExtZabha]>;
+defm : AMOPat<"atomic_load_or_8", "AMOOR_B", XLenVT, [HasStdExtZabha]>;
+defm : AMOPat<"atomic_load_xor_8", "AMOXOR_B", XLenVT, [HasStdExtZabha]>;
+defm : AMOPat<"atomic_load_max_8", "AMOMAX_B", XLenVT, [HasStdExtZabha]>;
+defm : AMOPat<"atomic_load_min_8", "AMOMIN_B", XLenVT, [HasStdExtZabha]>;
+defm : AMOPat<"atomic_load_umax_8", "AMOMAXU_B", XLenVT, [HasStdExtZabha]>;
+defm : AMOPat<"atomic_load_umin_8", "AMOMINU_B", XLenVT, [HasStdExtZabha]>;
+
+defm : AMOPat<"atomic_swap_16", "AMOSWAP_H", XLenVT, [HasStdExtZabha]>;
+defm : AMOPat<"atomic_load_add_16", "AMOADD_H", XLenVT, [HasStdExtZabha]>;
+defm : AMOPat<"atomic_load_and_16", "AMOAND_H", XLenVT, [HasStdExtZabha]>;
+defm : AMOPat<"atomic_load_or_16", "AMOOR_H", XLenVT, [HasStdExtZabha]>;
+defm : AMOPat<"atomic_load_xor_16", "AMOXOR_H", XLenVT, [HasStdExtZabha]>;
+defm : AMOPat<"atomic_load_max_16", "AMOMAX_H", XLenVT, [HasStdExtZabha]>;
+defm : AMOPat<"atomic_load_min_16", "AMOMIN_H", XLenVT, [HasStdExtZabha]>;
+defm : AMOPat<"atomic_load_umax_16", "AMOMAXU_H", XLenVT, [HasStdExtZabha]>;
+defm : AMOPat<"atomic_load_umin_16", "AMOMINU_H", XLenVT, [HasStdExtZabha]>;
+
+/// AMOCAS
+
+defm : AMOCASPat<"atomic_cmp_swap_8", "AMOCAS_B", XLenVT, [HasStdExtZabha]>;
+defm : AMOCASPat<"atomic_cmp_swap_16", "AMOCAS_H", XLenVT, [HasStdExtZabha]>;
diff --git a/llvm/test/CodeGen/RISCV/atomic-cmpxchg-branch-on-result.ll b/llvm/test/CodeGen/RISCV/atomic-cmpxchg-branch-on-result.ll
index a8477cc550fe6a..90d78779b764d2 100644
--- a/llvm/test/CodeGen/RISCV/atomic-cmpxchg-branch-on-result.ll
+++ b/llvm/test/CodeGen/RISCV/atomic-cmpxchg-branch-on-result.ll
@@ -7,6 +7,8 @@
 ; RUN:   | FileCheck -check-prefixes=NOZACAS,RV64IA %s
 ; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-zacas -verify-machineinstrs < %s \
 ; RUN:   | FileCheck -check-prefixes=ZACAS,RV64IA-ZACAS %s
+; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-zacas,+experimental-zabha -verify-machineinstrs < %s \
+; RUN:   | FileCheck -check-prefixes=ZACAS,RV64IA-ZABHA %s
 
 ; Test cmpxchg followed by a branch on the cmpxchg success value to see if the
 ; branch is folded into the cmpxchg expansion.
@@ -209,6 +211,16 @@ define void @cmpxchg_masked_and_branch1(ptr %ptr, i8 signext %cmp, i8 signext %v
 ; RV64IA-ZACAS-NEXT:  # %bb.5: # %do_cmpxchg
 ; RV64IA-ZACAS-NEXT:  # %bb.2: # %exit
 ; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-ZABHA-LABEL: cmpxchg_masked_and_branch1:
+; RV64IA-ZABHA:       # %bb.0: # %entry
+; RV64IA-ZABHA-NEXT:  .LBB2_1: # %do_cmpxchg
+; RV64IA-ZABHA-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-ZABHA-NEXT:    mv a3, a1
+; RV64IA-ZABHA-NEXT:    amocas.b.aqrl a3, a2, (a0)
+; RV64IA-ZABHA-NEXT:    bne a3, a1, .LBB2_1
+; RV64IA-ZABHA-NEXT:  # %bb.2: # %exit
+; RV64IA-ZABHA-NEXT:    ret
 entry:
   br label %do_cmpxchg
 do_cmpxchg:
@@ -351,6 +363,16 @@ define void @cmpxchg_masked_and_branch2(ptr %ptr, i8 signext %cmp, i8 signext %v
 ; RV64IA-ZACAS-NEXT:    beq a1, a4, .LBB3_1
 ; RV64IA-ZACAS-NEXT:  # %bb.2: # %exit
 ; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-ZABHA-LABEL: cmpxchg_masked_and_branch2:
+; RV64IA-ZABHA:       # %bb.0: # %entry
+; RV64IA-ZABHA-NEXT:  .LBB3_1: # %do_cmpxchg
+; RV64IA-ZABHA-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-ZABHA-NEXT:    mv a3, a1
+; RV64IA-ZABHA-NEXT:    amocas.b.aqrl a3, a2, (a0)
+; RV64IA-ZABHA-NEXT:    beq a3, a1, .LBB3_1
+; RV64IA-ZABHA-NEXT:  # %bb.2: # %exit
+; RV64IA-ZABHA-NEXT:    ret
 entry:
   br label %do_cmpxchg
 do_cmpxchg:
diff --git a/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll b/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
index 5b3e5789e8d910..8df37bf40975c1 100644
--- a/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
+++ b/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
@@ -15,10 +15,14 @@
 ; RUN:   | FileCheck -check-prefixes=RV64IA,RV64IA-WMO %s
 ; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-zacas -verify-machineinstrs < %s \
 ; RUN:   | FileCheck -check-prefixes=RV64IA,RV64IA-ZACAS,RV64IA-WMO-ZACAS %s
+; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-zacas,+experimental-zabha -verify-machineinstrs < %s \
+; RUN:   | FileCheck -check-prefixes=RV64IA,RV64IA-ZABHA,RV64IA-WMO-ZABHA %s
 ; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso -verify-machineinstrs < %s \
 ; RUN:   | FileCheck -check-prefixes=RV64IA,RV64IA-TSO %s
 ; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso,+experimental-zacas -verify-machineinstrs < %s \
 ; RUN:   | FileCheck -check-prefixes=RV64IA,RV64IA-ZACAS,RV64IA-TSO-ZACAS %s
+; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso,+experimental-zacas,+experimental-zabha -verify-machineinstrs < %s \
+; RUN:   | FileCheck -check-prefixes=RV64IA,RV64IA-ZABHA,RV64IA-TSO-ZABHA %s
 
 define void @cmpxchg_i8_monotonic_monotonic(ptr %ptr, i8 %cmp, i8 %val) nounwind {
 ; RV32I-LABEL: cmpxchg_i8_monotonic_monotonic:
@@ -70,28 +74,79 @@ define void @cmpxchg_i8_monotonic_monotonic(ptr %ptr, i8 %cmp, i8 %val) nounwind
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: cmpxchg_i8_monotonic_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a3, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    li a4, 255
-; RV64IA-NEXT:    sllw a4, a4, a0
-; RV64IA-NEXT:    andi a1, a1, 255
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    andi a2, a2, 255
-; RV64IA-NEXT:    sllw a0, a2, a0
-; RV64IA-NEXT:  .LBB0_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w a2, (a3)
-; RV64IA-NEXT:    and a5, a2, a4
-; RV64IA-NEXT:    bne a5, a1, .LBB0_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB0_1 Depth=1
-; RV64IA-NEXT:    xor a5, a2, a0
-; RV64IA-NEXT:    and a5, a5, a4
-; RV64IA-NEXT:    xor a5, a2, a5
-; RV64IA-NEXT:    sc.w a5, a5, (a3)
-; RV64IA-NEXT:    bnez a5, .LBB0_1
-; RV64IA-NEXT:  .LBB0_3:
-; RV64IA-NEXT:    ret
+; RV64IA-WMO-LABEL: cmpxchg_i8_monotonic_monotonic:
+; RV64IA-WMO:       # %bb.0:
+; RV64IA-WMO-NEXT:    andi a3, a0, -4
+; RV64IA-WMO-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NEXT:    li a4, 255
+; RV64IA-WMO-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NEXT:    andi a2, a2, 255
+; RV64IA-WMO-NEXT:    sllw a0, a2, a0
+; RV64IA-WMO-NEXT:  .LBB0_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NEXT:    lr.w a2, (a3)
+; RV64IA-WMO-NEXT:    and a5, a2, a4
+; RV64IA-WMO-NEXT:    bne a5, a1, .LBB0_3
+; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB0_1 Depth=1
+; RV64IA-WMO-NEXT:    xor a5, a2, a0
+; RV64IA-WMO-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NEXT:    xor a5, a2, a5
+; RV64IA-WMO-NEXT:    sc.w a5, a5, (a3)
+; RV64IA-WMO-NEXT:    bnez a5, .LBB0_1
+; RV64IA-WMO-NEXT:  .LBB0_3:
+; RV64IA-WMO-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: cmpxchg_i8_monotonic_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a3, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    li a4, 255
+; RV64IA-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    andi a2, a2, 255
+; RV64IA-ZACAS-NEXT:    sllw a0, a2, a0
+; RV64IA-ZACAS-NEXT:  .LBB0_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w a2, (a3)
+; RV64IA-ZACAS-NEXT:    and a5, a2, a4
+; RV64IA-ZACAS-NEXT:    bne a5, a1, .LBB0_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB0_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a5, a2, a0
+; RV64IA-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-ZACAS-NEXT:    xor a5, a2, a5
+; RV64IA-ZACAS-NEXT:    sc.w a5, a5, (a3)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB0_1
+; RV64IA-ZACAS-NEXT:  .LBB0_3:
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-ZABHA-LABEL: cmpxchg_i8_monotonic_monotonic:
+; RV64IA-ZABHA:       # %bb.0:
+; RV64IA-ZABHA-NEXT:    amocas.b a1, a2, (a0)
+; RV64IA-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-LABEL: cmpxchg_i8_monotonic_monotonic:
+; RV64IA-TSO:       # %bb.0:
+; RV64IA-TSO-NEXT:    andi a3, a0, -4
+; RV64IA-TSO-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NEXT:    li a4, 255
+; RV64IA-TSO-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NEXT:    andi a2, a2, 255
+; RV64IA-TSO-NEXT:    sllw a0, a2, a0
+; RV64IA-TSO-NEXT:  .LBB0_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NEXT:    lr.w a2, (a3)
+; RV64IA-TSO-NEXT:    and a5, a2, a4
+; RV64IA-TSO-NEXT:    bne a5, a1, .LBB0_3
+; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB0_1 Depth=1
+; RV64IA-TSO-NEXT:    xor a5, a2, a0
+; RV64IA-TSO-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NEXT:    xor a5, a2, a5
+; RV64IA-TSO-NEXT:    sc.w a5, a5, (a3)
+; RV64IA-TSO-NEXT:    bnez a5, .LBB0_1
+; RV64IA-TSO-NEXT:  .LBB0_3:
+; RV64IA-TSO-NEXT:    ret
   %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val monotonic monotonic
   ret void
 }
@@ -261,6 +316,11 @@ define void @cmpxchg_i8_acquire_monotonic(ptr %ptr, i8 %cmp, i8 %val) nounwind {
 ; RV64IA-WMO-ZACAS-NEXT:  .LBB1_3:
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i8_acquire_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.b.aq a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i8_acquire_monotonic:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    andi a3, a0, -4
@@ -306,6 +366,11 @@ define void @cmpxchg_i8_acquire_monotonic(ptr %ptr, i8 %cmp, i8 %val) nounwind {
 ; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB1_1
 ; RV64IA-TSO-ZACAS-NEXT:  .LBB1_3:
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i8_acquire_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.b a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val acquire monotonic
   ret void
 }
@@ -475,6 +540,11 @@ define void @cmpxchg_i8_acquire_acquire(ptr %ptr, i8 %cmp, i8 %val) nounwind {
 ; RV64IA-WMO-ZACAS-NEXT:  .LBB2_3:
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i8_acquire_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.b.aq a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i8_acquire_acquire:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    andi a3, a0, -4
@@ -520,6 +590,11 @@ define void @cmpxchg_i8_acquire_acquire(ptr %ptr, i8 %cmp, i8 %val) nounwind {
 ; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB2_1
 ; RV64IA-TSO-ZACAS-NEXT:  .LBB2_3:
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i8_acquire_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.b a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val acquire acquire
   ret void
 }
@@ -689,6 +764,11 @@ define void @cmpxchg_i8_release_monotonic(ptr %ptr, i8 %cmp, i8 %val) nounwind {
 ; RV64IA-WMO-ZACAS-NEXT:  .LBB3_3:
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i8_release_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.b.rl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i8_release_monotonic:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    andi a3, a0, -4
@@ -734,6 +814,11 @@ define void @cmpxchg_i8_release_monotonic(ptr %ptr, i8 %cmp, i8 %val) nounwind {
 ; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB3_1
 ; RV64IA-TSO-ZACAS-NEXT:  .LBB3_3:
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i8_release_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.b a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val release monotonic
   ret void
 }
@@ -903,6 +988,11 @@ define void @cmpxchg_i8_release_acquire(ptr %ptr, i8 %cmp, i8 %val) nounwind {
 ; RV64IA-WMO-ZACAS-NEXT:  .LBB4_3:
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i8_release_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.b.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i8_release_acquire:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    andi a3, a0, -4
@@ -948,6 +1038,11 @@ define void @cmpxchg_i8_release_acquire(ptr %ptr, i8 %cmp, i8 %val) nounwind {
 ; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB4_1
 ; RV64IA-TSO-ZACAS-NEXT:  .LBB4_3:
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i8_release_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.b a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val release acquire
   ret void
 }
@@ -1117,6 +1212,11 @@ define void @cmpxchg_i8_acq_rel_monotonic(ptr %ptr, i8 %cmp, i8 %val) nounwind {
 ; RV64IA-WMO-ZACAS-NEXT:  .LBB5_3:
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i8_acq_rel_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.b.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i8_acq_rel_monotonic:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    andi a3, a0, -4
@@ -1162,6 +1262,11 @@ define void @cmpxchg_i8_acq_rel_monotonic(ptr %ptr, i8 %cmp, i8 %val) nounwind {
 ; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB5_1
 ; RV64IA-TSO-ZACAS-NEXT:  .LBB5_3:
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i8_acq_rel_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.b a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val acq_rel monotonic
   ret void
 }
@@ -1331,6 +1436,11 @@ define void @cmpxchg_i8_acq_rel_acquire(ptr %ptr, i8 %cmp, i8 %val) nounwind {
 ; RV64IA-WMO-ZACAS-NEXT:  .LBB6_3:
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i8_acq_rel_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.b.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i8_acq_rel_acquire:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    andi a3, a0, -4
@@ -1376,6 +1486,11 @@ define void @cmpxchg_i8_acq_rel_acquire(ptr %ptr, i8 %cmp, i8 %val) nounwind {
 ; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB6_1
 ; RV64IA-TSO-ZACAS-NEXT:  .LBB6_3:
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i8_acq_rel_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.b a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val acq_rel acquire
   ret void
 }
@@ -1430,28 +1545,84 @@ define void @cmpxchg_i8_seq_cst_monotonic(ptr %ptr, i8 %cmp, i8 %val) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: cmpxchg_i8_seq_cst_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a3, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    li a4, 255
-; RV64IA-NEXT:    sllw a4, a4, a0
-; RV64IA-NEXT:    andi a1, a1, 255
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    andi a2, a2, 255
-; RV64IA-NEXT:    sllw a0, a2, a0
-; RV64IA-NEXT:  .LBB7_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a2, (a3)
-; RV64IA-NEXT:    and a5, a2, a4
-; RV64IA-NEXT:    bne a5, a1, .LBB7_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB7_1 Depth=1
-; RV64IA-NEXT:    xor a5, a2, a0
-; RV64IA-NEXT:    and a5, a5, a4
-; RV64IA-NEXT:    xor a5, a2, a5
-; RV64IA-NEXT:    sc.w.rl a5, a5, (a3)
-; RV64IA-NEXT:    bnez a5, .LBB7_1
-; RV64IA-NEXT:  .LBB7_3:
-; RV64IA-NEXT:    ret
+; RV64IA-WMO-LABEL: cmpxchg_i8_seq_cst_monotonic:
+; RV64IA-WMO:       # %bb.0:
+; RV64IA-WMO-NEXT:    andi a3, a0, -4
+; RV64IA-WMO-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NEXT:    li a4, 255
+; RV64IA-WMO-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NEXT:    andi a2, a2, 255
+; RV64IA-WMO-NEXT:    sllw a0, a2, a0
+; RV64IA-WMO-NEXT:  .LBB7_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NEXT:    lr.w.aqrl a2, (a3)
+; RV64IA-WMO-NEXT:    and a5, a2, a4
+; RV64IA-WMO-NEXT:    bne a5, a1, .LBB7_3
+; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB7_1 Depth=1
+; RV64IA-WMO-NEXT:    xor a5, a2, a0
+; RV64IA-WMO-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NEXT:    xor a5, a2, a5
+; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a3)
+; RV64IA-WMO-NEXT:    bnez a5, .LBB7_1
+; RV64IA-WMO-NEXT:  .LBB7_3:
+; RV64IA-WMO-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: cmpxchg_i8_seq_cst_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a3, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    li a4, 255
+; RV64IA-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    andi a2, a2, 255
+; RV64IA-ZACAS-NEXT:    sllw a0, a2, a0
+; RV64IA-ZACAS-NEXT:  .LBB7_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a2, (a3)
+; RV64IA-ZACAS-NEXT:    and a5, a2, a4
+; RV64IA-ZACAS-NEXT:    bne a5, a1, .LBB7_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB7_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a5, a2, a0
+; RV64IA-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-ZACAS-NEXT:    xor a5, a2, a5
+; RV64IA-ZACAS-NEXT:    sc.w.rl a5, a5, (a3)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB7_1
+; RV64IA-ZACAS-NEXT:  .LBB7_3:
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i8_seq_cst_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.b.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-LABEL: cmpxchg_i8_seq_cst_monotonic:
+; RV64IA-TSO:       # %bb.0:
+; RV64IA-TSO-NEXT:    andi a3, a0, -4
+; RV64IA-TSO-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NEXT:    li a4, 255
+; RV64IA-TSO-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NEXT:    andi a2, a2, 255
+; RV64IA-TSO-NEXT:    sllw a0, a2, a0
+; RV64IA-TSO-NEXT:  .LBB7_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NEXT:    lr.w.aqrl a2, (a3)
+; RV64IA-TSO-NEXT:    and a5, a2, a4
+; RV64IA-TSO-NEXT:    bne a5, a1, .LBB7_3
+; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB7_1 Depth=1
+; RV64IA-TSO-NEXT:    xor a5, a2, a0
+; RV64IA-TSO-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NEXT:    xor a5, a2, a5
+; RV64IA-TSO-NEXT:    sc.w.rl a5, a5, (a3)
+; RV64IA-TSO-NEXT:    bnez a5, .LBB7_1
+; RV64IA-TSO-NEXT:  .LBB7_3:
+; RV64IA-TSO-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i8_seq_cst_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.b a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val seq_cst monotonic
   ret void
 }
@@ -1506,28 +1677,84 @@ define void @cmpxchg_i8_seq_cst_acquire(ptr %ptr, i8 %cmp, i8 %val) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: cmpxchg_i8_seq_cst_acquire:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a3, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    li a4, 255
-; RV64IA-NEXT:    sllw a4, a4, a0
-; RV64IA-NEXT:    andi a1, a1, 255
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    andi a2, a2, 255
-; RV64IA-NEXT:    sllw a0, a2, a0
-; RV64IA-NEXT:  .LBB8_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a2, (a3)
-; RV64IA-NEXT:    and a5, a2, a4
-; RV64IA-NEXT:    bne a5, a1, .LBB8_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB8_1 Depth=1
-; RV64IA-NEXT:    xor a5, a2, a0
-; RV64IA-NEXT:    and a5, a5, a4
-; RV64IA-NEXT:    xor a5, a2, a5
-; RV64IA-NEXT:    sc.w.rl a5, a5, (a3)
-; RV64IA-NEXT:    bnez a5, .LBB8_1
-; RV64IA-NEXT:  .LBB8_3:
-; RV64IA-NEXT:    ret
+; RV64IA-WMO-LABEL: cmpxchg_i8_seq_cst_acquire:
+; RV64IA-WMO:       # %bb.0:
+; RV64IA-WMO-NEXT:    andi a3, a0, -4
+; RV64IA-WMO-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NEXT:    li a4, 255
+; RV64IA-WMO-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NEXT:    andi a2, a2, 255
+; RV64IA-WMO-NEXT:    sllw a0, a2, a0
+; RV64IA-WMO-NEXT:  .LBB8_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NEXT:    lr.w.aqrl a2, (a3)
+; RV64IA-WMO-NEXT:    and a5, a2, a4
+; RV64IA-WMO-NEXT:    bne a5, a1, .LBB8_3
+; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB8_1 Depth=1
+; RV64IA-WMO-NEXT:    xor a5, a2, a0
+; RV64IA-WMO-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NEXT:    xor a5, a2, a5
+; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a3)
+; RV64IA-WMO-NEXT:    bnez a5, .LBB8_1
+; RV64IA-WMO-NEXT:  .LBB8_3:
+; RV64IA-WMO-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: cmpxchg_i8_seq_cst_acquire:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a3, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    li a4, 255
+; RV64IA-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    andi a2, a2, 255
+; RV64IA-ZACAS-NEXT:    sllw a0, a2, a0
+; RV64IA-ZACAS-NEXT:  .LBB8_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a2, (a3)
+; RV64IA-ZACAS-NEXT:    and a5, a2, a4
+; RV64IA-ZACAS-NEXT:    bne a5, a1, .LBB8_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB8_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a5, a2, a0
+; RV64IA-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-ZACAS-NEXT:    xor a5, a2, a5
+; RV64IA-ZACAS-NEXT:    sc.w.rl a5, a5, (a3)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB8_1
+; RV64IA-ZACAS-NEXT:  .LBB8_3:
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i8_seq_cst_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.b.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-LABEL: cmpxchg_i8_seq_cst_acquire:
+; RV64IA-TSO:       # %bb.0:
+; RV64IA-TSO-NEXT:    andi a3, a0, -4
+; RV64IA-TSO-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NEXT:    li a4, 255
+; RV64IA-TSO-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NEXT:    andi a2, a2, 255
+; RV64IA-TSO-NEXT:    sllw a0, a2, a0
+; RV64IA-TSO-NEXT:  .LBB8_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NEXT:    lr.w.aqrl a2, (a3)
+; RV64IA-TSO-NEXT:    and a5, a2, a4
+; RV64IA-TSO-NEXT:    bne a5, a1, .LBB8_3
+; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB8_1 Depth=1
+; RV64IA-TSO-NEXT:    xor a5, a2, a0
+; RV64IA-TSO-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NEXT:    xor a5, a2, a5
+; RV64IA-TSO-NEXT:    sc.w.rl a5, a5, (a3)
+; RV64IA-TSO-NEXT:    bnez a5, .LBB8_1
+; RV64IA-TSO-NEXT:  .LBB8_3:
+; RV64IA-TSO-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i8_seq_cst_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.b a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val seq_cst acquire
   ret void
 }
@@ -1582,28 +1809,84 @@ define void @cmpxchg_i8_seq_cst_seq_cst(ptr %ptr, i8 %cmp, i8 %val) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: cmpxchg_i8_seq_cst_seq_cst:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a3, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    li a4, 255
-; RV64IA-NEXT:    sllw a4, a4, a0
-; RV64IA-NEXT:    andi a1, a1, 255
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    andi a2, a2, 255
-; RV64IA-NEXT:    sllw a0, a2, a0
-; RV64IA-NEXT:  .LBB9_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a2, (a3)
-; RV64IA-NEXT:    and a5, a2, a4
-; RV64IA-NEXT:    bne a5, a1, .LBB9_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB9_1 Depth=1
-; RV64IA-NEXT:    xor a5, a2, a0
-; RV64IA-NEXT:    and a5, a5, a4
-; RV64IA-NEXT:    xor a5, a2, a5
-; RV64IA-NEXT:    sc.w.rl a5, a5, (a3)
-; RV64IA-NEXT:    bnez a5, .LBB9_1
-; RV64IA-NEXT:  .LBB9_3:
-; RV64IA-NEXT:    ret
+; RV64IA-WMO-LABEL: cmpxchg_i8_seq_cst_seq_cst:
+; RV64IA-WMO:       # %bb.0:
+; RV64IA-WMO-NEXT:    andi a3, a0, -4
+; RV64IA-WMO-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NEXT:    li a4, 255
+; RV64IA-WMO-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NEXT:    andi a2, a2, 255
+; RV64IA-WMO-NEXT:    sllw a0, a2, a0
+; RV64IA-WMO-NEXT:  .LBB9_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NEXT:    lr.w.aqrl a2, (a3)
+; RV64IA-WMO-NEXT:    and a5, a2, a4
+; RV64IA-WMO-NEXT:    bne a5, a1, .LBB9_3
+; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB9_1 Depth=1
+; RV64IA-WMO-NEXT:    xor a5, a2, a0
+; RV64IA-WMO-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NEXT:    xor a5, a2, a5
+; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a3)
+; RV64IA-WMO-NEXT:    bnez a5, .LBB9_1
+; RV64IA-WMO-NEXT:  .LBB9_3:
+; RV64IA-WMO-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: cmpxchg_i8_seq_cst_seq_cst:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a3, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    li a4, 255
+; RV64IA-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    andi a2, a2, 255
+; RV64IA-ZACAS-NEXT:    sllw a0, a2, a0
+; RV64IA-ZACAS-NEXT:  .LBB9_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a2, (a3)
+; RV64IA-ZACAS-NEXT:    and a5, a2, a4
+; RV64IA-ZACAS-NEXT:    bne a5, a1, .LBB9_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB9_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a5, a2, a0
+; RV64IA-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-ZACAS-NEXT:    xor a5, a2, a5
+; RV64IA-ZACAS-NEXT:    sc.w.rl a5, a5, (a3)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB9_1
+; RV64IA-ZACAS-NEXT:  .LBB9_3:
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i8_seq_cst_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.b.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-LABEL: cmpxchg_i8_seq_cst_seq_cst:
+; RV64IA-TSO:       # %bb.0:
+; RV64IA-TSO-NEXT:    andi a3, a0, -4
+; RV64IA-TSO-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NEXT:    li a4, 255
+; RV64IA-TSO-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NEXT:    andi a2, a2, 255
+; RV64IA-TSO-NEXT:    sllw a0, a2, a0
+; RV64IA-TSO-NEXT:  .LBB9_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NEXT:    lr.w.aqrl a2, (a3)
+; RV64IA-TSO-NEXT:    and a5, a2, a4
+; RV64IA-TSO-NEXT:    bne a5, a1, .LBB9_3
+; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB9_1 Depth=1
+; RV64IA-TSO-NEXT:    xor a5, a2, a0
+; RV64IA-TSO-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NEXT:    xor a5, a2, a5
+; RV64IA-TSO-NEXT:    sc.w.rl a5, a5, (a3)
+; RV64IA-TSO-NEXT:    bnez a5, .LBB9_1
+; RV64IA-TSO-NEXT:  .LBB9_3:
+; RV64IA-TSO-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i8_seq_cst_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.b a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val seq_cst seq_cst
   ret void
 }
@@ -1659,29 +1942,82 @@ define void @cmpxchg_i16_monotonic_monotonic(ptr %ptr, i16 %cmp, i16 %val) nounw
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: cmpxchg_i16_monotonic_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a3, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    lui a4, 16
-; RV64IA-NEXT:    addi a4, a4, -1
-; RV64IA-NEXT:    sllw a5, a4, a0
-; RV64IA-NEXT:    and a1, a1, a4
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    and a2, a2, a4
-; RV64IA-NEXT:    sllw a0, a2, a0
-; RV64IA-NEXT:  .LBB10_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w a2, (a3)
-; RV64IA-NEXT:    and a4, a2, a5
-; RV64IA-NEXT:    bne a4, a1, .LBB10_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB10_1 Depth=1
-; RV64IA-NEXT:    xor a4, a2, a0
-; RV64IA-NEXT:    and a4, a4, a5
-; RV64IA-NEXT:    xor a4, a2, a4
-; RV64IA-NEXT:    sc.w a4, a4, (a3)
-; RV64IA-NEXT:    bnez a4, .LBB10_1
-; RV64IA-NEXT:  .LBB10_3:
-; RV64IA-NEXT:    ret
+; RV64IA-WMO-LABEL: cmpxchg_i16_monotonic_monotonic:
+; RV64IA-WMO:       # %bb.0:
+; RV64IA-WMO-NEXT:    andi a3, a0, -4
+; RV64IA-WMO-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NEXT:    lui a4, 16
+; RV64IA-WMO-NEXT:    addi a4, a4, -1
+; RV64IA-WMO-NEXT:    sllw a5, a4, a0
+; RV64IA-WMO-NEXT:    and a1, a1, a4
+; RV64IA-WMO-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NEXT:    and a2, a2, a4
+; RV64IA-WMO-NEXT:    sllw a0, a2, a0
+; RV64IA-WMO-NEXT:  .LBB10_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NEXT:    lr.w a2, (a3)
+; RV64IA-WMO-NEXT:    and a4, a2, a5
+; RV64IA-WMO-NEXT:    bne a4, a1, .LBB10_3
+; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB10_1 Depth=1
+; RV64IA-WMO-NEXT:    xor a4, a2, a0
+; RV64IA-WMO-NEXT:    and a4, a4, a5
+; RV64IA-WMO-NEXT:    xor a4, a2, a4
+; RV64IA-WMO-NEXT:    sc.w a4, a4, (a3)
+; RV64IA-WMO-NEXT:    bnez a4, .LBB10_1
+; RV64IA-WMO-NEXT:  .LBB10_3:
+; RV64IA-WMO-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: cmpxchg_i16_monotonic_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a3, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    lui a4, 16
+; RV64IA-ZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-ZACAS-NEXT:    sllw a5, a4, a0
+; RV64IA-ZACAS-NEXT:    and a1, a1, a4
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    and a2, a2, a4
+; RV64IA-ZACAS-NEXT:    sllw a0, a2, a0
+; RV64IA-ZACAS-NEXT:  .LBB10_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w a2, (a3)
+; RV64IA-ZACAS-NEXT:    and a4, a2, a5
+; RV64IA-ZACAS-NEXT:    bne a4, a1, .LBB10_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB10_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a4, a2, a0
+; RV64IA-ZACAS-NEXT:    and a4, a4, a5
+; RV64IA-ZACAS-NEXT:    xor a4, a2, a4
+; RV64IA-ZACAS-NEXT:    sc.w a4, a4, (a3)
+; RV64IA-ZACAS-NEXT:    bnez a4, .LBB10_1
+; RV64IA-ZACAS-NEXT:  .LBB10_3:
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-ZABHA-LABEL: cmpxchg_i16_monotonic_monotonic:
+; RV64IA-ZABHA:       # %bb.0:
+; RV64IA-ZABHA-NEXT:    amocas.h a1, a2, (a0)
+; RV64IA-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-LABEL: cmpxchg_i16_monotonic_monotonic:
+; RV64IA-TSO:       # %bb.0:
+; RV64IA-TSO-NEXT:    andi a3, a0, -4
+; RV64IA-TSO-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NEXT:    lui a4, 16
+; RV64IA-TSO-NEXT:    addi a4, a4, -1
+; RV64IA-TSO-NEXT:    sllw a5, a4, a0
+; RV64IA-TSO-NEXT:    and a1, a1, a4
+; RV64IA-TSO-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NEXT:    and a2, a2, a4
+; RV64IA-TSO-NEXT:    sllw a0, a2, a0
+; RV64IA-TSO-NEXT:  .LBB10_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NEXT:    lr.w a2, (a3)
+; RV64IA-TSO-NEXT:    and a4, a2, a5
+; RV64IA-TSO-NEXT:    bne a4, a1, .LBB10_3
+; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB10_1 Depth=1
+; RV64IA-TSO-NEXT:    xor a4, a2, a0
+; RV64IA-TSO-NEXT:    and a4, a4, a5
+; RV64IA-TSO-NEXT:    xor a4, a2, a4
+; RV64IA-TSO-NEXT:    sc.w a4, a4, (a3)
+; RV64IA-TSO-NEXT:    bnez a4, .LBB10_1
+; RV64IA-TSO-NEXT:  .LBB10_3:
+; RV64IA-TSO-NEXT:    ret
   %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val monotonic monotonic
   ret void
 }
@@ -1857,6 +2193,11 @@ define void @cmpxchg_i16_acquire_monotonic(ptr %ptr, i16 %cmp, i16 %val) nounwin
 ; RV64IA-WMO-ZACAS-NEXT:  .LBB11_3:
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i16_acquire_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.h.aq a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i16_acquire_monotonic:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    andi a3, a0, -4
@@ -1904,6 +2245,11 @@ define void @cmpxchg_i16_acquire_monotonic(ptr %ptr, i16 %cmp, i16 %val) nounwin
 ; RV64IA-TSO-ZACAS-NEXT:    bnez a4, .LBB11_1
 ; RV64IA-TSO-ZACAS-NEXT:  .LBB11_3:
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i16_acquire_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.h a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val acquire monotonic
   ret void
 }
@@ -2079,6 +2425,11 @@ define void @cmpxchg_i16_acquire_acquire(ptr %ptr, i16 %cmp, i16 %val) nounwind
 ; RV64IA-WMO-ZACAS-NEXT:  .LBB12_3:
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i16_acquire_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.h.aq a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i16_acquire_acquire:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    andi a3, a0, -4
@@ -2126,6 +2477,11 @@ define void @cmpxchg_i16_acquire_acquire(ptr %ptr, i16 %cmp, i16 %val) nounwind
 ; RV64IA-TSO-ZACAS-NEXT:    bnez a4, .LBB12_1
 ; RV64IA-TSO-ZACAS-NEXT:  .LBB12_3:
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i16_acquire_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.h a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val acquire acquire
   ret void
 }
@@ -2301,6 +2657,11 @@ define void @cmpxchg_i16_release_monotonic(ptr %ptr, i16 %cmp, i16 %val) nounwin
 ; RV64IA-WMO-ZACAS-NEXT:  .LBB13_3:
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i16_release_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.h.rl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i16_release_monotonic:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    andi a3, a0, -4
@@ -2348,6 +2709,11 @@ define void @cmpxchg_i16_release_monotonic(ptr %ptr, i16 %cmp, i16 %val) nounwin
 ; RV64IA-TSO-ZACAS-NEXT:    bnez a4, .LBB13_1
 ; RV64IA-TSO-ZACAS-NEXT:  .LBB13_3:
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i16_release_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.h a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val release monotonic
   ret void
 }
@@ -2523,6 +2889,11 @@ define void @cmpxchg_i16_release_acquire(ptr %ptr, i16 %cmp, i16 %val) nounwind
 ; RV64IA-WMO-ZACAS-NEXT:  .LBB14_3:
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i16_release_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.h.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i16_release_acquire:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    andi a3, a0, -4
@@ -2570,6 +2941,11 @@ define void @cmpxchg_i16_release_acquire(ptr %ptr, i16 %cmp, i16 %val) nounwind
 ; RV64IA-TSO-ZACAS-NEXT:    bnez a4, .LBB14_1
 ; RV64IA-TSO-ZACAS-NEXT:  .LBB14_3:
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i16_release_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.h a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val release acquire
   ret void
 }
@@ -2745,6 +3121,11 @@ define void @cmpxchg_i16_acq_rel_monotonic(ptr %ptr, i16 %cmp, i16 %val) nounwin
 ; RV64IA-WMO-ZACAS-NEXT:  .LBB15_3:
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i16_acq_rel_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.h.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i16_acq_rel_monotonic:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    andi a3, a0, -4
@@ -2792,6 +3173,11 @@ define void @cmpxchg_i16_acq_rel_monotonic(ptr %ptr, i16 %cmp, i16 %val) nounwin
 ; RV64IA-TSO-ZACAS-NEXT:    bnez a4, .LBB15_1
 ; RV64IA-TSO-ZACAS-NEXT:  .LBB15_3:
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i16_acq_rel_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.h a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val acq_rel monotonic
   ret void
 }
@@ -2967,6 +3353,11 @@ define void @cmpxchg_i16_acq_rel_acquire(ptr %ptr, i16 %cmp, i16 %val) nounwind
 ; RV64IA-WMO-ZACAS-NEXT:  .LBB16_3:
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i16_acq_rel_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.h.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i16_acq_rel_acquire:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    andi a3, a0, -4
@@ -3014,6 +3405,11 @@ define void @cmpxchg_i16_acq_rel_acquire(ptr %ptr, i16 %cmp, i16 %val) nounwind
 ; RV64IA-TSO-ZACAS-NEXT:    bnez a4, .LBB16_1
 ; RV64IA-TSO-ZACAS-NEXT:  .LBB16_3:
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i16_acq_rel_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.h a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val acq_rel acquire
   ret void
 }
@@ -3069,29 +3465,87 @@ define void @cmpxchg_i16_seq_cst_monotonic(ptr %ptr, i16 %cmp, i16 %val) nounwin
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: cmpxchg_i16_seq_cst_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a3, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    lui a4, 16
-; RV64IA-NEXT:    addi a4, a4, -1
-; RV64IA-NEXT:    sllw a5, a4, a0
-; RV64IA-NEXT:    and a1, a1, a4
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    and a2, a2, a4
-; RV64IA-NEXT:    sllw a0, a2, a0
-; RV64IA-NEXT:  .LBB17_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a2, (a3)
-; RV64IA-NEXT:    and a4, a2, a5
-; RV64IA-NEXT:    bne a4, a1, .LBB17_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB17_1 Depth=1
-; RV64IA-NEXT:    xor a4, a2, a0
-; RV64IA-NEXT:    and a4, a4, a5
-; RV64IA-NEXT:    xor a4, a2, a4
-; RV64IA-NEXT:    sc.w.rl a4, a4, (a3)
-; RV64IA-NEXT:    bnez a4, .LBB17_1
-; RV64IA-NEXT:  .LBB17_3:
-; RV64IA-NEXT:    ret
+; RV64IA-WMO-LABEL: cmpxchg_i16_seq_cst_monotonic:
+; RV64IA-WMO:       # %bb.0:
+; RV64IA-WMO-NEXT:    andi a3, a0, -4
+; RV64IA-WMO-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NEXT:    lui a4, 16
+; RV64IA-WMO-NEXT:    addi a4, a4, -1
+; RV64IA-WMO-NEXT:    sllw a5, a4, a0
+; RV64IA-WMO-NEXT:    and a1, a1, a4
+; RV64IA-WMO-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NEXT:    and a2, a2, a4
+; RV64IA-WMO-NEXT:    sllw a0, a2, a0
+; RV64IA-WMO-NEXT:  .LBB17_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NEXT:    lr.w.aqrl a2, (a3)
+; RV64IA-WMO-NEXT:    and a4, a2, a5
+; RV64IA-WMO-NEXT:    bne a4, a1, .LBB17_3
+; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB17_1 Depth=1
+; RV64IA-WMO-NEXT:    xor a4, a2, a0
+; RV64IA-WMO-NEXT:    and a4, a4, a5
+; RV64IA-WMO-NEXT:    xor a4, a2, a4
+; RV64IA-WMO-NEXT:    sc.w.rl a4, a4, (a3)
+; RV64IA-WMO-NEXT:    bnez a4, .LBB17_1
+; RV64IA-WMO-NEXT:  .LBB17_3:
+; RV64IA-WMO-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: cmpxchg_i16_seq_cst_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a3, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    lui a4, 16
+; RV64IA-ZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-ZACAS-NEXT:    sllw a5, a4, a0
+; RV64IA-ZACAS-NEXT:    and a1, a1, a4
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    and a2, a2, a4
+; RV64IA-ZACAS-NEXT:    sllw a0, a2, a0
+; RV64IA-ZACAS-NEXT:  .LBB17_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a2, (a3)
+; RV64IA-ZACAS-NEXT:    and a4, a2, a5
+; RV64IA-ZACAS-NEXT:    bne a4, a1, .LBB17_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB17_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a4, a2, a0
+; RV64IA-ZACAS-NEXT:    and a4, a4, a5
+; RV64IA-ZACAS-NEXT:    xor a4, a2, a4
+; RV64IA-ZACAS-NEXT:    sc.w.rl a4, a4, (a3)
+; RV64IA-ZACAS-NEXT:    bnez a4, .LBB17_1
+; RV64IA-ZACAS-NEXT:  .LBB17_3:
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i16_seq_cst_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.h.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-LABEL: cmpxchg_i16_seq_cst_monotonic:
+; RV64IA-TSO:       # %bb.0:
+; RV64IA-TSO-NEXT:    andi a3, a0, -4
+; RV64IA-TSO-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NEXT:    lui a4, 16
+; RV64IA-TSO-NEXT:    addi a4, a4, -1
+; RV64IA-TSO-NEXT:    sllw a5, a4, a0
+; RV64IA-TSO-NEXT:    and a1, a1, a4
+; RV64IA-TSO-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NEXT:    and a2, a2, a4
+; RV64IA-TSO-NEXT:    sllw a0, a2, a0
+; RV64IA-TSO-NEXT:  .LBB17_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NEXT:    lr.w.aqrl a2, (a3)
+; RV64IA-TSO-NEXT:    and a4, a2, a5
+; RV64IA-TSO-NEXT:    bne a4, a1, .LBB17_3
+; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB17_1 Depth=1
+; RV64IA-TSO-NEXT:    xor a4, a2, a0
+; RV64IA-TSO-NEXT:    and a4, a4, a5
+; RV64IA-TSO-NEXT:    xor a4, a2, a4
+; RV64IA-TSO-NEXT:    sc.w.rl a4, a4, (a3)
+; RV64IA-TSO-NEXT:    bnez a4, .LBB17_1
+; RV64IA-TSO-NEXT:  .LBB17_3:
+; RV64IA-TSO-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i16_seq_cst_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.h a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val seq_cst monotonic
   ret void
 }
@@ -3147,29 +3601,87 @@ define void @cmpxchg_i16_seq_cst_acquire(ptr %ptr, i16 %cmp, i16 %val) nounwind
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: cmpxchg_i16_seq_cst_acquire:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a3, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    lui a4, 16
-; RV64IA-NEXT:    addi a4, a4, -1
-; RV64IA-NEXT:    sllw a5, a4, a0
-; RV64IA-NEXT:    and a1, a1, a4
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    and a2, a2, a4
-; RV64IA-NEXT:    sllw a0, a2, a0
-; RV64IA-NEXT:  .LBB18_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a2, (a3)
-; RV64IA-NEXT:    and a4, a2, a5
-; RV64IA-NEXT:    bne a4, a1, .LBB18_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB18_1 Depth=1
-; RV64IA-NEXT:    xor a4, a2, a0
-; RV64IA-NEXT:    and a4, a4, a5
-; RV64IA-NEXT:    xor a4, a2, a4
-; RV64IA-NEXT:    sc.w.rl a4, a4, (a3)
-; RV64IA-NEXT:    bnez a4, .LBB18_1
-; RV64IA-NEXT:  .LBB18_3:
-; RV64IA-NEXT:    ret
+; RV64IA-WMO-LABEL: cmpxchg_i16_seq_cst_acquire:
+; RV64IA-WMO:       # %bb.0:
+; RV64IA-WMO-NEXT:    andi a3, a0, -4
+; RV64IA-WMO-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NEXT:    lui a4, 16
+; RV64IA-WMO-NEXT:    addi a4, a4, -1
+; RV64IA-WMO-NEXT:    sllw a5, a4, a0
+; RV64IA-WMO-NEXT:    and a1, a1, a4
+; RV64IA-WMO-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NEXT:    and a2, a2, a4
+; RV64IA-WMO-NEXT:    sllw a0, a2, a0
+; RV64IA-WMO-NEXT:  .LBB18_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NEXT:    lr.w.aqrl a2, (a3)
+; RV64IA-WMO-NEXT:    and a4, a2, a5
+; RV64IA-WMO-NEXT:    bne a4, a1, .LBB18_3
+; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB18_1 Depth=1
+; RV64IA-WMO-NEXT:    xor a4, a2, a0
+; RV64IA-WMO-NEXT:    and a4, a4, a5
+; RV64IA-WMO-NEXT:    xor a4, a2, a4
+; RV64IA-WMO-NEXT:    sc.w.rl a4, a4, (a3)
+; RV64IA-WMO-NEXT:    bnez a4, .LBB18_1
+; RV64IA-WMO-NEXT:  .LBB18_3:
+; RV64IA-WMO-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: cmpxchg_i16_seq_cst_acquire:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a3, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    lui a4, 16
+; RV64IA-ZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-ZACAS-NEXT:    sllw a5, a4, a0
+; RV64IA-ZACAS-NEXT:    and a1, a1, a4
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    and a2, a2, a4
+; RV64IA-ZACAS-NEXT:    sllw a0, a2, a0
+; RV64IA-ZACAS-NEXT:  .LBB18_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a2, (a3)
+; RV64IA-ZACAS-NEXT:    and a4, a2, a5
+; RV64IA-ZACAS-NEXT:    bne a4, a1, .LBB18_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB18_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a4, a2, a0
+; RV64IA-ZACAS-NEXT:    and a4, a4, a5
+; RV64IA-ZACAS-NEXT:    xor a4, a2, a4
+; RV64IA-ZACAS-NEXT:    sc.w.rl a4, a4, (a3)
+; RV64IA-ZACAS-NEXT:    bnez a4, .LBB18_1
+; RV64IA-ZACAS-NEXT:  .LBB18_3:
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i16_seq_cst_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.h.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-LABEL: cmpxchg_i16_seq_cst_acquire:
+; RV64IA-TSO:       # %bb.0:
+; RV64IA-TSO-NEXT:    andi a3, a0, -4
+; RV64IA-TSO-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NEXT:    lui a4, 16
+; RV64IA-TSO-NEXT:    addi a4, a4, -1
+; RV64IA-TSO-NEXT:    sllw a5, a4, a0
+; RV64IA-TSO-NEXT:    and a1, a1, a4
+; RV64IA-TSO-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NEXT:    and a2, a2, a4
+; RV64IA-TSO-NEXT:    sllw a0, a2, a0
+; RV64IA-TSO-NEXT:  .LBB18_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NEXT:    lr.w.aqrl a2, (a3)
+; RV64IA-TSO-NEXT:    and a4, a2, a5
+; RV64IA-TSO-NEXT:    bne a4, a1, .LBB18_3
+; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB18_1 Depth=1
+; RV64IA-TSO-NEXT:    xor a4, a2, a0
+; RV64IA-TSO-NEXT:    and a4, a4, a5
+; RV64IA-TSO-NEXT:    xor a4, a2, a4
+; RV64IA-TSO-NEXT:    sc.w.rl a4, a4, (a3)
+; RV64IA-TSO-NEXT:    bnez a4, .LBB18_1
+; RV64IA-TSO-NEXT:  .LBB18_3:
+; RV64IA-TSO-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i16_seq_cst_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.h a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val seq_cst acquire
   ret void
 }
@@ -3225,29 +3737,87 @@ define void @cmpxchg_i16_seq_cst_seq_cst(ptr %ptr, i16 %cmp, i16 %val) nounwind
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: cmpxchg_i16_seq_cst_seq_cst:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a3, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    lui a4, 16
-; RV64IA-NEXT:    addi a4, a4, -1
-; RV64IA-NEXT:    sllw a5, a4, a0
-; RV64IA-NEXT:    and a1, a1, a4
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    and a2, a2, a4
-; RV64IA-NEXT:    sllw a0, a2, a0
-; RV64IA-NEXT:  .LBB19_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a2, (a3)
-; RV64IA-NEXT:    and a4, a2, a5
-; RV64IA-NEXT:    bne a4, a1, .LBB19_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB19_1 Depth=1
-; RV64IA-NEXT:    xor a4, a2, a0
-; RV64IA-NEXT:    and a4, a4, a5
-; RV64IA-NEXT:    xor a4, a2, a4
-; RV64IA-NEXT:    sc.w.rl a4, a4, (a3)
-; RV64IA-NEXT:    bnez a4, .LBB19_1
-; RV64IA-NEXT:  .LBB19_3:
-; RV64IA-NEXT:    ret
+; RV64IA-WMO-LABEL: cmpxchg_i16_seq_cst_seq_cst:
+; RV64IA-WMO:       # %bb.0:
+; RV64IA-WMO-NEXT:    andi a3, a0, -4
+; RV64IA-WMO-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NEXT:    lui a4, 16
+; RV64IA-WMO-NEXT:    addi a4, a4, -1
+; RV64IA-WMO-NEXT:    sllw a5, a4, a0
+; RV64IA-WMO-NEXT:    and a1, a1, a4
+; RV64IA-WMO-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NEXT:    and a2, a2, a4
+; RV64IA-WMO-NEXT:    sllw a0, a2, a0
+; RV64IA-WMO-NEXT:  .LBB19_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NEXT:    lr.w.aqrl a2, (a3)
+; RV64IA-WMO-NEXT:    and a4, a2, a5
+; RV64IA-WMO-NEXT:    bne a4, a1, .LBB19_3
+; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB19_1 Depth=1
+; RV64IA-WMO-NEXT:    xor a4, a2, a0
+; RV64IA-WMO-NEXT:    and a4, a4, a5
+; RV64IA-WMO-NEXT:    xor a4, a2, a4
+; RV64IA-WMO-NEXT:    sc.w.rl a4, a4, (a3)
+; RV64IA-WMO-NEXT:    bnez a4, .LBB19_1
+; RV64IA-WMO-NEXT:  .LBB19_3:
+; RV64IA-WMO-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: cmpxchg_i16_seq_cst_seq_cst:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a3, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    lui a4, 16
+; RV64IA-ZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-ZACAS-NEXT:    sllw a5, a4, a0
+; RV64IA-ZACAS-NEXT:    and a1, a1, a4
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    and a2, a2, a4
+; RV64IA-ZACAS-NEXT:    sllw a0, a2, a0
+; RV64IA-ZACAS-NEXT:  .LBB19_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a2, (a3)
+; RV64IA-ZACAS-NEXT:    and a4, a2, a5
+; RV64IA-ZACAS-NEXT:    bne a4, a1, .LBB19_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB19_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a4, a2, a0
+; RV64IA-ZACAS-NEXT:    and a4, a4, a5
+; RV64IA-ZACAS-NEXT:    xor a4, a2, a4
+; RV64IA-ZACAS-NEXT:    sc.w.rl a4, a4, (a3)
+; RV64IA-ZACAS-NEXT:    bnez a4, .LBB19_1
+; RV64IA-ZACAS-NEXT:  .LBB19_3:
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i16_seq_cst_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.h.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-LABEL: cmpxchg_i16_seq_cst_seq_cst:
+; RV64IA-TSO:       # %bb.0:
+; RV64IA-TSO-NEXT:    andi a3, a0, -4
+; RV64IA-TSO-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NEXT:    lui a4, 16
+; RV64IA-TSO-NEXT:    addi a4, a4, -1
+; RV64IA-TSO-NEXT:    sllw a5, a4, a0
+; RV64IA-TSO-NEXT:    and a1, a1, a4
+; RV64IA-TSO-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NEXT:    and a2, a2, a4
+; RV64IA-TSO-NEXT:    sllw a0, a2, a0
+; RV64IA-TSO-NEXT:  .LBB19_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NEXT:    lr.w.aqrl a2, (a3)
+; RV64IA-TSO-NEXT:    and a4, a2, a5
+; RV64IA-TSO-NEXT:    bne a4, a1, .LBB19_3
+; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB19_1 Depth=1
+; RV64IA-TSO-NEXT:    xor a4, a2, a0
+; RV64IA-TSO-NEXT:    and a4, a4, a5
+; RV64IA-TSO-NEXT:    xor a4, a2, a4
+; RV64IA-TSO-NEXT:    sc.w.rl a4, a4, (a3)
+; RV64IA-TSO-NEXT:    bnez a4, .LBB19_1
+; RV64IA-TSO-NEXT:  .LBB19_3:
+; RV64IA-TSO-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i16_seq_cst_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.h a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val seq_cst seq_cst
   ret void
 }
@@ -3323,6 +3893,11 @@ define void @cmpxchg_i32_monotonic_monotonic(ptr %ptr, i32 %cmp, i32 %val) nounw
 ; RV64IA-ZACAS-NEXT:    amocas.w a1, a2, (a0)
 ; RV64IA-ZACAS-NEXT:    ret
 ;
+; RV64IA-ZABHA-LABEL: cmpxchg_i32_monotonic_monotonic:
+; RV64IA-ZABHA:       # %bb.0:
+; RV64IA-ZABHA-NEXT:    amocas.w a1, a2, (a0)
+; RV64IA-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i32_monotonic_monotonic:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    sext.w a1, a1
@@ -3414,6 +3989,11 @@ define void @cmpxchg_i32_acquire_monotonic(ptr %ptr, i32 %cmp, i32 %val) nounwin
 ; RV64IA-WMO-ZACAS-NEXT:    amocas.w.aq a1, a2, (a0)
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i32_acquire_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.w.aq a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i32_acquire_monotonic:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    sext.w a1, a1
@@ -3430,6 +4010,11 @@ define void @cmpxchg_i32_acquire_monotonic(ptr %ptr, i32 %cmp, i32 %val) nounwin
 ; RV64IA-TSO-ZACAS:       # %bb.0:
 ; RV64IA-TSO-ZACAS-NEXT:    amocas.w a1, a2, (a0)
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i32_acquire_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.w a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val acquire monotonic
   ret void
 }
@@ -3510,6 +4095,11 @@ define void @cmpxchg_i32_acquire_acquire(ptr %ptr, i32 %cmp, i32 %val) nounwind
 ; RV64IA-WMO-ZACAS-NEXT:    amocas.w.aq a1, a2, (a0)
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i32_acquire_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.w.aq a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i32_acquire_acquire:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    sext.w a1, a1
@@ -3526,6 +4116,11 @@ define void @cmpxchg_i32_acquire_acquire(ptr %ptr, i32 %cmp, i32 %val) nounwind
 ; RV64IA-TSO-ZACAS:       # %bb.0:
 ; RV64IA-TSO-ZACAS-NEXT:    amocas.w a1, a2, (a0)
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i32_acquire_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.w a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val acquire acquire
   ret void
 }
@@ -3606,6 +4201,11 @@ define void @cmpxchg_i32_release_monotonic(ptr %ptr, i32 %cmp, i32 %val) nounwin
 ; RV64IA-WMO-ZACAS-NEXT:    amocas.w.rl a1, a2, (a0)
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i32_release_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.w.rl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i32_release_monotonic:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    sext.w a1, a1
@@ -3622,6 +4222,11 @@ define void @cmpxchg_i32_release_monotonic(ptr %ptr, i32 %cmp, i32 %val) nounwin
 ; RV64IA-TSO-ZACAS:       # %bb.0:
 ; RV64IA-TSO-ZACAS-NEXT:    amocas.w a1, a2, (a0)
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i32_release_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.w a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val release monotonic
   ret void
 }
@@ -3702,6 +4307,11 @@ define void @cmpxchg_i32_release_acquire(ptr %ptr, i32 %cmp, i32 %val) nounwind
 ; RV64IA-WMO-ZACAS-NEXT:    amocas.w.aqrl a1, a2, (a0)
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i32_release_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.w.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i32_release_acquire:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    sext.w a1, a1
@@ -3718,6 +4328,11 @@ define void @cmpxchg_i32_release_acquire(ptr %ptr, i32 %cmp, i32 %val) nounwind
 ; RV64IA-TSO-ZACAS:       # %bb.0:
 ; RV64IA-TSO-ZACAS-NEXT:    amocas.w a1, a2, (a0)
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i32_release_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.w a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val release acquire
   ret void
 }
@@ -3798,6 +4413,11 @@ define void @cmpxchg_i32_acq_rel_monotonic(ptr %ptr, i32 %cmp, i32 %val) nounwin
 ; RV64IA-WMO-ZACAS-NEXT:    amocas.w.aqrl a1, a2, (a0)
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i32_acq_rel_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.w.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i32_acq_rel_monotonic:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    sext.w a1, a1
@@ -3814,6 +4434,11 @@ define void @cmpxchg_i32_acq_rel_monotonic(ptr %ptr, i32 %cmp, i32 %val) nounwin
 ; RV64IA-TSO-ZACAS:       # %bb.0:
 ; RV64IA-TSO-ZACAS-NEXT:    amocas.w a1, a2, (a0)
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i32_acq_rel_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.w a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val acq_rel monotonic
   ret void
 }
@@ -3894,6 +4519,11 @@ define void @cmpxchg_i32_acq_rel_acquire(ptr %ptr, i32 %cmp, i32 %val) nounwind
 ; RV64IA-WMO-ZACAS-NEXT:    amocas.w.aqrl a1, a2, (a0)
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i32_acq_rel_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.w.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i32_acq_rel_acquire:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    sext.w a1, a1
@@ -3910,6 +4540,11 @@ define void @cmpxchg_i32_acq_rel_acquire(ptr %ptr, i32 %cmp, i32 %val) nounwind
 ; RV64IA-TSO-ZACAS:       # %bb.0:
 ; RV64IA-TSO-ZACAS-NEXT:    amocas.w a1, a2, (a0)
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i32_acq_rel_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.w a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val acq_rel acquire
   ret void
 }
@@ -3990,6 +4625,11 @@ define void @cmpxchg_i32_seq_cst_monotonic(ptr %ptr, i32 %cmp, i32 %val) nounwin
 ; RV64IA-WMO-ZACAS-NEXT:    amocas.w.aqrl a1, a2, (a0)
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i32_seq_cst_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.w.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i32_seq_cst_monotonic:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    sext.w a1, a1
@@ -4006,6 +4646,11 @@ define void @cmpxchg_i32_seq_cst_monotonic(ptr %ptr, i32 %cmp, i32 %val) nounwin
 ; RV64IA-TSO-ZACAS:       # %bb.0:
 ; RV64IA-TSO-ZACAS-NEXT:    amocas.w a1, a2, (a0)
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i32_seq_cst_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.w a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val seq_cst monotonic
   ret void
 }
@@ -4086,6 +4731,11 @@ define void @cmpxchg_i32_seq_cst_acquire(ptr %ptr, i32 %cmp, i32 %val) nounwind
 ; RV64IA-WMO-ZACAS-NEXT:    amocas.w.aqrl a1, a2, (a0)
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i32_seq_cst_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.w.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i32_seq_cst_acquire:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    sext.w a1, a1
@@ -4102,6 +4752,11 @@ define void @cmpxchg_i32_seq_cst_acquire(ptr %ptr, i32 %cmp, i32 %val) nounwind
 ; RV64IA-TSO-ZACAS:       # %bb.0:
 ; RV64IA-TSO-ZACAS-NEXT:    amocas.w a1, a2, (a0)
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i32_seq_cst_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.w a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val seq_cst acquire
   ret void
 }
@@ -4182,6 +4837,11 @@ define void @cmpxchg_i32_seq_cst_seq_cst(ptr %ptr, i32 %cmp, i32 %val) nounwind
 ; RV64IA-WMO-ZACAS-NEXT:    amocas.w.aqrl a1, a2, (a0)
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i32_seq_cst_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.w.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i32_seq_cst_seq_cst:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:    sext.w a1, a1
@@ -4198,6 +4858,11 @@ define void @cmpxchg_i32_seq_cst_seq_cst(ptr %ptr, i32 %cmp, i32 %val) nounwind
 ; RV64IA-TSO-ZACAS:       # %bb.0:
 ; RV64IA-TSO-ZACAS-NEXT:    amocas.w a1, a2, (a0)
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i32_seq_cst_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.w a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val seq_cst seq_cst
   ret void
 }
@@ -4264,6 +4929,11 @@ define void @cmpxchg_i64_monotonic_monotonic(ptr %ptr, i64 %cmp, i64 %val) nounw
 ; RV64IA-ZACAS-NEXT:    amocas.d a1, a2, (a0)
 ; RV64IA-ZACAS-NEXT:    ret
 ;
+; RV64IA-ZABHA-LABEL: cmpxchg_i64_monotonic_monotonic:
+; RV64IA-ZABHA:       # %bb.0:
+; RV64IA-ZABHA-NEXT:    amocas.d a1, a2, (a0)
+; RV64IA-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i64_monotonic_monotonic:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:  .LBB30_1: # =>This Inner Loop Header: Depth=1
@@ -4342,6 +5012,11 @@ define void @cmpxchg_i64_acquire_monotonic(ptr %ptr, i64 %cmp, i64 %val) nounwin
 ; RV64IA-WMO-ZACAS-NEXT:    amocas.d.aq a1, a2, (a0)
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i64_acquire_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.d.aq a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i64_acquire_monotonic:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:  .LBB31_1: # =>This Inner Loop Header: Depth=1
@@ -4357,6 +5032,11 @@ define void @cmpxchg_i64_acquire_monotonic(ptr %ptr, i64 %cmp, i64 %val) nounwin
 ; RV64IA-TSO-ZACAS:       # %bb.0:
 ; RV64IA-TSO-ZACAS-NEXT:    amocas.d a1, a2, (a0)
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i64_acquire_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.d a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val acquire monotonic
   ret void
 }
@@ -4425,6 +5105,11 @@ define void @cmpxchg_i64_acquire_acquire(ptr %ptr, i64 %cmp, i64 %val) nounwind
 ; RV64IA-WMO-ZACAS-NEXT:    amocas.d.aq a1, a2, (a0)
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i64_acquire_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.d.aq a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i64_acquire_acquire:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:  .LBB32_1: # =>This Inner Loop Header: Depth=1
@@ -4440,6 +5125,11 @@ define void @cmpxchg_i64_acquire_acquire(ptr %ptr, i64 %cmp, i64 %val) nounwind
 ; RV64IA-TSO-ZACAS:       # %bb.0:
 ; RV64IA-TSO-ZACAS-NEXT:    amocas.d a1, a2, (a0)
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i64_acquire_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.d a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val acquire acquire
   ret void
 }
@@ -4508,6 +5198,11 @@ define void @cmpxchg_i64_release_monotonic(ptr %ptr, i64 %cmp, i64 %val) nounwin
 ; RV64IA-WMO-ZACAS-NEXT:    amocas.d.rl a1, a2, (a0)
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i64_release_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.d.rl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i64_release_monotonic:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:  .LBB33_1: # =>This Inner Loop Header: Depth=1
@@ -4523,6 +5218,11 @@ define void @cmpxchg_i64_release_monotonic(ptr %ptr, i64 %cmp, i64 %val) nounwin
 ; RV64IA-TSO-ZACAS:       # %bb.0:
 ; RV64IA-TSO-ZACAS-NEXT:    amocas.d a1, a2, (a0)
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i64_release_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.d a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val release monotonic
   ret void
 }
@@ -4591,6 +5291,11 @@ define void @cmpxchg_i64_release_acquire(ptr %ptr, i64 %cmp, i64 %val) nounwind
 ; RV64IA-WMO-ZACAS-NEXT:    amocas.d.aqrl a1, a2, (a0)
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i64_release_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.d.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i64_release_acquire:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:  .LBB34_1: # =>This Inner Loop Header: Depth=1
@@ -4606,6 +5311,11 @@ define void @cmpxchg_i64_release_acquire(ptr %ptr, i64 %cmp, i64 %val) nounwind
 ; RV64IA-TSO-ZACAS:       # %bb.0:
 ; RV64IA-TSO-ZACAS-NEXT:    amocas.d a1, a2, (a0)
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i64_release_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.d a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val release acquire
   ret void
 }
@@ -4674,6 +5384,11 @@ define void @cmpxchg_i64_acq_rel_monotonic(ptr %ptr, i64 %cmp, i64 %val) nounwin
 ; RV64IA-WMO-ZACAS-NEXT:    amocas.d.aqrl a1, a2, (a0)
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i64_acq_rel_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.d.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i64_acq_rel_monotonic:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:  .LBB35_1: # =>This Inner Loop Header: Depth=1
@@ -4689,6 +5404,11 @@ define void @cmpxchg_i64_acq_rel_monotonic(ptr %ptr, i64 %cmp, i64 %val) nounwin
 ; RV64IA-TSO-ZACAS:       # %bb.0:
 ; RV64IA-TSO-ZACAS-NEXT:    amocas.d a1, a2, (a0)
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i64_acq_rel_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.d a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val acq_rel monotonic
   ret void
 }
@@ -4757,6 +5477,11 @@ define void @cmpxchg_i64_acq_rel_acquire(ptr %ptr, i64 %cmp, i64 %val) nounwind
 ; RV64IA-WMO-ZACAS-NEXT:    amocas.d.aqrl a1, a2, (a0)
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i64_acq_rel_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.d.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i64_acq_rel_acquire:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:  .LBB36_1: # =>This Inner Loop Header: Depth=1
@@ -4772,6 +5497,11 @@ define void @cmpxchg_i64_acq_rel_acquire(ptr %ptr, i64 %cmp, i64 %val) nounwind
 ; RV64IA-TSO-ZACAS:       # %bb.0:
 ; RV64IA-TSO-ZACAS-NEXT:    amocas.d a1, a2, (a0)
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i64_acq_rel_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.d a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val acq_rel acquire
   ret void
 }
@@ -4840,6 +5570,11 @@ define void @cmpxchg_i64_seq_cst_monotonic(ptr %ptr, i64 %cmp, i64 %val) nounwin
 ; RV64IA-WMO-ZACAS-NEXT:    amocas.d.aqrl a1, a2, (a0)
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i64_seq_cst_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.d.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i64_seq_cst_monotonic:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:  .LBB37_1: # =>This Inner Loop Header: Depth=1
@@ -4855,6 +5590,11 @@ define void @cmpxchg_i64_seq_cst_monotonic(ptr %ptr, i64 %cmp, i64 %val) nounwin
 ; RV64IA-TSO-ZACAS:       # %bb.0:
 ; RV64IA-TSO-ZACAS-NEXT:    amocas.d a1, a2, (a0)
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i64_seq_cst_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.d a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val seq_cst monotonic
   ret void
 }
@@ -4923,6 +5663,11 @@ define void @cmpxchg_i64_seq_cst_acquire(ptr %ptr, i64 %cmp, i64 %val) nounwind
 ; RV64IA-WMO-ZACAS-NEXT:    amocas.d.aqrl a1, a2, (a0)
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i64_seq_cst_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.d.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i64_seq_cst_acquire:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:  .LBB38_1: # =>This Inner Loop Header: Depth=1
@@ -4938,6 +5683,11 @@ define void @cmpxchg_i64_seq_cst_acquire(ptr %ptr, i64 %cmp, i64 %val) nounwind
 ; RV64IA-TSO-ZACAS:       # %bb.0:
 ; RV64IA-TSO-ZACAS-NEXT:    amocas.d a1, a2, (a0)
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i64_seq_cst_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.d a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val seq_cst acquire
   ret void
 }
@@ -5006,6 +5756,11 @@ define void @cmpxchg_i64_seq_cst_seq_cst(ptr %ptr, i64 %cmp, i64 %val) nounwind
 ; RV64IA-WMO-ZACAS-NEXT:    amocas.d.aqrl a1, a2, (a0)
 ; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
+; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i64_seq_cst_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amocas.d.aqrl a1, a2, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
 ; RV64IA-TSO-LABEL: cmpxchg_i64_seq_cst_seq_cst:
 ; RV64IA-TSO:       # %bb.0:
 ; RV64IA-TSO-NEXT:  .LBB39_1: # =>This Inner Loop Header: Depth=1
@@ -5021,6 +5776,13 @@ define void @cmpxchg_i64_seq_cst_seq_cst(ptr %ptr, i64 %cmp, i64 %val) nounwind
 ; RV64IA-TSO-ZACAS:       # %bb.0:
 ; RV64IA-TSO-ZACAS-NEXT:    amocas.d a1, a2, (a0)
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i64_seq_cst_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amocas.d a1, a2, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val seq_cst seq_cst
   ret void
 }
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; RV64IA: {{.*}}
diff --git a/llvm/test/CodeGen/RISCV/atomic-rmw.ll b/llvm/test/CodeGen/RISCV/atomic-rmw.ll
index 62206a6a2ece53..8c08454b4e954a 100644
--- a/llvm/test/CodeGen/RISCV/atomic-rmw.ll
+++ b/llvm/test/CodeGen/RISCV/atomic-rmw.ll
@@ -21,6 +21,15 @@
 ; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso,+experimental-zacas -verify-machineinstrs < %s \
 ; RUN:   | FileCheck -check-prefixes=RV64IA,RV64IA-ZACAS,RV64IA-TSO,RV64IA-TSO-ZACAS %s
 
+; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-zabha -verify-machineinstrs < %s \
+; RUN:   | FileCheck -check-prefixes=RV64IA,RV64IA-WMO,RV64IA-WMO-ZABHA,RV64IA-WMO-ZABHA-NOZACAS %s
+; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso,+experimental-zabha -verify-machineinstrs < %s \
+; RUN:   | FileCheck -check-prefixes=RV64IA,RV64IA-TSO,RV64IA-TSO-ZABHA,RV64IA-TSO-ZABHA-NOZACAS %s
+; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-zabha,+experimental-zacas -verify-machineinstrs < %s \
+; RUN:   | FileCheck -check-prefixes=RV64IA,RV64IA-WMO,RV64IA-WMO-ZABHA,RV64IA-WMO-ZABHA-ZACAS %s
+; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso,+experimental-zabha,+experimental-zacas -verify-machineinstrs < %s \
+; RUN:   | FileCheck -check-prefixes=RV64IA,RV64IA-TSO,RV64IA-TSO-ZABHA,RV64IA-TSO-ZABHA-ZACAS %s
+
 define i8 @atomicrmw_xchg_i8_monotonic(ptr %a, i8 %b) nounwind {
 ; RV32I-LABEL: atomicrmw_xchg_i8_monotonic:
 ; RV32I:       # %bb.0:
@@ -62,25 +71,55 @@ define i8 @atomicrmw_xchg_i8_monotonic(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_xchg_i8_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    li a3, 255
-; RV64IA-NEXT:    sllw a3, a3, a0
-; RV64IA-NEXT:    andi a1, a1, 255
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB0_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w a4, (a2)
-; RV64IA-NEXT:    mv a5, a1
-; RV64IA-NEXT:    xor a5, a4, a5
-; RV64IA-NEXT:    and a5, a5, a3
-; RV64IA-NEXT:    xor a5, a4, a5
-; RV64IA-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB0_1
-; RV64IA-NEXT:  # %bb.2:
-; RV64IA-NEXT:    srlw a0, a4, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_xchg_i8_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB0_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-NOZACAS-NEXT:    mv a5, a1
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB0_1
+; RV64IA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_xchg_i8_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    li a3, 255
+; RV64IA-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB0_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-ZACAS-NEXT:    mv a5, a1
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB0_1
+; RV64IA-ZACAS-NEXT:  # %bb.2:
+; RV64IA-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i8_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.b a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_i8_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i8 %b monotonic
   ret i8 %1
 }
@@ -146,45 +185,95 @@ define i8 @atomicrmw_xchg_i8_acquire(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_i8_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB1_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a4, (a2)
-; RV64IA-WMO-NEXT:    mv a5, a1
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a3
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB1_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a4, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_i8_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB1_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    mv a5, a1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB1_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_i8_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB1_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a4, (a2)
-; RV64IA-TSO-NEXT:    mv a5, a1
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a3
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB1_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a4, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_i8_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB1_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    mv a5, a1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB1_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_i8_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB1_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    mv a5, a1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB1_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_i8_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB1_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    mv a5, a1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB1_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i8_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.b.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_i8_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i8 %b acquire
   ret i8 %1
 }
@@ -250,45 +339,95 @@ define i8 @atomicrmw_xchg_i8_release(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_i8_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB2_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w a4, (a2)
-; RV64IA-WMO-NEXT:    mv a5, a1
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a3
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB2_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a4, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_i8_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB2_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    mv a5, a1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB2_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_i8_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB2_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a4, (a2)
-; RV64IA-TSO-NEXT:    mv a5, a1
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a3
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB2_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a4, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_i8_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB2_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    mv a5, a1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB2_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_i8_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB2_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    mv a5, a1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB2_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_i8_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB2_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    mv a5, a1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB2_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i8_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.b.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_i8_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i8 %b release
   ret i8 %1
 }
@@ -354,45 +493,95 @@ define i8 @atomicrmw_xchg_i8_acq_rel(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_i8_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB3_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a4, (a2)
-; RV64IA-WMO-NEXT:    mv a5, a1
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a3
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB3_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a4, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_i8_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB3_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    mv a5, a1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB3_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_i8_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB3_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a4, (a2)
-; RV64IA-TSO-NEXT:    mv a5, a1
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a3
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB3_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a4, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_i8_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB3_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    mv a5, a1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB3_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_i8_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB3_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    mv a5, a1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB3_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_i8_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB3_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    mv a5, a1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB3_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i8_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_i8_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i8 %b acq_rel
   ret i8 %1
 }
@@ -438,25 +627,55 @@ define i8 @atomicrmw_xchg_i8_seq_cst(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_xchg_i8_seq_cst:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    li a3, 255
-; RV64IA-NEXT:    sllw a3, a3, a0
-; RV64IA-NEXT:    andi a1, a1, 255
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB4_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a4, (a2)
-; RV64IA-NEXT:    mv a5, a1
-; RV64IA-NEXT:    xor a5, a4, a5
-; RV64IA-NEXT:    and a5, a5, a3
-; RV64IA-NEXT:    xor a5, a4, a5
-; RV64IA-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB4_1
-; RV64IA-NEXT:  # %bb.2:
-; RV64IA-NEXT:    srlw a0, a4, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_xchg_i8_seq_cst:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB4_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w.aqrl a4, (a2)
+; RV64IA-NOZACAS-NEXT:    mv a5, a1
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB4_1
+; RV64IA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_xchg_i8_seq_cst:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    li a3, 255
+; RV64IA-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB4_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a4, (a2)
+; RV64IA-ZACAS-NEXT:    mv a5, a1
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB4_1
+; RV64IA-ZACAS-NEXT:  # %bb.2:
+; RV64IA-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i8_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_i8_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i8 %b seq_cst
   ret i8 %1
 }
@@ -498,16 +717,37 @@ define i8 @atomicrmw_xchg_0_i8_monotonic(ptr %a) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_xchg_0_i8_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a1, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    li a2, 255
-; RV64IA-NEXT:    sllw a2, a2, a0
-; RV64IA-NEXT:    not a2, a2
-; RV64IA-NEXT:    amoand.w a1, a2, (a1)
-; RV64IA-NEXT:    srlw a0, a1, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_xchg_0_i8_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    li a2, 255
+; RV64IA-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-NOZACAS-NEXT:    not a2, a2
+; RV64IA-NOZACAS-NEXT:    amoand.w a1, a2, (a1)
+; RV64IA-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_xchg_0_i8_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    li a2, 255
+; RV64IA-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-ZACAS-NEXT:    not a2, a2
+; RV64IA-ZACAS-NEXT:    amoand.w a1, a2, (a1)
+; RV64IA-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i8_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.b a0, zero, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_0_i8_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.b a0, zero, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i8 0 monotonic
   ret i8 %1
 }
@@ -557,27 +797,59 @@ define i8 @atomicrmw_xchg_0_i8_acquire(ptr %a) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_0_i8_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a1, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a2, 255
-; RV64IA-WMO-NEXT:    sllw a2, a2, a0
-; RV64IA-WMO-NEXT:    not a2, a2
-; RV64IA-WMO-NEXT:    amoand.w.aq a1, a2, (a1)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_0_i8_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a2, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-NOZACAS-NEXT:    not a2, a2
+; RV64IA-WMO-NOZACAS-NEXT:    amoand.w.aq a1, a2, (a1)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_0_i8_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a1, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a2, 255
-; RV64IA-TSO-NEXT:    sllw a2, a2, a0
-; RV64IA-TSO-NEXT:    not a2, a2
-; RV64IA-TSO-NEXT:    amoand.w a1, a2, (a1)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_0_i8_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a2, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-NOZACAS-NEXT:    not a2, a2
+; RV64IA-TSO-NOZACAS-NEXT:    amoand.w a1, a2, (a1)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i8_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a2, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-ZACAS-NEXT:    not a2, a2
+; RV64IA-WMO-ZACAS-NEXT:    amoand.w.aq a1, a2, (a1)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_0_i8_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a2, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-ZACAS-NEXT:    not a2, a2
+; RV64IA-TSO-ZACAS-NEXT:    amoand.w a1, a2, (a1)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i8_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.b.aq a0, zero, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_0_i8_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.b a0, zero, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i8 0 acquire
   ret i8 %1
 }
@@ -627,27 +899,59 @@ define i8 @atomicrmw_xchg_0_i8_release(ptr %a) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_0_i8_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a1, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a2, 255
-; RV64IA-WMO-NEXT:    sllw a2, a2, a0
-; RV64IA-WMO-NEXT:    not a2, a2
-; RV64IA-WMO-NEXT:    amoand.w.rl a1, a2, (a1)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_0_i8_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a2, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-NOZACAS-NEXT:    not a2, a2
+; RV64IA-WMO-NOZACAS-NEXT:    amoand.w.rl a1, a2, (a1)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_0_i8_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a1, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a2, 255
-; RV64IA-TSO-NEXT:    sllw a2, a2, a0
-; RV64IA-TSO-NEXT:    not a2, a2
-; RV64IA-TSO-NEXT:    amoand.w a1, a2, (a1)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_0_i8_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a2, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-NOZACAS-NEXT:    not a2, a2
+; RV64IA-TSO-NOZACAS-NEXT:    amoand.w a1, a2, (a1)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i8_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a2, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-ZACAS-NEXT:    not a2, a2
+; RV64IA-WMO-ZACAS-NEXT:    amoand.w.rl a1, a2, (a1)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_0_i8_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a2, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-ZACAS-NEXT:    not a2, a2
+; RV64IA-TSO-ZACAS-NEXT:    amoand.w a1, a2, (a1)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i8_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.b.rl a0, zero, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_0_i8_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.b a0, zero, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i8 0 release
   ret i8 %1
 }
@@ -697,27 +1001,59 @@ define i8 @atomicrmw_xchg_0_i8_acq_rel(ptr %a) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_0_i8_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a1, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a2, 255
-; RV64IA-WMO-NEXT:    sllw a2, a2, a0
-; RV64IA-WMO-NEXT:    not a2, a2
-; RV64IA-WMO-NEXT:    amoand.w.aqrl a1, a2, (a1)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_0_i8_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a2, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-NOZACAS-NEXT:    not a2, a2
+; RV64IA-WMO-NOZACAS-NEXT:    amoand.w.aqrl a1, a2, (a1)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_0_i8_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a1, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a2, 255
-; RV64IA-TSO-NEXT:    sllw a2, a2, a0
-; RV64IA-TSO-NEXT:    not a2, a2
-; RV64IA-TSO-NEXT:    amoand.w a1, a2, (a1)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_0_i8_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a2, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-NOZACAS-NEXT:    not a2, a2
+; RV64IA-TSO-NOZACAS-NEXT:    amoand.w a1, a2, (a1)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i8_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a2, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-ZACAS-NEXT:    not a2, a2
+; RV64IA-WMO-ZACAS-NEXT:    amoand.w.aqrl a1, a2, (a1)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_0_i8_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a2, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-ZACAS-NEXT:    not a2, a2
+; RV64IA-TSO-ZACAS-NEXT:    amoand.w a1, a2, (a1)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i8_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.b.aqrl a0, zero, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_0_i8_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.b a0, zero, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i8 0 acq_rel
   ret i8 %1
 }
@@ -767,27 +1103,59 @@ define i8 @atomicrmw_xchg_0_i8_seq_cst(ptr %a) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_0_i8_seq_cst:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a1, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a2, 255
-; RV64IA-WMO-NEXT:    sllw a2, a2, a0
-; RV64IA-WMO-NEXT:    not a2, a2
-; RV64IA-WMO-NEXT:    amoand.w.aqrl a1, a2, (a1)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_0_i8_seq_cst:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a2, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-NOZACAS-NEXT:    not a2, a2
+; RV64IA-WMO-NOZACAS-NEXT:    amoand.w.aqrl a1, a2, (a1)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_0_i8_seq_cst:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a1, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a2, 255
-; RV64IA-TSO-NEXT:    sllw a2, a2, a0
-; RV64IA-TSO-NEXT:    not a2, a2
-; RV64IA-TSO-NEXT:    amoand.w a1, a2, (a1)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_0_i8_seq_cst:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a2, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-NOZACAS-NEXT:    not a2, a2
+; RV64IA-TSO-NOZACAS-NEXT:    amoand.w a1, a2, (a1)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i8_seq_cst:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a2, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-ZACAS-NEXT:    not a2, a2
+; RV64IA-WMO-ZACAS-NEXT:    amoand.w.aqrl a1, a2, (a1)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_0_i8_seq_cst:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a2, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-ZACAS-NEXT:    not a2, a2
+; RV64IA-TSO-ZACAS-NEXT:    amoand.w a1, a2, (a1)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i8_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.b.aqrl a0, zero, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_0_i8_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.b a0, zero, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i8 0 seq_cst
   ret i8 %1
 }
@@ -825,15 +1193,37 @@ define i8 @atomicrmw_xchg_minus_1_i8_monotonic(ptr %a) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_xchg_minus_1_i8_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a1, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    li a2, 255
-; RV64IA-NEXT:    sllw a2, a2, a0
-; RV64IA-NEXT:    amoor.w a1, a2, (a1)
-; RV64IA-NEXT:    srlw a0, a1, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i8_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    li a2, 255
+; RV64IA-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-NOZACAS-NEXT:    amoor.w a1, a2, (a1)
+; RV64IA-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    li a2, 255
+; RV64IA-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-ZACAS-NEXT:    amoor.w a1, a2, (a1)
+; RV64IA-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    li a1, -1
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.b a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    li a1, -1
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i8 -1 monotonic
   ret i8 %1
 }
@@ -881,25 +1271,57 @@ define i8 @atomicrmw_xchg_minus_1_i8_acquire(ptr %a) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_minus_1_i8_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a1, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a2, 255
-; RV64IA-WMO-NEXT:    sllw a2, a2, a0
-; RV64IA-WMO-NEXT:    amoor.w.aq a1, a2, (a1)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i8_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a2, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoor.w.aq a1, a2, (a1)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_minus_1_i8_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a1, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a2, 255
-; RV64IA-TSO-NEXT:    sllw a2, a2, a0
-; RV64IA-TSO-NEXT:    amoor.w a1, a2, (a1)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i8_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a2, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoor.w a1, a2, (a1)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a2, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoor.w.aq a1, a2, (a1)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a2, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoor.w a1, a2, (a1)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    li a1, -1
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.b.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    li a1, -1
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i8 -1 acquire
   ret i8 %1
 }
@@ -947,25 +1369,57 @@ define i8 @atomicrmw_xchg_minus_1_i8_release(ptr %a) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_minus_1_i8_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a1, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a2, 255
-; RV64IA-WMO-NEXT:    sllw a2, a2, a0
-; RV64IA-WMO-NEXT:    amoor.w.rl a1, a2, (a1)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i8_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a2, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoor.w.rl a1, a2, (a1)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_minus_1_i8_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a1, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a2, 255
-; RV64IA-TSO-NEXT:    sllw a2, a2, a0
-; RV64IA-TSO-NEXT:    amoor.w a1, a2, (a1)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i8_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a2, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoor.w a1, a2, (a1)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a2, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoor.w.rl a1, a2, (a1)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a2, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoor.w a1, a2, (a1)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    li a1, -1
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.b.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    li a1, -1
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i8 -1 release
   ret i8 %1
 }
@@ -1013,25 +1467,57 @@ define i8 @atomicrmw_xchg_minus_1_i8_acq_rel(ptr %a) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a1, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a2, 255
-; RV64IA-WMO-NEXT:    sllw a2, a2, a0
-; RV64IA-WMO-NEXT:    amoor.w.aqrl a1, a2, (a1)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a2, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoor.w.aqrl a1, a2, (a1)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a1, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a2, 255
-; RV64IA-TSO-NEXT:    sllw a2, a2, a0
-; RV64IA-TSO-NEXT:    amoor.w a1, a2, (a1)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a2, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoor.w a1, a2, (a1)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a2, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoor.w.aqrl a1, a2, (a1)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a2, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoor.w a1, a2, (a1)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    li a1, -1
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    li a1, -1
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i8 -1 acq_rel
   ret i8 %1
 }
@@ -1079,25 +1565,57 @@ define i8 @atomicrmw_xchg_minus_1_i8_seq_cst(ptr %a) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a1, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a2, 255
-; RV64IA-WMO-NEXT:    sllw a2, a2, a0
-; RV64IA-WMO-NEXT:    amoor.w.aqrl a1, a2, (a1)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a2, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoor.w.aqrl a1, a2, (a1)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a1, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a2, 255
-; RV64IA-TSO-NEXT:    sllw a2, a2, a0
-; RV64IA-TSO-NEXT:    amoor.w a1, a2, (a1)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a2, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoor.w a1, a2, (a1)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a2, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoor.w.aqrl a1, a2, (a1)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a2, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoor.w a1, a2, (a1)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    li a1, -1
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    li a1, -1
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i8 -1 seq_cst
   ret i8 %1
 }
@@ -1143,25 +1661,55 @@ define i8 @atomicrmw_add_i8_monotonic(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_add_i8_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    li a3, 255
-; RV64IA-NEXT:    sllw a3, a3, a0
-; RV64IA-NEXT:    andi a1, a1, 255
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB15_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w a4, (a2)
-; RV64IA-NEXT:    add a5, a4, a1
-; RV64IA-NEXT:    xor a5, a4, a5
-; RV64IA-NEXT:    and a5, a5, a3
-; RV64IA-NEXT:    xor a5, a4, a5
-; RV64IA-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB15_1
-; RV64IA-NEXT:  # %bb.2:
-; RV64IA-NEXT:    srlw a0, a4, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_add_i8_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB15_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-NOZACAS-NEXT:    add a5, a4, a1
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB15_1
+; RV64IA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_add_i8_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    li a3, 255
+; RV64IA-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB15_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-ZACAS-NEXT:    add a5, a4, a1
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB15_1
+; RV64IA-ZACAS-NEXT:  # %bb.2:
+; RV64IA-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_add_i8_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoadd.b a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_add_i8_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoadd.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw add ptr %a, i8 %b monotonic
   ret i8 %1
 }
@@ -1227,45 +1775,95 @@ define i8 @atomicrmw_add_i8_acquire(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_add_i8_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB16_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a4, (a2)
-; RV64IA-WMO-NEXT:    add a5, a4, a1
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a3
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB16_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a4, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_add_i8_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB16_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    add a5, a4, a1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB16_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_add_i8_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB16_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a4, (a2)
-; RV64IA-TSO-NEXT:    add a5, a4, a1
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a3
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB16_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a4, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_add_i8_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB16_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    add a5, a4, a1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB16_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_add_i8_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB16_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    add a5, a4, a1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB16_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_add_i8_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB16_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    add a5, a4, a1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB16_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_add_i8_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoadd.b.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_add_i8_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoadd.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw add ptr %a, i8 %b acquire
   ret i8 %1
 }
@@ -1331,45 +1929,95 @@ define i8 @atomicrmw_add_i8_release(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_add_i8_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB17_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w a4, (a2)
-; RV64IA-WMO-NEXT:    add a5, a4, a1
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a3
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB17_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a4, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_add_i8_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB17_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    add a5, a4, a1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB17_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_add_i8_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB17_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a4, (a2)
-; RV64IA-TSO-NEXT:    add a5, a4, a1
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a3
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB17_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a4, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_add_i8_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB17_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    add a5, a4, a1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB17_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_add_i8_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB17_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    add a5, a4, a1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB17_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_add_i8_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB17_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    add a5, a4, a1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB17_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_add_i8_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoadd.b.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_add_i8_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoadd.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw add ptr %a, i8 %b release
   ret i8 %1
 }
@@ -1435,45 +2083,95 @@ define i8 @atomicrmw_add_i8_acq_rel(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_add_i8_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB18_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a4, (a2)
-; RV64IA-WMO-NEXT:    add a5, a4, a1
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a3
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB18_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a4, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_add_i8_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB18_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    add a5, a4, a1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB18_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_add_i8_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB18_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a4, (a2)
-; RV64IA-TSO-NEXT:    add a5, a4, a1
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a3
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB18_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a4, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_add_i8_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB18_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    add a5, a4, a1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB18_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_add_i8_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB18_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    add a5, a4, a1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB18_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_add_i8_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB18_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    add a5, a4, a1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB18_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_add_i8_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoadd.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_add_i8_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoadd.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw add ptr %a, i8 %b acq_rel
   ret i8 %1
 }
@@ -1519,25 +2217,55 @@ define i8 @atomicrmw_add_i8_seq_cst(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_add_i8_seq_cst:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    li a3, 255
-; RV64IA-NEXT:    sllw a3, a3, a0
-; RV64IA-NEXT:    andi a1, a1, 255
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB19_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a4, (a2)
-; RV64IA-NEXT:    add a5, a4, a1
-; RV64IA-NEXT:    xor a5, a4, a5
-; RV64IA-NEXT:    and a5, a5, a3
-; RV64IA-NEXT:    xor a5, a4, a5
-; RV64IA-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB19_1
-; RV64IA-NEXT:  # %bb.2:
-; RV64IA-NEXT:    srlw a0, a4, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_add_i8_seq_cst:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB19_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w.aqrl a4, (a2)
+; RV64IA-NOZACAS-NEXT:    add a5, a4, a1
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB19_1
+; RV64IA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_add_i8_seq_cst:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    li a3, 255
+; RV64IA-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB19_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a4, (a2)
+; RV64IA-ZACAS-NEXT:    add a5, a4, a1
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB19_1
+; RV64IA-ZACAS-NEXT:  # %bb.2:
+; RV64IA-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_add_i8_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoadd.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_add_i8_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoadd.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw add ptr %a, i8 %b seq_cst
   ret i8 %1
 }
@@ -1583,25 +2311,57 @@ define i8 @atomicrmw_sub_i8_monotonic(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_sub_i8_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    li a3, 255
-; RV64IA-NEXT:    sllw a3, a3, a0
-; RV64IA-NEXT:    andi a1, a1, 255
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB20_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w a4, (a2)
-; RV64IA-NEXT:    sub a5, a4, a1
-; RV64IA-NEXT:    xor a5, a4, a5
-; RV64IA-NEXT:    and a5, a5, a3
-; RV64IA-NEXT:    xor a5, a4, a5
-; RV64IA-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB20_1
-; RV64IA-NEXT:  # %bb.2:
-; RV64IA-NEXT:    srlw a0, a4, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_sub_i8_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB20_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-NOZACAS-NEXT:    sub a5, a4, a1
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB20_1
+; RV64IA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_sub_i8_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    li a3, 255
+; RV64IA-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB20_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-ZACAS-NEXT:    sub a5, a4, a1
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB20_1
+; RV64IA-ZACAS-NEXT:  # %bb.2:
+; RV64IA-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_sub_i8_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    neg a1, a1
+; RV64IA-WMO-ZABHA-NEXT:    amoadd.b a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_sub_i8_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    neg a1, a1
+; RV64IA-TSO-ZABHA-NEXT:    amoadd.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw sub ptr %a, i8 %b monotonic
   ret i8 %1
 }
@@ -1667,45 +2427,97 @@ define i8 @atomicrmw_sub_i8_acquire(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_sub_i8_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB21_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a4, (a2)
-; RV64IA-WMO-NEXT:    sub a5, a4, a1
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a3
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB21_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a4, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_sub_i8_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB21_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    sub a5, a4, a1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB21_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_sub_i8_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB21_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    sub a5, a4, a1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB21_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_sub_i8_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB21_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    sub a5, a4, a1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB21_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_sub_i8_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB21_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    sub a5, a4, a1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB21_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_sub_i8_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB21_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a4, (a2)
-; RV64IA-TSO-NEXT:    sub a5, a4, a1
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a3
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB21_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a4, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_sub_i8_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    neg a1, a1
+; RV64IA-WMO-ZABHA-NEXT:    amoadd.b.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_sub_i8_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    neg a1, a1
+; RV64IA-TSO-ZABHA-NEXT:    amoadd.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw sub ptr %a, i8 %b acquire
   ret i8 %1
 }
@@ -1771,45 +2583,97 @@ define i8 @atomicrmw_sub_i8_release(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_sub_i8_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB22_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w a4, (a2)
-; RV64IA-WMO-NEXT:    sub a5, a4, a1
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a3
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB22_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a4, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_sub_i8_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB22_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    sub a5, a4, a1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB22_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_sub_i8_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB22_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a4, (a2)
-; RV64IA-TSO-NEXT:    sub a5, a4, a1
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a3
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB22_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a4, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_sub_i8_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB22_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    sub a5, a4, a1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB22_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_sub_i8_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB22_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    sub a5, a4, a1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB22_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_sub_i8_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB22_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    sub a5, a4, a1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB22_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_sub_i8_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    neg a1, a1
+; RV64IA-WMO-ZABHA-NEXT:    amoadd.b.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_sub_i8_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    neg a1, a1
+; RV64IA-TSO-ZABHA-NEXT:    amoadd.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw sub ptr %a, i8 %b release
   ret i8 %1
 }
@@ -1875,45 +2739,97 @@ define i8 @atomicrmw_sub_i8_acq_rel(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_sub_i8_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB23_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a4, (a2)
-; RV64IA-WMO-NEXT:    sub a5, a4, a1
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a3
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB23_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a4, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_sub_i8_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB23_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    sub a5, a4, a1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB23_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_sub_i8_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB23_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a4, (a2)
-; RV64IA-TSO-NEXT:    sub a5, a4, a1
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a3
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB23_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a4, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_sub_i8_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB23_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    sub a5, a4, a1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB23_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_sub_i8_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB23_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    sub a5, a4, a1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB23_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_sub_i8_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB23_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    sub a5, a4, a1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB23_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_sub_i8_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    neg a1, a1
+; RV64IA-WMO-ZABHA-NEXT:    amoadd.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_sub_i8_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    neg a1, a1
+; RV64IA-TSO-ZABHA-NEXT:    amoadd.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw sub ptr %a, i8 %b acq_rel
   ret i8 %1
 }
@@ -1959,25 +2875,57 @@ define i8 @atomicrmw_sub_i8_seq_cst(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_sub_i8_seq_cst:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    li a3, 255
-; RV64IA-NEXT:    sllw a3, a3, a0
-; RV64IA-NEXT:    andi a1, a1, 255
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB24_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a4, (a2)
-; RV64IA-NEXT:    sub a5, a4, a1
-; RV64IA-NEXT:    xor a5, a4, a5
-; RV64IA-NEXT:    and a5, a5, a3
-; RV64IA-NEXT:    xor a5, a4, a5
-; RV64IA-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB24_1
-; RV64IA-NEXT:  # %bb.2:
-; RV64IA-NEXT:    srlw a0, a4, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_sub_i8_seq_cst:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB24_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w.aqrl a4, (a2)
+; RV64IA-NOZACAS-NEXT:    sub a5, a4, a1
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB24_1
+; RV64IA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_sub_i8_seq_cst:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    li a3, 255
+; RV64IA-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB24_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a4, (a2)
+; RV64IA-ZACAS-NEXT:    sub a5, a4, a1
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB24_1
+; RV64IA-ZACAS-NEXT:  # %bb.2:
+; RV64IA-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_sub_i8_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    neg a1, a1
+; RV64IA-WMO-ZABHA-NEXT:    amoadd.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_sub_i8_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    neg a1, a1
+; RV64IA-TSO-ZABHA-NEXT:    amoadd.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw sub ptr %a, i8 %b seq_cst
   ret i8 %1
 }
@@ -2017,19 +2965,43 @@ define i8 @atomicrmw_and_i8_monotonic(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_and_i8_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    li a3, 255
-; RV64IA-NEXT:    sllw a3, a3, a0
-; RV64IA-NEXT:    not a3, a3
-; RV64IA-NEXT:    andi a1, a1, 255
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    or a1, a3, a1
-; RV64IA-NEXT:    amoand.w a1, a1, (a2)
-; RV64IA-NEXT:    srlw a0, a1, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_and_i8_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-NOZACAS-NEXT:    not a3, a3
+; RV64IA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:    or a1, a3, a1
+; RV64IA-NOZACAS-NEXT:    amoand.w a1, a1, (a2)
+; RV64IA-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_and_i8_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    li a3, 255
+; RV64IA-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-ZACAS-NEXT:    not a3, a3
+; RV64IA-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    or a1, a3, a1
+; RV64IA-ZACAS-NEXT:    amoand.w a1, a1, (a2)
+; RV64IA-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_and_i8_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoand.b a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_and_i8_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoand.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw and ptr %a, i8 %b monotonic
   ret i8 %1
 }
@@ -2083,33 +3055,71 @@ define i8 @atomicrmw_and_i8_acquire(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_and_i8_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    not a3, a3
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    or a1, a3, a1
-; RV64IA-WMO-NEXT:    amoand.w.aq a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_and_i8_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    or a1, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    amoand.w.aq a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_and_i8_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    not a3, a3
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    or a1, a3, a1
-; RV64IA-TSO-NEXT:    amoand.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_and_i8_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    or a1, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    amoand.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_and_i8_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    or a1, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    amoand.w.aq a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_and_i8_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    or a1, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    amoand.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_and_i8_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoand.b.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_and_i8_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoand.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw and ptr %a, i8 %b acquire
   ret i8 %1
 }
@@ -2163,33 +3173,71 @@ define i8 @atomicrmw_and_i8_release(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_and_i8_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    not a3, a3
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    or a1, a3, a1
-; RV64IA-WMO-NEXT:    amoand.w.rl a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_and_i8_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    or a1, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    amoand.w.rl a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_and_i8_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    not a3, a3
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    or a1, a3, a1
-; RV64IA-TSO-NEXT:    amoand.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_and_i8_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    or a1, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    amoand.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_and_i8_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    or a1, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    amoand.w.rl a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_and_i8_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    or a1, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    amoand.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_and_i8_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoand.b.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_and_i8_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoand.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw and ptr %a, i8 %b release
   ret i8 %1
 }
@@ -2243,33 +3291,71 @@ define i8 @atomicrmw_and_i8_acq_rel(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_and_i8_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    not a3, a3
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    or a1, a3, a1
-; RV64IA-WMO-NEXT:    amoand.w.aqrl a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_and_i8_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    or a1, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    amoand.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_and_i8_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    not a3, a3
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    or a1, a3, a1
-; RV64IA-TSO-NEXT:    amoand.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_and_i8_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    or a1, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    amoand.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_and_i8_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    or a1, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    amoand.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_and_i8_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    or a1, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    amoand.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_and_i8_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoand.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_and_i8_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoand.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw and ptr %a, i8 %b acq_rel
   ret i8 %1
 }
@@ -2323,33 +3409,71 @@ define i8 @atomicrmw_and_i8_seq_cst(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_and_i8_seq_cst:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    not a3, a3
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    or a1, a3, a1
-; RV64IA-WMO-NEXT:    amoand.w.aqrl a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_and_i8_seq_cst:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    or a1, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    amoand.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_and_i8_seq_cst:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    not a3, a3
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    or a1, a3, a1
-; RV64IA-TSO-NEXT:    amoand.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_and_i8_seq_cst:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    or a1, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    amoand.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_and_i8_seq_cst:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    or a1, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    amoand.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_and_i8_seq_cst:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    or a1, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    amoand.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_and_i8_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoand.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_and_i8_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoand.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw and ptr %a, i8 %b seq_cst
   ret i8 %1
 }
@@ -2396,26 +3520,113 @@ define i8 @atomicrmw_nand_i8_monotonic(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_nand_i8_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    li a3, 255
-; RV64IA-NEXT:    sllw a3, a3, a0
-; RV64IA-NEXT:    andi a1, a1, 255
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB30_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w a4, (a2)
-; RV64IA-NEXT:    and a5, a4, a1
-; RV64IA-NEXT:    not a5, a5
-; RV64IA-NEXT:    xor a5, a4, a5
-; RV64IA-NEXT:    and a5, a5, a3
-; RV64IA-NEXT:    xor a5, a4, a5
-; RV64IA-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB30_1
-; RV64IA-NEXT:  # %bb.2:
-; RV64IA-NEXT:    srlw a0, a4, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_nand_i8_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB30_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-NOZACAS-NEXT:    and a5, a4, a1
+; RV64IA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB30_1
+; RV64IA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_nand_i8_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    li a3, 255
+; RV64IA-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB30_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-ZACAS-NEXT:    and a5, a4, a1
+; RV64IA-ZACAS-NEXT:    not a5, a5
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB30_1
+; RV64IA-ZACAS-NEXT:  # %bb.2:
+; RV64IA-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_monotonic:
+; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 56
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB30_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB30_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_monotonic:
+; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 56
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB30_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB30_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_monotonic:
+; RV64IA-WMO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    lbu a0, 0(a0)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  .LBB30_1: # %atomicrmw.start
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    and a3, a0, a1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    slli a4, a0, 56
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    amocas.b a0, a3, (a2)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    srai a4, a4, 56
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    bne a0, a4, .LBB30_1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_monotonic:
+; RV64IA-TSO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    lbu a0, 0(a0)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  .LBB30_1: # %atomicrmw.start
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    and a3, a0, a1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    slli a4, a0, 56
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    amocas.b a0, a3, (a2)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    srai a4, a4, 56
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    bne a0, a4, .LBB30_1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ret
   %1 = atomicrmw nand ptr %a, i8 %b monotonic
   ret i8 %1
 }
@@ -2483,47 +3694,155 @@ define i8 @atomicrmw_nand_i8_acquire(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_nand_i8_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB31_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a4, (a2)
-; RV64IA-WMO-NEXT:    and a5, a4, a1
-; RV64IA-WMO-NEXT:    not a5, a5
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a3
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB31_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a4, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_nand_i8_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB31_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a4, a1
+; RV64IA-WMO-NOZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB31_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_nand_i8_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB31_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a4, (a2)
-; RV64IA-TSO-NEXT:    and a5, a4, a1
-; RV64IA-TSO-NEXT:    not a5, a5
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a3
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB31_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a4, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_nand_i8_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB31_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a4, a1
+; RV64IA-TSO-NOZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB31_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_nand_i8_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB31_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a4, a1
+; RV64IA-WMO-ZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB31_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_nand_i8_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB31_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a4, a1
+; RV64IA-TSO-ZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB31_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_acquire:
+; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 56
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB31_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w.aq a1, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB31_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_acquire:
+; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 56
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB31_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB31_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_acquire:
+; RV64IA-WMO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    lbu a0, 0(a0)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  .LBB31_1: # %atomicrmw.start
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    and a3, a0, a1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    slli a4, a0, 56
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    amocas.b.aq a0, a3, (a2)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    srai a4, a4, 56
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    bne a0, a4, .LBB31_1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_acquire:
+; RV64IA-TSO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    lbu a0, 0(a0)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  .LBB31_1: # %atomicrmw.start
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    and a3, a0, a1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    slli a4, a0, 56
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    amocas.b a0, a3, (a2)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    srai a4, a4, 56
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    bne a0, a4, .LBB31_1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ret
   %1 = atomicrmw nand ptr %a, i8 %b acquire
   ret i8 %1
 }
@@ -2591,47 +3910,155 @@ define i8 @atomicrmw_nand_i8_release(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_nand_i8_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB32_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w a4, (a2)
-; RV64IA-WMO-NEXT:    and a5, a4, a1
-; RV64IA-WMO-NEXT:    not a5, a5
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a3
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB32_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a4, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_nand_i8_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB32_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a4, a1
+; RV64IA-WMO-NOZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB32_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_nand_i8_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB32_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a4, (a2)
-; RV64IA-TSO-NEXT:    and a5, a4, a1
-; RV64IA-TSO-NEXT:    not a5, a5
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a3
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB32_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a4, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_nand_i8_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB32_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a4, a1
+; RV64IA-TSO-NOZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB32_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_nand_i8_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB32_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a4, a1
+; RV64IA-WMO-ZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB32_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_nand_i8_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB32_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a4, a1
+; RV64IA-TSO-ZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB32_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_release:
+; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 56
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB32_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w.rl a4, a4, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB32_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_release:
+; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 56
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB32_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB32_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_release:
+; RV64IA-WMO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    lbu a0, 0(a0)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  .LBB32_1: # %atomicrmw.start
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    and a3, a0, a1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    slli a4, a0, 56
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    amocas.b.rl a0, a3, (a2)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    srai a4, a4, 56
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    bne a0, a4, .LBB32_1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_release:
+; RV64IA-TSO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    lbu a0, 0(a0)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  .LBB32_1: # %atomicrmw.start
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    and a3, a0, a1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    slli a4, a0, 56
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    amocas.b a0, a3, (a2)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    srai a4, a4, 56
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    bne a0, a4, .LBB32_1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ret
   %1 = atomicrmw nand ptr %a, i8 %b release
   ret i8 %1
 }
@@ -2699,47 +4126,155 @@ define i8 @atomicrmw_nand_i8_acq_rel(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_nand_i8_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB33_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a4, (a2)
-; RV64IA-WMO-NEXT:    and a5, a4, a1
-; RV64IA-WMO-NEXT:    not a5, a5
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a3
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB33_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a4, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_nand_i8_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB33_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a4, a1
+; RV64IA-WMO-NOZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB33_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_nand_i8_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB33_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a4, (a2)
-; RV64IA-TSO-NEXT:    and a5, a4, a1
-; RV64IA-TSO-NEXT:    not a5, a5
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a3
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB33_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a4, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_nand_i8_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB33_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a4, a1
+; RV64IA-TSO-NOZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB33_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_nand_i8_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB33_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a4, a1
+; RV64IA-WMO-ZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB33_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_nand_i8_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB33_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a4, a1
+; RV64IA-TSO-ZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB33_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_acq_rel:
+; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 56
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB33_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w.aq a1, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w.rl a4, a4, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB33_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_acq_rel:
+; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 56
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB33_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB33_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_acq_rel:
+; RV64IA-WMO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    lbu a0, 0(a0)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  .LBB33_1: # %atomicrmw.start
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    and a3, a0, a1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    slli a4, a0, 56
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    amocas.b.aqrl a0, a3, (a2)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    srai a4, a4, 56
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    bne a0, a4, .LBB33_1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_acq_rel:
+; RV64IA-TSO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    lbu a0, 0(a0)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  .LBB33_1: # %atomicrmw.start
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    and a3, a0, a1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    slli a4, a0, 56
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    amocas.b a0, a3, (a2)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    srai a4, a4, 56
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    bne a0, a4, .LBB33_1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ret
   %1 = atomicrmw nand ptr %a, i8 %b acq_rel
   ret i8 %1
 }
@@ -2786,26 +4321,113 @@ define i8 @atomicrmw_nand_i8_seq_cst(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_nand_i8_seq_cst:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    li a3, 255
-; RV64IA-NEXT:    sllw a3, a3, a0
-; RV64IA-NEXT:    andi a1, a1, 255
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB34_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a4, (a2)
-; RV64IA-NEXT:    and a5, a4, a1
-; RV64IA-NEXT:    not a5, a5
-; RV64IA-NEXT:    xor a5, a4, a5
-; RV64IA-NEXT:    and a5, a5, a3
-; RV64IA-NEXT:    xor a5, a4, a5
-; RV64IA-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB34_1
-; RV64IA-NEXT:  # %bb.2:
-; RV64IA-NEXT:    srlw a0, a4, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_nand_i8_seq_cst:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB34_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w.aqrl a4, (a2)
+; RV64IA-NOZACAS-NEXT:    and a5, a4, a1
+; RV64IA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB34_1
+; RV64IA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_nand_i8_seq_cst:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    li a3, 255
+; RV64IA-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB34_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a4, (a2)
+; RV64IA-ZACAS-NEXT:    and a5, a4, a1
+; RV64IA-ZACAS-NEXT:    not a5, a5
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB34_1
+; RV64IA-ZACAS-NEXT:  # %bb.2:
+; RV64IA-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_seq_cst:
+; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 56
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB34_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w.aqrl a1, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w.rl a4, a4, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB34_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_seq_cst:
+; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 56
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB34_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w.aqrl a1, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w.rl a4, a4, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB34_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_seq_cst:
+; RV64IA-WMO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    lbu a0, 0(a0)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  .LBB34_1: # %atomicrmw.start
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    and a3, a0, a1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    slli a4, a0, 56
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    amocas.b.aqrl a0, a3, (a2)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    srai a4, a4, 56
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    bne a0, a4, .LBB34_1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_seq_cst:
+; RV64IA-TSO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    lbu a0, 0(a0)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  .LBB34_1: # %atomicrmw.start
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    and a3, a0, a1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    slli a4, a0, 56
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    amocas.b a0, a3, (a2)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    srai a4, a4, 56
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    bne a0, a4, .LBB34_1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ret
   %1 = atomicrmw nand ptr %a, i8 %b seq_cst
   ret i8 %1
 }
@@ -2841,15 +4463,35 @@ define i8 @atomicrmw_or_i8_monotonic(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_or_i8_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    andi a1, a1, 255
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    amoor.w a1, a1, (a2)
-; RV64IA-NEXT:    srlw a0, a1, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_or_i8_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:    amoor.w a1, a1, (a2)
+; RV64IA-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_or_i8_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    amoor.w a1, a1, (a2)
+; RV64IA-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_or_i8_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoor.b a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_or_i8_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoor.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw or ptr %a, i8 %b monotonic
   ret i8 %1
 }
@@ -2895,25 +4537,55 @@ define i8 @atomicrmw_or_i8_acquire(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_or_i8_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    amoor.w.aq a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_or_i8_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoor.w.aq a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_or_i8_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    amoor.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_or_i8_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoor.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_or_i8_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoor.w.aq a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_or_i8_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoor.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_or_i8_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoor.b.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_or_i8_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoor.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw or ptr %a, i8 %b acquire
   ret i8 %1
 }
@@ -2959,25 +4631,55 @@ define i8 @atomicrmw_or_i8_release(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_or_i8_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    amoor.w.rl a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_or_i8_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoor.w.rl a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_or_i8_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    amoor.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_or_i8_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoor.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_or_i8_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoor.w.rl a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_or_i8_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoor.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_or_i8_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoor.b.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_or_i8_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoor.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw or ptr %a, i8 %b release
   ret i8 %1
 }
@@ -3023,25 +4725,55 @@ define i8 @atomicrmw_or_i8_acq_rel(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_or_i8_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    amoor.w.aqrl a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_or_i8_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoor.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_or_i8_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    amoor.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_or_i8_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoor.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_or_i8_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoor.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_or_i8_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoor.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_or_i8_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoor.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_or_i8_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoor.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw or ptr %a, i8 %b acq_rel
   ret i8 %1
 }
@@ -3087,25 +4819,55 @@ define i8 @atomicrmw_or_i8_seq_cst(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_or_i8_seq_cst:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    amoor.w.aqrl a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_or_i8_seq_cst:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoor.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_or_i8_seq_cst:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoor.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_or_i8_seq_cst:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    amoor.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_or_i8_seq_cst:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoor.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_or_i8_seq_cst:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoor.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_or_i8_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoor.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_or_i8_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoor.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw or ptr %a, i8 %b seq_cst
   ret i8 %1
 }
@@ -3141,15 +4903,35 @@ define i8 @atomicrmw_xor_i8_monotonic(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_xor_i8_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    andi a1, a1, 255
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    amoxor.w a1, a1, (a2)
-; RV64IA-NEXT:    srlw a0, a1, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_xor_i8_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:    amoxor.w a1, a1, (a2)
+; RV64IA-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_xor_i8_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    amoxor.w a1, a1, (a2)
+; RV64IA-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xor_i8_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoxor.b a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xor_i8_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoxor.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xor ptr %a, i8 %b monotonic
   ret i8 %1
 }
@@ -3195,25 +4977,55 @@ define i8 @atomicrmw_xor_i8_acquire(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xor_i8_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    amoxor.w.aq a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xor_i8_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoxor.w.aq a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xor_i8_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    amoxor.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xor_i8_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoxor.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xor_i8_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoxor.w.aq a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xor_i8_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoxor.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xor_i8_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoxor.b.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xor_i8_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoxor.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xor ptr %a, i8 %b acquire
   ret i8 %1
 }
@@ -3259,25 +5071,55 @@ define i8 @atomicrmw_xor_i8_release(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xor_i8_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    amoxor.w.rl a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xor_i8_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoxor.w.rl a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xor_i8_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    amoxor.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xor_i8_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoxor.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xor_i8_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoxor.w.rl a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xor_i8_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoxor.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xor_i8_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoxor.b.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xor_i8_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoxor.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xor ptr %a, i8 %b release
   ret i8 %1
 }
@@ -3323,25 +5165,55 @@ define i8 @atomicrmw_xor_i8_acq_rel(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xor_i8_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    amoxor.w.aqrl a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xor_i8_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoxor.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xor_i8_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    amoxor.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xor_i8_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoxor.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xor_i8_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoxor.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xor_i8_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoxor.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xor_i8_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoxor.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xor_i8_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoxor.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xor ptr %a, i8 %b acq_rel
   ret i8 %1
 }
@@ -3387,25 +5259,55 @@ define i8 @atomicrmw_xor_i8_seq_cst(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xor_i8_seq_cst:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    amoxor.w.aqrl a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xor_i8_seq_cst:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoxor.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xor_i8_seq_cst:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    amoxor.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xor_i8_seq_cst:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoxor.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xor_i8_seq_cst:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoxor.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xor_i8_seq_cst:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoxor.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xor_i8_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoxor.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xor_i8_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoxor.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xor ptr %a, i8 %b seq_cst
   ret i8 %1
 }
@@ -3524,34 +5426,73 @@ define i8 @atomicrmw_max_i8_monotonic(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_max_i8_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    andi a3, a0, 24
-; RV64IA-NEXT:    li a4, 255
-; RV64IA-NEXT:    sllw a4, a4, a0
-; RV64IA-NEXT:    slli a1, a1, 56
-; RV64IA-NEXT:    srai a1, a1, 56
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    xori a3, a3, 56
-; RV64IA-NEXT:  .LBB45_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w a5, (a2)
-; RV64IA-NEXT:    and a7, a5, a4
-; RV64IA-NEXT:    mv a6, a5
-; RV64IA-NEXT:    sll a7, a7, a3
-; RV64IA-NEXT:    sra a7, a7, a3
-; RV64IA-NEXT:    bge a7, a1, .LBB45_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB45_1 Depth=1
-; RV64IA-NEXT:    xor a6, a5, a1
-; RV64IA-NEXT:    and a6, a6, a4
-; RV64IA-NEXT:    xor a6, a5, a6
-; RV64IA-NEXT:  .LBB45_3: # in Loop: Header=BB45_1 Depth=1
-; RV64IA-NEXT:    sc.w a6, a6, (a2)
-; RV64IA-NEXT:    bnez a6, .LBB45_1
-; RV64IA-NEXT:  # %bb.4:
-; RV64IA-NEXT:    srlw a0, a5, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_max_i8_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-NOZACAS-NEXT:    li a4, 255
+; RV64IA-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-NOZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-NOZACAS-NEXT:  .LBB45_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w a5, (a2)
+; RV64IA-NOZACAS-NEXT:    and a7, a5, a4
+; RV64IA-NOZACAS-NEXT:    mv a6, a5
+; RV64IA-NOZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-NOZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-NOZACAS-NEXT:    bge a7, a1, .LBB45_3
+; RV64IA-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB45_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-NOZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-NOZACAS-NEXT:  .LBB45_3: # in Loop: Header=BB45_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a6, .LBB45_1
+; RV64IA-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_max_i8_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-ZACAS-NEXT:    li a4, 255
+; RV64IA-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-ZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-ZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-ZACAS-NEXT:  .LBB45_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w a5, (a2)
+; RV64IA-ZACAS-NEXT:    and a7, a5, a4
+; RV64IA-ZACAS-NEXT:    mv a6, a5
+; RV64IA-ZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-ZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-ZACAS-NEXT:    bge a7, a1, .LBB45_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB45_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-ZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-ZACAS-NEXT:  .LBB45_3: # in Loop: Header=BB45_1 Depth=1
+; RV64IA-ZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a6, .LBB45_1
+; RV64IA-ZACAS-NEXT:  # %bb.4:
+; RV64IA-ZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_max_i8_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomax.b a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_max_i8_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomax.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw max ptr %a, i8 %b monotonic
   ret i8 %1
 }
@@ -3699,63 +5640,131 @@ define i8 @atomicrmw_max_i8_acquire(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_max_i8_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    andi a3, a0, 24
-; RV64IA-WMO-NEXT:    li a4, 255
-; RV64IA-WMO-NEXT:    sllw a4, a4, a0
-; RV64IA-WMO-NEXT:    slli a1, a1, 56
-; RV64IA-WMO-NEXT:    srai a1, a1, 56
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    xori a3, a3, 56
-; RV64IA-WMO-NEXT:  .LBB46_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a5, (a2)
-; RV64IA-WMO-NEXT:    and a7, a5, a4
-; RV64IA-WMO-NEXT:    mv a6, a5
-; RV64IA-WMO-NEXT:    sll a7, a7, a3
-; RV64IA-WMO-NEXT:    sra a7, a7, a3
-; RV64IA-WMO-NEXT:    bge a7, a1, .LBB46_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB46_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a6, a5, a1
-; RV64IA-WMO-NEXT:    and a6, a6, a4
-; RV64IA-WMO-NEXT:    xor a6, a5, a6
-; RV64IA-WMO-NEXT:  .LBB46_3: # in Loop: Header=BB46_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w a6, a6, (a2)
-; RV64IA-WMO-NEXT:    bnez a6, .LBB46_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a5, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_max_i8_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-NOZACAS-NEXT:    li a4, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-WMO-NOZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB46_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a7, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    mv a6, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-WMO-NOZACAS-NEXT:    bge a7, a1, .LBB46_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB46_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB46_3: # in Loop: Header=BB46_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a6, .LBB46_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_max_i8_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    andi a3, a0, 24
-; RV64IA-TSO-NEXT:    li a4, 255
-; RV64IA-TSO-NEXT:    sllw a4, a4, a0
-; RV64IA-TSO-NEXT:    slli a1, a1, 56
-; RV64IA-TSO-NEXT:    srai a1, a1, 56
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    xori a3, a3, 56
-; RV64IA-TSO-NEXT:  .LBB46_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a5, (a2)
-; RV64IA-TSO-NEXT:    and a7, a5, a4
-; RV64IA-TSO-NEXT:    mv a6, a5
-; RV64IA-TSO-NEXT:    sll a7, a7, a3
-; RV64IA-TSO-NEXT:    sra a7, a7, a3
-; RV64IA-TSO-NEXT:    bge a7, a1, .LBB46_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB46_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a6, a5, a1
-; RV64IA-TSO-NEXT:    and a6, a6, a4
-; RV64IA-TSO-NEXT:    xor a6, a5, a6
-; RV64IA-TSO-NEXT:  .LBB46_3: # in Loop: Header=BB46_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a6, a6, (a2)
-; RV64IA-TSO-NEXT:    bnez a6, .LBB46_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a5, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_max_i8_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-NOZACAS-NEXT:    li a4, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-TSO-NOZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB46_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a7, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    mv a6, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-TSO-NOZACAS-NEXT:    bge a7, a1, .LBB46_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB46_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB46_3: # in Loop: Header=BB46_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a6, .LBB46_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_max_i8_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-ZACAS-NEXT:    li a4, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-WMO-ZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-WMO-ZACAS-NEXT:  .LBB46_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a7, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    mv a6, a5
+; RV64IA-WMO-ZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-WMO-ZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-WMO-ZACAS-NEXT:    bge a7, a1, .LBB46_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB46_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-WMO-ZACAS-NEXT:  .LBB46_3: # in Loop: Header=BB46_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a6, .LBB46_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_max_i8_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-ZACAS-NEXT:    li a4, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-TSO-ZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-TSO-ZACAS-NEXT:  .LBB46_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a7, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    mv a6, a5
+; RV64IA-TSO-ZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-TSO-ZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-TSO-ZACAS-NEXT:    bge a7, a1, .LBB46_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB46_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-TSO-ZACAS-NEXT:  .LBB46_3: # in Loop: Header=BB46_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a6, .LBB46_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_max_i8_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomax.b.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_max_i8_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomax.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw max ptr %a, i8 %b acquire
   ret i8 %1
 }
@@ -3903,63 +5912,131 @@ define i8 @atomicrmw_max_i8_release(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_max_i8_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    andi a3, a0, 24
-; RV64IA-WMO-NEXT:    li a4, 255
-; RV64IA-WMO-NEXT:    sllw a4, a4, a0
-; RV64IA-WMO-NEXT:    slli a1, a1, 56
-; RV64IA-WMO-NEXT:    srai a1, a1, 56
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    xori a3, a3, 56
-; RV64IA-WMO-NEXT:  .LBB47_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w a5, (a2)
-; RV64IA-WMO-NEXT:    and a7, a5, a4
-; RV64IA-WMO-NEXT:    mv a6, a5
-; RV64IA-WMO-NEXT:    sll a7, a7, a3
-; RV64IA-WMO-NEXT:    sra a7, a7, a3
-; RV64IA-WMO-NEXT:    bge a7, a1, .LBB47_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB47_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a6, a5, a1
-; RV64IA-WMO-NEXT:    and a6, a6, a4
-; RV64IA-WMO-NEXT:    xor a6, a5, a6
-; RV64IA-WMO-NEXT:  .LBB47_3: # in Loop: Header=BB47_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w.rl a6, a6, (a2)
-; RV64IA-WMO-NEXT:    bnez a6, .LBB47_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a5, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_max_i8_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-NOZACAS-NEXT:    li a4, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-WMO-NOZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB47_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a7, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    mv a6, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-WMO-NOZACAS-NEXT:    bge a7, a1, .LBB47_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB47_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB47_3: # in Loop: Header=BB47_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a6, .LBB47_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_max_i8_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    andi a3, a0, 24
-; RV64IA-TSO-NEXT:    li a4, 255
-; RV64IA-TSO-NEXT:    sllw a4, a4, a0
-; RV64IA-TSO-NEXT:    slli a1, a1, 56
-; RV64IA-TSO-NEXT:    srai a1, a1, 56
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    xori a3, a3, 56
-; RV64IA-TSO-NEXT:  .LBB47_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a5, (a2)
-; RV64IA-TSO-NEXT:    and a7, a5, a4
-; RV64IA-TSO-NEXT:    mv a6, a5
-; RV64IA-TSO-NEXT:    sll a7, a7, a3
-; RV64IA-TSO-NEXT:    sra a7, a7, a3
-; RV64IA-TSO-NEXT:    bge a7, a1, .LBB47_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB47_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a6, a5, a1
-; RV64IA-TSO-NEXT:    and a6, a6, a4
-; RV64IA-TSO-NEXT:    xor a6, a5, a6
-; RV64IA-TSO-NEXT:  .LBB47_3: # in Loop: Header=BB47_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a6, a6, (a2)
-; RV64IA-TSO-NEXT:    bnez a6, .LBB47_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a5, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_max_i8_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-NOZACAS-NEXT:    li a4, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-TSO-NOZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB47_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a7, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    mv a6, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-TSO-NOZACAS-NEXT:    bge a7, a1, .LBB47_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB47_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB47_3: # in Loop: Header=BB47_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a6, .LBB47_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_max_i8_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-ZACAS-NEXT:    li a4, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-WMO-ZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-WMO-ZACAS-NEXT:  .LBB47_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a7, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    mv a6, a5
+; RV64IA-WMO-ZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-WMO-ZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-WMO-ZACAS-NEXT:    bge a7, a1, .LBB47_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB47_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-WMO-ZACAS-NEXT:  .LBB47_3: # in Loop: Header=BB47_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a6, .LBB47_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_max_i8_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-ZACAS-NEXT:    li a4, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-TSO-ZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-TSO-ZACAS-NEXT:  .LBB47_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a7, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    mv a6, a5
+; RV64IA-TSO-ZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-TSO-ZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-TSO-ZACAS-NEXT:    bge a7, a1, .LBB47_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB47_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-TSO-ZACAS-NEXT:  .LBB47_3: # in Loop: Header=BB47_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a6, .LBB47_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_max_i8_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomax.b.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_max_i8_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomax.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw max ptr %a, i8 %b release
   ret i8 %1
 }
@@ -4107,63 +6184,131 @@ define i8 @atomicrmw_max_i8_acq_rel(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_max_i8_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    andi a3, a0, 24
-; RV64IA-WMO-NEXT:    li a4, 255
-; RV64IA-WMO-NEXT:    sllw a4, a4, a0
-; RV64IA-WMO-NEXT:    slli a1, a1, 56
-; RV64IA-WMO-NEXT:    srai a1, a1, 56
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    xori a3, a3, 56
-; RV64IA-WMO-NEXT:  .LBB48_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a5, (a2)
-; RV64IA-WMO-NEXT:    and a7, a5, a4
-; RV64IA-WMO-NEXT:    mv a6, a5
-; RV64IA-WMO-NEXT:    sll a7, a7, a3
-; RV64IA-WMO-NEXT:    sra a7, a7, a3
-; RV64IA-WMO-NEXT:    bge a7, a1, .LBB48_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB48_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a6, a5, a1
-; RV64IA-WMO-NEXT:    and a6, a6, a4
-; RV64IA-WMO-NEXT:    xor a6, a5, a6
-; RV64IA-WMO-NEXT:  .LBB48_3: # in Loop: Header=BB48_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w.rl a6, a6, (a2)
-; RV64IA-WMO-NEXT:    bnez a6, .LBB48_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a5, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_max_i8_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-NOZACAS-NEXT:    li a4, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-WMO-NOZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB48_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a7, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    mv a6, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-WMO-NOZACAS-NEXT:    bge a7, a1, .LBB48_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB48_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB48_3: # in Loop: Header=BB48_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a6, .LBB48_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_max_i8_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    andi a3, a0, 24
-; RV64IA-TSO-NEXT:    li a4, 255
-; RV64IA-TSO-NEXT:    sllw a4, a4, a0
-; RV64IA-TSO-NEXT:    slli a1, a1, 56
-; RV64IA-TSO-NEXT:    srai a1, a1, 56
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    xori a3, a3, 56
-; RV64IA-TSO-NEXT:  .LBB48_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a5, (a2)
-; RV64IA-TSO-NEXT:    and a7, a5, a4
-; RV64IA-TSO-NEXT:    mv a6, a5
-; RV64IA-TSO-NEXT:    sll a7, a7, a3
-; RV64IA-TSO-NEXT:    sra a7, a7, a3
-; RV64IA-TSO-NEXT:    bge a7, a1, .LBB48_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB48_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a6, a5, a1
-; RV64IA-TSO-NEXT:    and a6, a6, a4
-; RV64IA-TSO-NEXT:    xor a6, a5, a6
-; RV64IA-TSO-NEXT:  .LBB48_3: # in Loop: Header=BB48_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a6, a6, (a2)
-; RV64IA-TSO-NEXT:    bnez a6, .LBB48_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a5, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_max_i8_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-NOZACAS-NEXT:    li a4, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-TSO-NOZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB48_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a7, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    mv a6, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-TSO-NOZACAS-NEXT:    bge a7, a1, .LBB48_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB48_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB48_3: # in Loop: Header=BB48_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a6, .LBB48_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_max_i8_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-ZACAS-NEXT:    li a4, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-WMO-ZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-WMO-ZACAS-NEXT:  .LBB48_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a7, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    mv a6, a5
+; RV64IA-WMO-ZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-WMO-ZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-WMO-ZACAS-NEXT:    bge a7, a1, .LBB48_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB48_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-WMO-ZACAS-NEXT:  .LBB48_3: # in Loop: Header=BB48_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a6, .LBB48_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_max_i8_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-ZACAS-NEXT:    li a4, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-TSO-ZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-TSO-ZACAS-NEXT:  .LBB48_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a7, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    mv a6, a5
+; RV64IA-TSO-ZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-TSO-ZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-TSO-ZACAS-NEXT:    bge a7, a1, .LBB48_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB48_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-TSO-ZACAS-NEXT:  .LBB48_3: # in Loop: Header=BB48_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a6, .LBB48_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_max_i8_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomax.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_max_i8_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomax.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw max ptr %a, i8 %b acq_rel
   ret i8 %1
 }
@@ -4282,34 +6427,73 @@ define i8 @atomicrmw_max_i8_seq_cst(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_max_i8_seq_cst:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    andi a3, a0, 24
-; RV64IA-NEXT:    li a4, 255
-; RV64IA-NEXT:    sllw a4, a4, a0
-; RV64IA-NEXT:    slli a1, a1, 56
-; RV64IA-NEXT:    srai a1, a1, 56
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    xori a3, a3, 56
-; RV64IA-NEXT:  .LBB49_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a5, (a2)
-; RV64IA-NEXT:    and a7, a5, a4
-; RV64IA-NEXT:    mv a6, a5
-; RV64IA-NEXT:    sll a7, a7, a3
-; RV64IA-NEXT:    sra a7, a7, a3
-; RV64IA-NEXT:    bge a7, a1, .LBB49_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB49_1 Depth=1
-; RV64IA-NEXT:    xor a6, a5, a1
-; RV64IA-NEXT:    and a6, a6, a4
-; RV64IA-NEXT:    xor a6, a5, a6
-; RV64IA-NEXT:  .LBB49_3: # in Loop: Header=BB49_1 Depth=1
-; RV64IA-NEXT:    sc.w.rl a6, a6, (a2)
-; RV64IA-NEXT:    bnez a6, .LBB49_1
-; RV64IA-NEXT:  # %bb.4:
-; RV64IA-NEXT:    srlw a0, a5, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_max_i8_seq_cst:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-NOZACAS-NEXT:    li a4, 255
+; RV64IA-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-NOZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-NOZACAS-NEXT:  .LBB49_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w.aqrl a5, (a2)
+; RV64IA-NOZACAS-NEXT:    and a7, a5, a4
+; RV64IA-NOZACAS-NEXT:    mv a6, a5
+; RV64IA-NOZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-NOZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-NOZACAS-NEXT:    bge a7, a1, .LBB49_3
+; RV64IA-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB49_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-NOZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-NOZACAS-NEXT:  .LBB49_3: # in Loop: Header=BB49_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a6, .LBB49_1
+; RV64IA-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_max_i8_seq_cst:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-ZACAS-NEXT:    li a4, 255
+; RV64IA-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-ZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-ZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-ZACAS-NEXT:  .LBB49_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a5, (a2)
+; RV64IA-ZACAS-NEXT:    and a7, a5, a4
+; RV64IA-ZACAS-NEXT:    mv a6, a5
+; RV64IA-ZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-ZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-ZACAS-NEXT:    bge a7, a1, .LBB49_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB49_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-ZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-ZACAS-NEXT:  .LBB49_3: # in Loop: Header=BB49_1 Depth=1
+; RV64IA-ZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a6, .LBB49_1
+; RV64IA-ZACAS-NEXT:  # %bb.4:
+; RV64IA-ZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_max_i8_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomax.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_max_i8_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomax.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw max ptr %a, i8 %b seq_cst
   ret i8 %1
 }
@@ -4428,34 +6612,73 @@ define i8 @atomicrmw_min_i8_monotonic(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_min_i8_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    andi a3, a0, 24
-; RV64IA-NEXT:    li a4, 255
-; RV64IA-NEXT:    sllw a4, a4, a0
-; RV64IA-NEXT:    slli a1, a1, 56
-; RV64IA-NEXT:    srai a1, a1, 56
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    xori a3, a3, 56
-; RV64IA-NEXT:  .LBB50_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w a5, (a2)
-; RV64IA-NEXT:    and a7, a5, a4
-; RV64IA-NEXT:    mv a6, a5
-; RV64IA-NEXT:    sll a7, a7, a3
-; RV64IA-NEXT:    sra a7, a7, a3
-; RV64IA-NEXT:    bge a1, a7, .LBB50_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB50_1 Depth=1
-; RV64IA-NEXT:    xor a6, a5, a1
-; RV64IA-NEXT:    and a6, a6, a4
-; RV64IA-NEXT:    xor a6, a5, a6
-; RV64IA-NEXT:  .LBB50_3: # in Loop: Header=BB50_1 Depth=1
-; RV64IA-NEXT:    sc.w a6, a6, (a2)
-; RV64IA-NEXT:    bnez a6, .LBB50_1
-; RV64IA-NEXT:  # %bb.4:
-; RV64IA-NEXT:    srlw a0, a5, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_min_i8_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-NOZACAS-NEXT:    li a4, 255
+; RV64IA-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-NOZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-NOZACAS-NEXT:  .LBB50_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w a5, (a2)
+; RV64IA-NOZACAS-NEXT:    and a7, a5, a4
+; RV64IA-NOZACAS-NEXT:    mv a6, a5
+; RV64IA-NOZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-NOZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-NOZACAS-NEXT:    bge a1, a7, .LBB50_3
+; RV64IA-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB50_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-NOZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-NOZACAS-NEXT:  .LBB50_3: # in Loop: Header=BB50_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a6, .LBB50_1
+; RV64IA-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_min_i8_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-ZACAS-NEXT:    li a4, 255
+; RV64IA-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-ZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-ZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-ZACAS-NEXT:  .LBB50_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w a5, (a2)
+; RV64IA-ZACAS-NEXT:    and a7, a5, a4
+; RV64IA-ZACAS-NEXT:    mv a6, a5
+; RV64IA-ZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-ZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-ZACAS-NEXT:    bge a1, a7, .LBB50_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB50_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-ZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-ZACAS-NEXT:  .LBB50_3: # in Loop: Header=BB50_1 Depth=1
+; RV64IA-ZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a6, .LBB50_1
+; RV64IA-ZACAS-NEXT:  # %bb.4:
+; RV64IA-ZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_min_i8_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomin.b a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_min_i8_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomin.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw min ptr %a, i8 %b monotonic
   ret i8 %1
 }
@@ -4603,63 +6826,131 @@ define i8 @atomicrmw_min_i8_acquire(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_min_i8_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    andi a3, a0, 24
-; RV64IA-WMO-NEXT:    li a4, 255
-; RV64IA-WMO-NEXT:    sllw a4, a4, a0
-; RV64IA-WMO-NEXT:    slli a1, a1, 56
-; RV64IA-WMO-NEXT:    srai a1, a1, 56
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    xori a3, a3, 56
-; RV64IA-WMO-NEXT:  .LBB51_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a5, (a2)
-; RV64IA-WMO-NEXT:    and a7, a5, a4
-; RV64IA-WMO-NEXT:    mv a6, a5
-; RV64IA-WMO-NEXT:    sll a7, a7, a3
-; RV64IA-WMO-NEXT:    sra a7, a7, a3
-; RV64IA-WMO-NEXT:    bge a1, a7, .LBB51_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB51_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a6, a5, a1
-; RV64IA-WMO-NEXT:    and a6, a6, a4
-; RV64IA-WMO-NEXT:    xor a6, a5, a6
-; RV64IA-WMO-NEXT:  .LBB51_3: # in Loop: Header=BB51_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w a6, a6, (a2)
-; RV64IA-WMO-NEXT:    bnez a6, .LBB51_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a5, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_min_i8_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-NOZACAS-NEXT:    li a4, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-WMO-NOZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB51_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a7, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    mv a6, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-WMO-NOZACAS-NEXT:    bge a1, a7, .LBB51_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB51_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB51_3: # in Loop: Header=BB51_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a6, .LBB51_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_min_i8_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    andi a3, a0, 24
-; RV64IA-TSO-NEXT:    li a4, 255
-; RV64IA-TSO-NEXT:    sllw a4, a4, a0
-; RV64IA-TSO-NEXT:    slli a1, a1, 56
-; RV64IA-TSO-NEXT:    srai a1, a1, 56
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    xori a3, a3, 56
-; RV64IA-TSO-NEXT:  .LBB51_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a5, (a2)
-; RV64IA-TSO-NEXT:    and a7, a5, a4
-; RV64IA-TSO-NEXT:    mv a6, a5
-; RV64IA-TSO-NEXT:    sll a7, a7, a3
-; RV64IA-TSO-NEXT:    sra a7, a7, a3
-; RV64IA-TSO-NEXT:    bge a1, a7, .LBB51_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB51_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a6, a5, a1
-; RV64IA-TSO-NEXT:    and a6, a6, a4
-; RV64IA-TSO-NEXT:    xor a6, a5, a6
-; RV64IA-TSO-NEXT:  .LBB51_3: # in Loop: Header=BB51_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a6, a6, (a2)
-; RV64IA-TSO-NEXT:    bnez a6, .LBB51_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a5, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_min_i8_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-NOZACAS-NEXT:    li a4, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-TSO-NOZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB51_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a7, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    mv a6, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-TSO-NOZACAS-NEXT:    bge a1, a7, .LBB51_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB51_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB51_3: # in Loop: Header=BB51_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a6, .LBB51_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_min_i8_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-ZACAS-NEXT:    li a4, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-WMO-ZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-WMO-ZACAS-NEXT:  .LBB51_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a7, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    mv a6, a5
+; RV64IA-WMO-ZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-WMO-ZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-WMO-ZACAS-NEXT:    bge a1, a7, .LBB51_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB51_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-WMO-ZACAS-NEXT:  .LBB51_3: # in Loop: Header=BB51_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a6, .LBB51_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_min_i8_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-ZACAS-NEXT:    li a4, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-TSO-ZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-TSO-ZACAS-NEXT:  .LBB51_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a7, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    mv a6, a5
+; RV64IA-TSO-ZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-TSO-ZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-TSO-ZACAS-NEXT:    bge a1, a7, .LBB51_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB51_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-TSO-ZACAS-NEXT:  .LBB51_3: # in Loop: Header=BB51_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a6, .LBB51_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_min_i8_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomin.b.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_min_i8_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomin.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw min ptr %a, i8 %b acquire
   ret i8 %1
 }
@@ -4807,63 +7098,131 @@ define i8 @atomicrmw_min_i8_release(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_min_i8_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    andi a3, a0, 24
-; RV64IA-WMO-NEXT:    li a4, 255
-; RV64IA-WMO-NEXT:    sllw a4, a4, a0
-; RV64IA-WMO-NEXT:    slli a1, a1, 56
-; RV64IA-WMO-NEXT:    srai a1, a1, 56
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    xori a3, a3, 56
-; RV64IA-WMO-NEXT:  .LBB52_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w a5, (a2)
-; RV64IA-WMO-NEXT:    and a7, a5, a4
-; RV64IA-WMO-NEXT:    mv a6, a5
-; RV64IA-WMO-NEXT:    sll a7, a7, a3
-; RV64IA-WMO-NEXT:    sra a7, a7, a3
-; RV64IA-WMO-NEXT:    bge a1, a7, .LBB52_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB52_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a6, a5, a1
-; RV64IA-WMO-NEXT:    and a6, a6, a4
-; RV64IA-WMO-NEXT:    xor a6, a5, a6
-; RV64IA-WMO-NEXT:  .LBB52_3: # in Loop: Header=BB52_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w.rl a6, a6, (a2)
-; RV64IA-WMO-NEXT:    bnez a6, .LBB52_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a5, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_min_i8_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-NOZACAS-NEXT:    li a4, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-WMO-NOZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB52_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a7, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    mv a6, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-WMO-NOZACAS-NEXT:    bge a1, a7, .LBB52_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB52_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB52_3: # in Loop: Header=BB52_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a6, .LBB52_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_min_i8_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    andi a3, a0, 24
-; RV64IA-TSO-NEXT:    li a4, 255
-; RV64IA-TSO-NEXT:    sllw a4, a4, a0
-; RV64IA-TSO-NEXT:    slli a1, a1, 56
-; RV64IA-TSO-NEXT:    srai a1, a1, 56
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    xori a3, a3, 56
-; RV64IA-TSO-NEXT:  .LBB52_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a5, (a2)
-; RV64IA-TSO-NEXT:    and a7, a5, a4
-; RV64IA-TSO-NEXT:    mv a6, a5
-; RV64IA-TSO-NEXT:    sll a7, a7, a3
-; RV64IA-TSO-NEXT:    sra a7, a7, a3
-; RV64IA-TSO-NEXT:    bge a1, a7, .LBB52_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB52_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a6, a5, a1
-; RV64IA-TSO-NEXT:    and a6, a6, a4
-; RV64IA-TSO-NEXT:    xor a6, a5, a6
-; RV64IA-TSO-NEXT:  .LBB52_3: # in Loop: Header=BB52_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a6, a6, (a2)
-; RV64IA-TSO-NEXT:    bnez a6, .LBB52_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a5, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_min_i8_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-NOZACAS-NEXT:    li a4, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-TSO-NOZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB52_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a7, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    mv a6, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-TSO-NOZACAS-NEXT:    bge a1, a7, .LBB52_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB52_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB52_3: # in Loop: Header=BB52_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a6, .LBB52_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_min_i8_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-ZACAS-NEXT:    li a4, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-WMO-ZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-WMO-ZACAS-NEXT:  .LBB52_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a7, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    mv a6, a5
+; RV64IA-WMO-ZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-WMO-ZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-WMO-ZACAS-NEXT:    bge a1, a7, .LBB52_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB52_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-WMO-ZACAS-NEXT:  .LBB52_3: # in Loop: Header=BB52_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a6, .LBB52_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_min_i8_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-ZACAS-NEXT:    li a4, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-TSO-ZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-TSO-ZACAS-NEXT:  .LBB52_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a7, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    mv a6, a5
+; RV64IA-TSO-ZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-TSO-ZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-TSO-ZACAS-NEXT:    bge a1, a7, .LBB52_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB52_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-TSO-ZACAS-NEXT:  .LBB52_3: # in Loop: Header=BB52_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a6, .LBB52_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_min_i8_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomin.b.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_min_i8_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomin.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw min ptr %a, i8 %b release
   ret i8 %1
 }
@@ -5011,63 +7370,131 @@ define i8 @atomicrmw_min_i8_acq_rel(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_min_i8_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    andi a3, a0, 24
-; RV64IA-WMO-NEXT:    li a4, 255
-; RV64IA-WMO-NEXT:    sllw a4, a4, a0
-; RV64IA-WMO-NEXT:    slli a1, a1, 56
-; RV64IA-WMO-NEXT:    srai a1, a1, 56
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    xori a3, a3, 56
-; RV64IA-WMO-NEXT:  .LBB53_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a5, (a2)
-; RV64IA-WMO-NEXT:    and a7, a5, a4
-; RV64IA-WMO-NEXT:    mv a6, a5
-; RV64IA-WMO-NEXT:    sll a7, a7, a3
-; RV64IA-WMO-NEXT:    sra a7, a7, a3
-; RV64IA-WMO-NEXT:    bge a1, a7, .LBB53_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB53_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a6, a5, a1
-; RV64IA-WMO-NEXT:    and a6, a6, a4
-; RV64IA-WMO-NEXT:    xor a6, a5, a6
-; RV64IA-WMO-NEXT:  .LBB53_3: # in Loop: Header=BB53_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w.rl a6, a6, (a2)
-; RV64IA-WMO-NEXT:    bnez a6, .LBB53_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a5, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_min_i8_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-NOZACAS-NEXT:    li a4, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-WMO-NOZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB53_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a7, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    mv a6, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-WMO-NOZACAS-NEXT:    bge a1, a7, .LBB53_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB53_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB53_3: # in Loop: Header=BB53_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a6, .LBB53_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_min_i8_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    andi a3, a0, 24
-; RV64IA-TSO-NEXT:    li a4, 255
-; RV64IA-TSO-NEXT:    sllw a4, a4, a0
-; RV64IA-TSO-NEXT:    slli a1, a1, 56
-; RV64IA-TSO-NEXT:    srai a1, a1, 56
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    xori a3, a3, 56
-; RV64IA-TSO-NEXT:  .LBB53_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a5, (a2)
-; RV64IA-TSO-NEXT:    and a7, a5, a4
-; RV64IA-TSO-NEXT:    mv a6, a5
-; RV64IA-TSO-NEXT:    sll a7, a7, a3
-; RV64IA-TSO-NEXT:    sra a7, a7, a3
-; RV64IA-TSO-NEXT:    bge a1, a7, .LBB53_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB53_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a6, a5, a1
-; RV64IA-TSO-NEXT:    and a6, a6, a4
-; RV64IA-TSO-NEXT:    xor a6, a5, a6
-; RV64IA-TSO-NEXT:  .LBB53_3: # in Loop: Header=BB53_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a6, a6, (a2)
-; RV64IA-TSO-NEXT:    bnez a6, .LBB53_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a5, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_min_i8_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-NOZACAS-NEXT:    li a4, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-TSO-NOZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB53_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a7, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    mv a6, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-TSO-NOZACAS-NEXT:    bge a1, a7, .LBB53_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB53_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB53_3: # in Loop: Header=BB53_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a6, .LBB53_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_min_i8_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-ZACAS-NEXT:    li a4, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-WMO-ZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-WMO-ZACAS-NEXT:  .LBB53_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a7, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    mv a6, a5
+; RV64IA-WMO-ZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-WMO-ZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-WMO-ZACAS-NEXT:    bge a1, a7, .LBB53_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB53_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-WMO-ZACAS-NEXT:  .LBB53_3: # in Loop: Header=BB53_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a6, .LBB53_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_min_i8_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-ZACAS-NEXT:    li a4, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-TSO-ZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-TSO-ZACAS-NEXT:  .LBB53_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a7, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    mv a6, a5
+; RV64IA-TSO-ZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-TSO-ZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-TSO-ZACAS-NEXT:    bge a1, a7, .LBB53_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB53_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-TSO-ZACAS-NEXT:  .LBB53_3: # in Loop: Header=BB53_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a6, .LBB53_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_min_i8_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomin.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_min_i8_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomin.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw min ptr %a, i8 %b acq_rel
   ret i8 %1
 }
@@ -5186,34 +7613,73 @@ define i8 @atomicrmw_min_i8_seq_cst(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_min_i8_seq_cst:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    andi a3, a0, 24
-; RV64IA-NEXT:    li a4, 255
-; RV64IA-NEXT:    sllw a4, a4, a0
-; RV64IA-NEXT:    slli a1, a1, 56
-; RV64IA-NEXT:    srai a1, a1, 56
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    xori a3, a3, 56
-; RV64IA-NEXT:  .LBB54_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a5, (a2)
-; RV64IA-NEXT:    and a7, a5, a4
-; RV64IA-NEXT:    mv a6, a5
-; RV64IA-NEXT:    sll a7, a7, a3
-; RV64IA-NEXT:    sra a7, a7, a3
-; RV64IA-NEXT:    bge a1, a7, .LBB54_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB54_1 Depth=1
-; RV64IA-NEXT:    xor a6, a5, a1
-; RV64IA-NEXT:    and a6, a6, a4
-; RV64IA-NEXT:    xor a6, a5, a6
-; RV64IA-NEXT:  .LBB54_3: # in Loop: Header=BB54_1 Depth=1
-; RV64IA-NEXT:    sc.w.rl a6, a6, (a2)
-; RV64IA-NEXT:    bnez a6, .LBB54_1
-; RV64IA-NEXT:  # %bb.4:
-; RV64IA-NEXT:    srlw a0, a5, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_min_i8_seq_cst:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-NOZACAS-NEXT:    li a4, 255
+; RV64IA-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-NOZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-NOZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-NOZACAS-NEXT:  .LBB54_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w.aqrl a5, (a2)
+; RV64IA-NOZACAS-NEXT:    and a7, a5, a4
+; RV64IA-NOZACAS-NEXT:    mv a6, a5
+; RV64IA-NOZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-NOZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-NOZACAS-NEXT:    bge a1, a7, .LBB54_3
+; RV64IA-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB54_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-NOZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-NOZACAS-NEXT:  .LBB54_3: # in Loop: Header=BB54_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a6, .LBB54_1
+; RV64IA-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_min_i8_seq_cst:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-ZACAS-NEXT:    li a4, 255
+; RV64IA-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-ZACAS-NEXT:    slli a1, a1, 56
+; RV64IA-ZACAS-NEXT:    srai a1, a1, 56
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    xori a3, a3, 56
+; RV64IA-ZACAS-NEXT:  .LBB54_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a5, (a2)
+; RV64IA-ZACAS-NEXT:    and a7, a5, a4
+; RV64IA-ZACAS-NEXT:    mv a6, a5
+; RV64IA-ZACAS-NEXT:    sll a7, a7, a3
+; RV64IA-ZACAS-NEXT:    sra a7, a7, a3
+; RV64IA-ZACAS-NEXT:    bge a1, a7, .LBB54_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB54_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a6, a5, a1
+; RV64IA-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-ZACAS-NEXT:    xor a6, a5, a6
+; RV64IA-ZACAS-NEXT:  .LBB54_3: # in Loop: Header=BB54_1 Depth=1
+; RV64IA-ZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a6, .LBB54_1
+; RV64IA-ZACAS-NEXT:  # %bb.4:
+; RV64IA-ZACAS-NEXT:    srlw a0, a5, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_min_i8_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomin.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_min_i8_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomin.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw min ptr %a, i8 %b seq_cst
   ret i8 %1
 }
@@ -5323,29 +7789,63 @@ define i8 @atomicrmw_umax_i8_monotonic(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_umax_i8_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    li a3, 255
-; RV64IA-NEXT:    sllw a3, a3, a0
-; RV64IA-NEXT:    andi a1, a1, 255
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB55_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w a4, (a2)
-; RV64IA-NEXT:    and a6, a4, a3
-; RV64IA-NEXT:    mv a5, a4
-; RV64IA-NEXT:    bgeu a6, a1, .LBB55_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB55_1 Depth=1
-; RV64IA-NEXT:    xor a5, a4, a1
-; RV64IA-NEXT:    and a5, a5, a3
-; RV64IA-NEXT:    xor a5, a4, a5
-; RV64IA-NEXT:  .LBB55_3: # in Loop: Header=BB55_1 Depth=1
-; RV64IA-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB55_1
-; RV64IA-NEXT:  # %bb.4:
-; RV64IA-NEXT:    srlw a0, a4, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_umax_i8_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB55_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-NOZACAS-NEXT:    and a6, a4, a3
+; RV64IA-NOZACAS-NEXT:    mv a5, a4
+; RV64IA-NOZACAS-NEXT:    bgeu a6, a1, .LBB55_3
+; RV64IA-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB55_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-NOZACAS-NEXT:  .LBB55_3: # in Loop: Header=BB55_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB55_1
+; RV64IA-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_umax_i8_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    li a3, 255
+; RV64IA-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB55_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-ZACAS-NEXT:    and a6, a4, a3
+; RV64IA-ZACAS-NEXT:    mv a5, a4
+; RV64IA-ZACAS-NEXT:    bgeu a6, a1, .LBB55_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB55_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-ZACAS-NEXT:  .LBB55_3: # in Loop: Header=BB55_1 Depth=1
+; RV64IA-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB55_1
+; RV64IA-ZACAS-NEXT:  # %bb.4:
+; RV64IA-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umax_i8_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomaxu.b a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_umax_i8_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomaxu.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw umax ptr %a, i8 %b monotonic
   ret i8 %1
 }
@@ -5479,53 +7979,111 @@ define i8 @atomicrmw_umax_i8_acquire(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_umax_i8_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB56_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a4, (a2)
-; RV64IA-WMO-NEXT:    and a6, a4, a3
-; RV64IA-WMO-NEXT:    mv a5, a4
-; RV64IA-WMO-NEXT:    bgeu a6, a1, .LBB56_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB56_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a5, a4, a1
-; RV64IA-WMO-NEXT:    and a5, a5, a3
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:  .LBB56_3: # in Loop: Header=BB56_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB56_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a4, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_umax_i8_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB56_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a4, a3
+; RV64IA-WMO-NOZACAS-NEXT:    mv a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    bgeu a6, a1, .LBB56_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB56_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB56_3: # in Loop: Header=BB56_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB56_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_umax_i8_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB56_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a4, (a2)
-; RV64IA-TSO-NEXT:    and a6, a4, a3
-; RV64IA-TSO-NEXT:    mv a5, a4
-; RV64IA-TSO-NEXT:    bgeu a6, a1, .LBB56_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB56_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a5, a4, a1
-; RV64IA-TSO-NEXT:    and a5, a5, a3
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:  .LBB56_3: # in Loop: Header=BB56_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB56_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a4, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_umax_i8_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB56_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a4, a3
+; RV64IA-TSO-NOZACAS-NEXT:    mv a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    bgeu a6, a1, .LBB56_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB56_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB56_3: # in Loop: Header=BB56_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB56_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umax_i8_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB56_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a4, a3
+; RV64IA-WMO-ZACAS-NEXT:    mv a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    bgeu a6, a1, .LBB56_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB56_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:  .LBB56_3: # in Loop: Header=BB56_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB56_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_umax_i8_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB56_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a4, a3
+; RV64IA-TSO-ZACAS-NEXT:    mv a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    bgeu a6, a1, .LBB56_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB56_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:  .LBB56_3: # in Loop: Header=BB56_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB56_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umax_i8_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomaxu.b.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_umax_i8_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomaxu.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw umax ptr %a, i8 %b acquire
   ret i8 %1
 }
@@ -5659,53 +8217,111 @@ define i8 @atomicrmw_umax_i8_release(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_umax_i8_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB57_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w a4, (a2)
-; RV64IA-WMO-NEXT:    and a6, a4, a3
-; RV64IA-WMO-NEXT:    mv a5, a4
-; RV64IA-WMO-NEXT:    bgeu a6, a1, .LBB57_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB57_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a5, a4, a1
-; RV64IA-WMO-NEXT:    and a5, a5, a3
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:  .LBB57_3: # in Loop: Header=BB57_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB57_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a4, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_umax_i8_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB57_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a4, a3
+; RV64IA-WMO-NOZACAS-NEXT:    mv a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    bgeu a6, a1, .LBB57_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB57_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB57_3: # in Loop: Header=BB57_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB57_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_umax_i8_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB57_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a4, a3
+; RV64IA-TSO-NOZACAS-NEXT:    mv a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    bgeu a6, a1, .LBB57_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB57_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB57_3: # in Loop: Header=BB57_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB57_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umax_i8_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB57_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a4, a3
+; RV64IA-WMO-ZACAS-NEXT:    mv a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    bgeu a6, a1, .LBB57_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB57_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:  .LBB57_3: # in Loop: Header=BB57_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB57_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_umax_i8_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB57_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a4, a3
+; RV64IA-TSO-ZACAS-NEXT:    mv a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    bgeu a6, a1, .LBB57_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB57_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:  .LBB57_3: # in Loop: Header=BB57_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB57_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umax_i8_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomaxu.b.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_umax_i8_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB57_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a4, (a2)
-; RV64IA-TSO-NEXT:    and a6, a4, a3
-; RV64IA-TSO-NEXT:    mv a5, a4
-; RV64IA-TSO-NEXT:    bgeu a6, a1, .LBB57_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB57_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a5, a4, a1
-; RV64IA-TSO-NEXT:    and a5, a5, a3
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:  .LBB57_3: # in Loop: Header=BB57_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB57_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a4, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_umax_i8_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomaxu.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw umax ptr %a, i8 %b release
   ret i8 %1
 }
@@ -5839,53 +8455,111 @@ define i8 @atomicrmw_umax_i8_acq_rel(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_umax_i8_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB58_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a4, (a2)
-; RV64IA-WMO-NEXT:    and a6, a4, a3
-; RV64IA-WMO-NEXT:    mv a5, a4
-; RV64IA-WMO-NEXT:    bgeu a6, a1, .LBB58_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB58_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a5, a4, a1
-; RV64IA-WMO-NEXT:    and a5, a5, a3
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:  .LBB58_3: # in Loop: Header=BB58_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB58_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a4, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_umax_i8_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB58_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a4, a3
+; RV64IA-WMO-NOZACAS-NEXT:    mv a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    bgeu a6, a1, .LBB58_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB58_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB58_3: # in Loop: Header=BB58_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB58_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_umax_i8_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB58_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a4, (a2)
-; RV64IA-TSO-NEXT:    and a6, a4, a3
-; RV64IA-TSO-NEXT:    mv a5, a4
-; RV64IA-TSO-NEXT:    bgeu a6, a1, .LBB58_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB58_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a5, a4, a1
-; RV64IA-TSO-NEXT:    and a5, a5, a3
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:  .LBB58_3: # in Loop: Header=BB58_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB58_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a4, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_umax_i8_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB58_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a4, a3
+; RV64IA-TSO-NOZACAS-NEXT:    mv a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    bgeu a6, a1, .LBB58_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB58_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB58_3: # in Loop: Header=BB58_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB58_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umax_i8_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB58_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a4, a3
+; RV64IA-WMO-ZACAS-NEXT:    mv a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    bgeu a6, a1, .LBB58_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB58_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:  .LBB58_3: # in Loop: Header=BB58_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB58_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_umax_i8_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB58_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a4, a3
+; RV64IA-TSO-ZACAS-NEXT:    mv a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    bgeu a6, a1, .LBB58_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB58_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:  .LBB58_3: # in Loop: Header=BB58_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB58_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umax_i8_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomaxu.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_umax_i8_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomaxu.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw umax ptr %a, i8 %b acq_rel
   ret i8 %1
 }
@@ -5995,29 +8669,63 @@ define i8 @atomicrmw_umax_i8_seq_cst(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_umax_i8_seq_cst:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    li a3, 255
-; RV64IA-NEXT:    sllw a3, a3, a0
-; RV64IA-NEXT:    andi a1, a1, 255
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB59_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a4, (a2)
-; RV64IA-NEXT:    and a6, a4, a3
-; RV64IA-NEXT:    mv a5, a4
-; RV64IA-NEXT:    bgeu a6, a1, .LBB59_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB59_1 Depth=1
-; RV64IA-NEXT:    xor a5, a4, a1
-; RV64IA-NEXT:    and a5, a5, a3
-; RV64IA-NEXT:    xor a5, a4, a5
-; RV64IA-NEXT:  .LBB59_3: # in Loop: Header=BB59_1 Depth=1
-; RV64IA-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB59_1
-; RV64IA-NEXT:  # %bb.4:
-; RV64IA-NEXT:    srlw a0, a4, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_umax_i8_seq_cst:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB59_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w.aqrl a4, (a2)
+; RV64IA-NOZACAS-NEXT:    and a6, a4, a3
+; RV64IA-NOZACAS-NEXT:    mv a5, a4
+; RV64IA-NOZACAS-NEXT:    bgeu a6, a1, .LBB59_3
+; RV64IA-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB59_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-NOZACAS-NEXT:  .LBB59_3: # in Loop: Header=BB59_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB59_1
+; RV64IA-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_umax_i8_seq_cst:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    li a3, 255
+; RV64IA-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB59_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a4, (a2)
+; RV64IA-ZACAS-NEXT:    and a6, a4, a3
+; RV64IA-ZACAS-NEXT:    mv a5, a4
+; RV64IA-ZACAS-NEXT:    bgeu a6, a1, .LBB59_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB59_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-ZACAS-NEXT:  .LBB59_3: # in Loop: Header=BB59_1 Depth=1
+; RV64IA-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB59_1
+; RV64IA-ZACAS-NEXT:  # %bb.4:
+; RV64IA-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umax_i8_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomaxu.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_umax_i8_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomaxu.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw umax ptr %a, i8 %b seq_cst
   ret i8 %1
 }
@@ -6127,29 +8835,63 @@ define i8 @atomicrmw_umin_i8_monotonic(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_umin_i8_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    li a3, 255
-; RV64IA-NEXT:    sllw a3, a3, a0
-; RV64IA-NEXT:    andi a1, a1, 255
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB60_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w a4, (a2)
-; RV64IA-NEXT:    and a6, a4, a3
-; RV64IA-NEXT:    mv a5, a4
-; RV64IA-NEXT:    bgeu a1, a6, .LBB60_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB60_1 Depth=1
-; RV64IA-NEXT:    xor a5, a4, a1
-; RV64IA-NEXT:    and a5, a5, a3
-; RV64IA-NEXT:    xor a5, a4, a5
-; RV64IA-NEXT:  .LBB60_3: # in Loop: Header=BB60_1 Depth=1
-; RV64IA-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB60_1
-; RV64IA-NEXT:  # %bb.4:
-; RV64IA-NEXT:    srlw a0, a4, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_umin_i8_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB60_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-NOZACAS-NEXT:    and a6, a4, a3
+; RV64IA-NOZACAS-NEXT:    mv a5, a4
+; RV64IA-NOZACAS-NEXT:    bgeu a1, a6, .LBB60_3
+; RV64IA-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB60_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-NOZACAS-NEXT:  .LBB60_3: # in Loop: Header=BB60_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB60_1
+; RV64IA-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_umin_i8_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    li a3, 255
+; RV64IA-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB60_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-ZACAS-NEXT:    and a6, a4, a3
+; RV64IA-ZACAS-NEXT:    mv a5, a4
+; RV64IA-ZACAS-NEXT:    bgeu a1, a6, .LBB60_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB60_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-ZACAS-NEXT:  .LBB60_3: # in Loop: Header=BB60_1 Depth=1
+; RV64IA-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB60_1
+; RV64IA-ZACAS-NEXT:  # %bb.4:
+; RV64IA-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umin_i8_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amominu.b a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_umin_i8_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amominu.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw umin ptr %a, i8 %b monotonic
   ret i8 %1
 }
@@ -6283,53 +9025,111 @@ define i8 @atomicrmw_umin_i8_acquire(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_umin_i8_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB61_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a4, (a2)
-; RV64IA-WMO-NEXT:    and a6, a4, a3
-; RV64IA-WMO-NEXT:    mv a5, a4
-; RV64IA-WMO-NEXT:    bgeu a1, a6, .LBB61_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB61_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a5, a4, a1
-; RV64IA-WMO-NEXT:    and a5, a5, a3
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:  .LBB61_3: # in Loop: Header=BB61_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB61_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a4, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_umin_i8_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB61_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a4, a3
+; RV64IA-WMO-NOZACAS-NEXT:    mv a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    bgeu a1, a6, .LBB61_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB61_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB61_3: # in Loop: Header=BB61_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB61_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_umin_i8_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB61_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a4, (a2)
-; RV64IA-TSO-NEXT:    and a6, a4, a3
-; RV64IA-TSO-NEXT:    mv a5, a4
-; RV64IA-TSO-NEXT:    bgeu a1, a6, .LBB61_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB61_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a5, a4, a1
-; RV64IA-TSO-NEXT:    and a5, a5, a3
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:  .LBB61_3: # in Loop: Header=BB61_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB61_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a4, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_umin_i8_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB61_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a4, a3
+; RV64IA-TSO-NOZACAS-NEXT:    mv a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    bgeu a1, a6, .LBB61_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB61_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB61_3: # in Loop: Header=BB61_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB61_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umin_i8_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB61_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a4, a3
+; RV64IA-WMO-ZACAS-NEXT:    mv a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    bgeu a1, a6, .LBB61_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB61_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:  .LBB61_3: # in Loop: Header=BB61_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB61_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_umin_i8_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB61_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a4, a3
+; RV64IA-TSO-ZACAS-NEXT:    mv a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    bgeu a1, a6, .LBB61_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB61_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:  .LBB61_3: # in Loop: Header=BB61_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB61_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umin_i8_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amominu.b.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_umin_i8_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amominu.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw umin ptr %a, i8 %b acquire
   ret i8 %1
 }
@@ -6463,53 +9263,111 @@ define i8 @atomicrmw_umin_i8_release(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_umin_i8_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB62_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w a4, (a2)
-; RV64IA-WMO-NEXT:    and a6, a4, a3
-; RV64IA-WMO-NEXT:    mv a5, a4
-; RV64IA-WMO-NEXT:    bgeu a1, a6, .LBB62_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB62_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a5, a4, a1
-; RV64IA-WMO-NEXT:    and a5, a5, a3
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:  .LBB62_3: # in Loop: Header=BB62_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB62_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a4, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_umin_i8_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB62_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a4, a3
+; RV64IA-WMO-NOZACAS-NEXT:    mv a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    bgeu a1, a6, .LBB62_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB62_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB62_3: # in Loop: Header=BB62_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB62_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_umin_i8_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB62_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a4, (a2)
-; RV64IA-TSO-NEXT:    and a6, a4, a3
-; RV64IA-TSO-NEXT:    mv a5, a4
-; RV64IA-TSO-NEXT:    bgeu a1, a6, .LBB62_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB62_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a5, a4, a1
-; RV64IA-TSO-NEXT:    and a5, a5, a3
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:  .LBB62_3: # in Loop: Header=BB62_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB62_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a4, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_umin_i8_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB62_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a4, a3
+; RV64IA-TSO-NOZACAS-NEXT:    mv a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    bgeu a1, a6, .LBB62_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB62_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB62_3: # in Loop: Header=BB62_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB62_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umin_i8_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB62_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a4, a3
+; RV64IA-WMO-ZACAS-NEXT:    mv a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    bgeu a1, a6, .LBB62_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB62_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:  .LBB62_3: # in Loop: Header=BB62_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB62_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_umin_i8_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB62_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a4, a3
+; RV64IA-TSO-ZACAS-NEXT:    mv a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    bgeu a1, a6, .LBB62_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB62_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:  .LBB62_3: # in Loop: Header=BB62_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB62_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umin_i8_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amominu.b.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_umin_i8_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amominu.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw umin ptr %a, i8 %b release
   ret i8 %1
 }
@@ -6643,53 +9501,111 @@ define i8 @atomicrmw_umin_i8_acq_rel(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_umin_i8_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    li a3, 255
-; RV64IA-WMO-NEXT:    sllw a3, a3, a0
-; RV64IA-WMO-NEXT:    andi a1, a1, 255
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB63_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a4, (a2)
-; RV64IA-WMO-NEXT:    and a6, a4, a3
-; RV64IA-WMO-NEXT:    mv a5, a4
-; RV64IA-WMO-NEXT:    bgeu a1, a6, .LBB63_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB63_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a5, a4, a1
-; RV64IA-WMO-NEXT:    and a5, a5, a3
-; RV64IA-WMO-NEXT:    xor a5, a4, a5
-; RV64IA-WMO-NEXT:  .LBB63_3: # in Loop: Header=BB63_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB63_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a4, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_umin_i8_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB63_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a4, a3
+; RV64IA-WMO-NOZACAS-NEXT:    mv a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    bgeu a1, a6, .LBB63_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB63_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB63_3: # in Loop: Header=BB63_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB63_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_umin_i8_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    li a3, 255
-; RV64IA-TSO-NEXT:    sllw a3, a3, a0
-; RV64IA-TSO-NEXT:    andi a1, a1, 255
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB63_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a4, (a2)
-; RV64IA-TSO-NEXT:    and a6, a4, a3
-; RV64IA-TSO-NEXT:    mv a5, a4
-; RV64IA-TSO-NEXT:    bgeu a1, a6, .LBB63_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB63_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a5, a4, a1
-; RV64IA-TSO-NEXT:    and a5, a5, a3
-; RV64IA-TSO-NEXT:    xor a5, a4, a5
-; RV64IA-TSO-NEXT:  .LBB63_3: # in Loop: Header=BB63_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB63_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a4, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_umin_i8_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB63_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a4, a3
+; RV64IA-TSO-NOZACAS-NEXT:    mv a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    bgeu a1, a6, .LBB63_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB63_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB63_3: # in Loop: Header=BB63_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB63_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umin_i8_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB63_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a4, a3
+; RV64IA-WMO-ZACAS-NEXT:    mv a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    bgeu a1, a6, .LBB63_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB63_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZACAS-NEXT:  .LBB63_3: # in Loop: Header=BB63_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB63_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_umin_i8_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB63_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a4, a3
+; RV64IA-TSO-ZACAS-NEXT:    mv a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    bgeu a1, a6, .LBB63_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB63_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZACAS-NEXT:  .LBB63_3: # in Loop: Header=BB63_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB63_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umin_i8_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amominu.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_umin_i8_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amominu.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw umin ptr %a, i8 %b acq_rel
   ret i8 %1
 }
@@ -6799,29 +9715,63 @@ define i8 @atomicrmw_umin_i8_seq_cst(ptr %a, i8 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_umin_i8_seq_cst:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    li a3, 255
-; RV64IA-NEXT:    sllw a3, a3, a0
-; RV64IA-NEXT:    andi a1, a1, 255
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB64_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a4, (a2)
-; RV64IA-NEXT:    and a6, a4, a3
-; RV64IA-NEXT:    mv a5, a4
-; RV64IA-NEXT:    bgeu a1, a6, .LBB64_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB64_1 Depth=1
-; RV64IA-NEXT:    xor a5, a4, a1
-; RV64IA-NEXT:    and a5, a5, a3
-; RV64IA-NEXT:    xor a5, a4, a5
-; RV64IA-NEXT:  .LBB64_3: # in Loop: Header=BB64_1 Depth=1
-; RV64IA-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB64_1
-; RV64IA-NEXT:  # %bb.4:
-; RV64IA-NEXT:    srlw a0, a4, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_umin_i8_seq_cst:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB64_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w.aqrl a4, (a2)
+; RV64IA-NOZACAS-NEXT:    and a6, a4, a3
+; RV64IA-NOZACAS-NEXT:    mv a5, a4
+; RV64IA-NOZACAS-NEXT:    bgeu a1, a6, .LBB64_3
+; RV64IA-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB64_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-NOZACAS-NEXT:  .LBB64_3: # in Loop: Header=BB64_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB64_1
+; RV64IA-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_umin_i8_seq_cst:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    li a3, 255
+; RV64IA-ZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-ZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB64_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a4, (a2)
+; RV64IA-ZACAS-NEXT:    and a6, a4, a3
+; RV64IA-ZACAS-NEXT:    mv a5, a4
+; RV64IA-ZACAS-NEXT:    bgeu a1, a6, .LBB64_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB64_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a1
+; RV64IA-ZACAS-NEXT:    and a5, a5, a3
+; RV64IA-ZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-ZACAS-NEXT:  .LBB64_3: # in Loop: Header=BB64_1 Depth=1
+; RV64IA-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB64_1
+; RV64IA-ZACAS-NEXT:  # %bb.4:
+; RV64IA-ZACAS-NEXT:    srlw a0, a4, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umin_i8_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amominu.b.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_umin_i8_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amominu.b a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw umin ptr %a, i8 %b seq_cst
   ret i8 %1
 }
@@ -6868,26 +9818,57 @@ define i16 @atomicrmw_xchg_i16_monotonic(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_xchg_i16_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    lui a3, 16
-; RV64IA-NEXT:    addi a3, a3, -1
-; RV64IA-NEXT:    sllw a4, a3, a0
-; RV64IA-NEXT:    and a1, a1, a3
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB65_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w a3, (a2)
-; RV64IA-NEXT:    mv a5, a1
-; RV64IA-NEXT:    xor a5, a3, a5
-; RV64IA-NEXT:    and a5, a5, a4
-; RV64IA-NEXT:    xor a5, a3, a5
-; RV64IA-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB65_1
-; RV64IA-NEXT:  # %bb.2:
-; RV64IA-NEXT:    srlw a0, a3, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_xchg_i16_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB65_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-NOZACAS-NEXT:    mv a5, a1
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB65_1
+; RV64IA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_xchg_i16_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    lui a3, 16
+; RV64IA-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB65_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-ZACAS-NEXT:    mv a5, a1
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB65_1
+; RV64IA-ZACAS-NEXT:  # %bb.2:
+; RV64IA-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i16_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.h a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_i16_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i16 %b monotonic
   ret i16 %1
 }
@@ -6955,47 +9936,99 @@ define i16 @atomicrmw_xchg_i16_acquire(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_i16_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB66_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a3, (a2)
-; RV64IA-WMO-NEXT:    mv a5, a1
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a4
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB66_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_i16_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB66_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    mv a5, a1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB66_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_i16_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB66_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    mv a5, a1
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a4
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB66_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_i16_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB66_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    mv a5, a1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB66_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_i16_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB66_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    mv a5, a1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB66_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_i16_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB66_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    mv a5, a1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB66_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i16_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.h.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_i16_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i16 %b acquire
   ret i16 %1
 }
@@ -7063,47 +10096,99 @@ define i16 @atomicrmw_xchg_i16_release(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_i16_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB67_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w a3, (a2)
-; RV64IA-WMO-NEXT:    mv a5, a1
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a4
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB67_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_i16_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB67_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    mv a5, a1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB67_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_i16_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB67_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    mv a5, a1
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a4
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB67_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_i16_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB67_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    mv a5, a1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB67_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_i16_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB67_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    mv a5, a1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB67_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_i16_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB67_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    mv a5, a1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB67_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i16_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.h.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_i16_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i16 %b release
   ret i16 %1
 }
@@ -7171,47 +10256,99 @@ define i16 @atomicrmw_xchg_i16_acq_rel(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_i16_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB68_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a3, (a2)
-; RV64IA-WMO-NEXT:    mv a5, a1
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a4
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB68_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_i16_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB68_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    mv a5, a1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB68_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_i16_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB68_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    mv a5, a1
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a4
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB68_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_i16_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB68_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    mv a5, a1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB68_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_i16_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB68_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    mv a5, a1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB68_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_i16_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB68_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    mv a5, a1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB68_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i16_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_i16_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i16 %b acq_rel
   ret i16 %1
 }
@@ -7258,26 +10395,57 @@ define i16 @atomicrmw_xchg_i16_seq_cst(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_xchg_i16_seq_cst:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    lui a3, 16
-; RV64IA-NEXT:    addi a3, a3, -1
-; RV64IA-NEXT:    sllw a4, a3, a0
-; RV64IA-NEXT:    and a1, a1, a3
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB69_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a3, (a2)
-; RV64IA-NEXT:    mv a5, a1
-; RV64IA-NEXT:    xor a5, a3, a5
-; RV64IA-NEXT:    and a5, a5, a4
-; RV64IA-NEXT:    xor a5, a3, a5
-; RV64IA-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB69_1
-; RV64IA-NEXT:  # %bb.2:
-; RV64IA-NEXT:    srlw a0, a3, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_xchg_i16_seq_cst:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB69_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w.aqrl a3, (a2)
+; RV64IA-NOZACAS-NEXT:    mv a5, a1
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB69_1
+; RV64IA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_xchg_i16_seq_cst:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    lui a3, 16
+; RV64IA-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB69_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a3, (a2)
+; RV64IA-ZACAS-NEXT:    mv a5, a1
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB69_1
+; RV64IA-ZACAS-NEXT:  # %bb.2:
+; RV64IA-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_i16_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_i16_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i16 %b seq_cst
   ret i16 %1
 }
@@ -7320,17 +10488,39 @@ define i16 @atomicrmw_xchg_0_i16_monotonic(ptr %a) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_xchg_0_i16_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a1, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    lui a2, 16
-; RV64IA-NEXT:    addi a2, a2, -1
-; RV64IA-NEXT:    sllw a2, a2, a0
-; RV64IA-NEXT:    not a2, a2
-; RV64IA-NEXT:    amoand.w a1, a2, (a1)
-; RV64IA-NEXT:    srlw a0, a1, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_xchg_0_i16_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    lui a2, 16
+; RV64IA-NOZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-NOZACAS-NEXT:    not a2, a2
+; RV64IA-NOZACAS-NEXT:    amoand.w a1, a2, (a1)
+; RV64IA-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_xchg_0_i16_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    lui a2, 16
+; RV64IA-ZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-ZACAS-NEXT:    not a2, a2
+; RV64IA-ZACAS-NEXT:    amoand.w a1, a2, (a1)
+; RV64IA-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i16_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.h a0, zero, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_0_i16_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.h a0, zero, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i16 0 monotonic
   ret i16 %1
 }
@@ -7382,29 +10572,63 @@ define i16 @atomicrmw_xchg_0_i16_acquire(ptr %a) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_0_i16_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a1, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a2, 16
-; RV64IA-WMO-NEXT:    addi a2, a2, -1
-; RV64IA-WMO-NEXT:    sllw a2, a2, a0
-; RV64IA-WMO-NEXT:    not a2, a2
-; RV64IA-WMO-NEXT:    amoand.w.aq a1, a2, (a1)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_0_i16_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a2, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-NOZACAS-NEXT:    not a2, a2
+; RV64IA-WMO-NOZACAS-NEXT:    amoand.w.aq a1, a2, (a1)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_0_i16_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a1, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a2, 16
-; RV64IA-TSO-NEXT:    addi a2, a2, -1
-; RV64IA-TSO-NEXT:    sllw a2, a2, a0
-; RV64IA-TSO-NEXT:    not a2, a2
-; RV64IA-TSO-NEXT:    amoand.w a1, a2, (a1)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_0_i16_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a2, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-NOZACAS-NEXT:    not a2, a2
+; RV64IA-TSO-NOZACAS-NEXT:    amoand.w a1, a2, (a1)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i16_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a2, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-ZACAS-NEXT:    not a2, a2
+; RV64IA-WMO-ZACAS-NEXT:    amoand.w.aq a1, a2, (a1)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_0_i16_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a2, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-ZACAS-NEXT:    not a2, a2
+; RV64IA-TSO-ZACAS-NEXT:    amoand.w a1, a2, (a1)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i16_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.h.aq a0, zero, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_0_i16_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.h a0, zero, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i16 0 acquire
   ret i16 %1
 }
@@ -7456,29 +10680,63 @@ define i16 @atomicrmw_xchg_0_i16_release(ptr %a) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_0_i16_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a1, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a2, 16
-; RV64IA-WMO-NEXT:    addi a2, a2, -1
-; RV64IA-WMO-NEXT:    sllw a2, a2, a0
-; RV64IA-WMO-NEXT:    not a2, a2
-; RV64IA-WMO-NEXT:    amoand.w.rl a1, a2, (a1)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_0_i16_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a2, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-NOZACAS-NEXT:    not a2, a2
+; RV64IA-WMO-NOZACAS-NEXT:    amoand.w.rl a1, a2, (a1)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_0_i16_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a1, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a2, 16
-; RV64IA-TSO-NEXT:    addi a2, a2, -1
-; RV64IA-TSO-NEXT:    sllw a2, a2, a0
-; RV64IA-TSO-NEXT:    not a2, a2
-; RV64IA-TSO-NEXT:    amoand.w a1, a2, (a1)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_0_i16_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a2, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-NOZACAS-NEXT:    not a2, a2
+; RV64IA-TSO-NOZACAS-NEXT:    amoand.w a1, a2, (a1)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i16_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a2, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-ZACAS-NEXT:    not a2, a2
+; RV64IA-WMO-ZACAS-NEXT:    amoand.w.rl a1, a2, (a1)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_0_i16_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a2, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-ZACAS-NEXT:    not a2, a2
+; RV64IA-TSO-ZACAS-NEXT:    amoand.w a1, a2, (a1)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i16_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.h.rl a0, zero, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_0_i16_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.h a0, zero, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i16 0 release
   ret i16 %1
 }
@@ -7530,29 +10788,63 @@ define i16 @atomicrmw_xchg_0_i16_acq_rel(ptr %a) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_0_i16_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a1, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a2, 16
-; RV64IA-WMO-NEXT:    addi a2, a2, -1
-; RV64IA-WMO-NEXT:    sllw a2, a2, a0
-; RV64IA-WMO-NEXT:    not a2, a2
-; RV64IA-WMO-NEXT:    amoand.w.aqrl a1, a2, (a1)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_0_i16_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a2, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-NOZACAS-NEXT:    not a2, a2
+; RV64IA-WMO-NOZACAS-NEXT:    amoand.w.aqrl a1, a2, (a1)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_0_i16_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a1, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a2, 16
-; RV64IA-TSO-NEXT:    addi a2, a2, -1
-; RV64IA-TSO-NEXT:    sllw a2, a2, a0
-; RV64IA-TSO-NEXT:    not a2, a2
-; RV64IA-TSO-NEXT:    amoand.w a1, a2, (a1)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_0_i16_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a2, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-NOZACAS-NEXT:    not a2, a2
+; RV64IA-TSO-NOZACAS-NEXT:    amoand.w a1, a2, (a1)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i16_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a2, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-ZACAS-NEXT:    not a2, a2
+; RV64IA-WMO-ZACAS-NEXT:    amoand.w.aqrl a1, a2, (a1)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_0_i16_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a2, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-ZACAS-NEXT:    not a2, a2
+; RV64IA-TSO-ZACAS-NEXT:    amoand.w a1, a2, (a1)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i16_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.h.aqrl a0, zero, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_0_i16_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.h a0, zero, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i16 0 acq_rel
   ret i16 %1
 }
@@ -7604,29 +10896,63 @@ define i16 @atomicrmw_xchg_0_i16_seq_cst(ptr %a) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_0_i16_seq_cst:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a1, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a2, 16
-; RV64IA-WMO-NEXT:    addi a2, a2, -1
-; RV64IA-WMO-NEXT:    sllw a2, a2, a0
-; RV64IA-WMO-NEXT:    not a2, a2
-; RV64IA-WMO-NEXT:    amoand.w.aqrl a1, a2, (a1)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_0_i16_seq_cst:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a2, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-NOZACAS-NEXT:    not a2, a2
+; RV64IA-WMO-NOZACAS-NEXT:    amoand.w.aqrl a1, a2, (a1)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_0_i16_seq_cst:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a1, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a2, 16
-; RV64IA-TSO-NEXT:    addi a2, a2, -1
-; RV64IA-TSO-NEXT:    sllw a2, a2, a0
-; RV64IA-TSO-NEXT:    not a2, a2
-; RV64IA-TSO-NEXT:    amoand.w a1, a2, (a1)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_0_i16_seq_cst:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a2, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-NOZACAS-NEXT:    not a2, a2
+; RV64IA-TSO-NOZACAS-NEXT:    amoand.w a1, a2, (a1)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_0_i16_seq_cst:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a2, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-ZACAS-NEXT:    not a2, a2
+; RV64IA-WMO-ZACAS-NEXT:    amoand.w.aqrl a1, a2, (a1)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_0_i16_seq_cst:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a2, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-ZACAS-NEXT:    not a2, a2
+; RV64IA-TSO-ZACAS-NEXT:    amoand.w a1, a2, (a1)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_0_i16_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.h.aqrl a0, zero, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_0_i16_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.h a0, zero, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i16 0 seq_cst
   ret i16 %1
 }
@@ -7667,16 +10993,39 @@ define i16 @atomicrmw_xchg_minus_1_i16_monotonic(ptr %a) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_xchg_minus_1_i16_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a1, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    lui a2, 16
-; RV64IA-NEXT:    addi a2, a2, -1
-; RV64IA-NEXT:    sllw a2, a2, a0
-; RV64IA-NEXT:    amoor.w a1, a2, (a1)
-; RV64IA-NEXT:    srlw a0, a1, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i16_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    lui a2, 16
+; RV64IA-NOZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-NOZACAS-NEXT:    amoor.w a1, a2, (a1)
+; RV64IA-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    lui a2, 16
+; RV64IA-ZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-ZACAS-NEXT:    amoor.w a1, a2, (a1)
+; RV64IA-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    li a1, -1
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.h a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    li a1, -1
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i16 -1 monotonic
   ret i16 %1
 }
@@ -7728,27 +11077,61 @@ define i16 @atomicrmw_xchg_minus_1_i16_acquire(ptr %a) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_minus_1_i16_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a1, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a2, 16
-; RV64IA-WMO-NEXT:    addi a2, a2, -1
-; RV64IA-WMO-NEXT:    sllw a2, a2, a0
-; RV64IA-WMO-NEXT:    amoor.w.aq a1, a2, (a1)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i16_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a2, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoor.w.aq a1, a2, (a1)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i16_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a2, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoor.w a1, a2, (a1)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a2, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoor.w.aq a1, a2, (a1)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_minus_1_i16_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a1, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a2, 16
-; RV64IA-TSO-NEXT:    addi a2, a2, -1
-; RV64IA-TSO-NEXT:    sllw a2, a2, a0
-; RV64IA-TSO-NEXT:    amoor.w a1, a2, (a1)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a2, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoor.w a1, a2, (a1)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    li a1, -1
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.h.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    li a1, -1
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i16 -1 acquire
   ret i16 %1
 }
@@ -7800,27 +11183,61 @@ define i16 @atomicrmw_xchg_minus_1_i16_release(ptr %a) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_minus_1_i16_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a1, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a2, 16
-; RV64IA-WMO-NEXT:    addi a2, a2, -1
-; RV64IA-WMO-NEXT:    sllw a2, a2, a0
-; RV64IA-WMO-NEXT:    amoor.w.rl a1, a2, (a1)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i16_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a2, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoor.w.rl a1, a2, (a1)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_minus_1_i16_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a1, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a2, 16
-; RV64IA-TSO-NEXT:    addi a2, a2, -1
-; RV64IA-TSO-NEXT:    sllw a2, a2, a0
-; RV64IA-TSO-NEXT:    amoor.w a1, a2, (a1)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i16_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a2, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoor.w a1, a2, (a1)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a2, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoor.w.rl a1, a2, (a1)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a2, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoor.w a1, a2, (a1)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    li a1, -1
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.h.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    li a1, -1
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i16 -1 release
   ret i16 %1
 }
@@ -7872,27 +11289,61 @@ define i16 @atomicrmw_xchg_minus_1_i16_acq_rel(ptr %a) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_minus_1_i16_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a1, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a2, 16
-; RV64IA-WMO-NEXT:    addi a2, a2, -1
-; RV64IA-WMO-NEXT:    sllw a2, a2, a0
-; RV64IA-WMO-NEXT:    amoor.w.aqrl a1, a2, (a1)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i16_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a2, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoor.w.aqrl a1, a2, (a1)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_minus_1_i16_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a1, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a2, 16
-; RV64IA-TSO-NEXT:    addi a2, a2, -1
-; RV64IA-TSO-NEXT:    sllw a2, a2, a0
-; RV64IA-TSO-NEXT:    amoor.w a1, a2, (a1)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i16_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a2, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoor.w a1, a2, (a1)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a2, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoor.w.aqrl a1, a2, (a1)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a2, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoor.w a1, a2, (a1)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    li a1, -1
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    li a1, -1
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i16 -1 acq_rel
   ret i16 %1
 }
@@ -7944,27 +11395,61 @@ define i16 @atomicrmw_xchg_minus_1_i16_seq_cst(ptr %a) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xchg_minus_1_i16_seq_cst:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a1, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a2, 16
-; RV64IA-WMO-NEXT:    addi a2, a2, -1
-; RV64IA-WMO-NEXT:    sllw a2, a2, a0
-; RV64IA-WMO-NEXT:    amoor.w.aqrl a1, a2, (a1)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i16_seq_cst:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a2, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoor.w.aqrl a1, a2, (a1)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xchg_minus_1_i16_seq_cst:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a1, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a2, 16
-; RV64IA-TSO-NEXT:    addi a2, a2, -1
-; RV64IA-TSO-NEXT:    sllw a2, a2, a0
-; RV64IA-TSO-NEXT:    amoor.w a1, a2, (a1)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xchg_minus_1_i16_seq_cst:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a2, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoor.w a1, a2, (a1)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_seq_cst:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a2, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoor.w.aqrl a1, a2, (a1)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xchg_minus_1_i16_seq_cst:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a1, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a2, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a2, a2, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a2, a2, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoor.w a1, a2, (a1)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    li a1, -1
+; RV64IA-WMO-ZABHA-NEXT:    amoswap.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xchg_minus_1_i16_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    li a1, -1
+; RV64IA-TSO-ZABHA-NEXT:    amoswap.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xchg ptr %a, i16 -1 seq_cst
   ret i16 %1
 }
@@ -8011,26 +11496,57 @@ define i16 @atomicrmw_add_i16_monotonic(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_add_i16_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    lui a3, 16
-; RV64IA-NEXT:    addi a3, a3, -1
-; RV64IA-NEXT:    sllw a4, a3, a0
-; RV64IA-NEXT:    and a1, a1, a3
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB80_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w a3, (a2)
-; RV64IA-NEXT:    add a5, a3, a1
-; RV64IA-NEXT:    xor a5, a3, a5
-; RV64IA-NEXT:    and a5, a5, a4
-; RV64IA-NEXT:    xor a5, a3, a5
-; RV64IA-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB80_1
-; RV64IA-NEXT:  # %bb.2:
-; RV64IA-NEXT:    srlw a0, a3, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_add_i16_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB80_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-NOZACAS-NEXT:    add a5, a3, a1
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB80_1
+; RV64IA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_add_i16_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    lui a3, 16
+; RV64IA-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB80_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-ZACAS-NEXT:    add a5, a3, a1
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB80_1
+; RV64IA-ZACAS-NEXT:  # %bb.2:
+; RV64IA-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_add_i16_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoadd.h a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_add_i16_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoadd.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw add ptr %a, i16 %b monotonic
   ret i16 %1
 }
@@ -8098,47 +11614,99 @@ define i16 @atomicrmw_add_i16_acquire(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_add_i16_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB81_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a3, (a2)
-; RV64IA-WMO-NEXT:    add a5, a3, a1
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a4
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB81_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_add_i16_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB81_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    add a5, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB81_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_add_i16_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB81_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    add a5, a3, a1
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a4
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB81_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_add_i16_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB81_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    add a5, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB81_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_add_i16_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB81_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    add a5, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB81_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_add_i16_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB81_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    add a5, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB81_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_add_i16_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoadd.h.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_add_i16_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoadd.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw add ptr %a, i16 %b acquire
   ret i16 %1
 }
@@ -8206,47 +11774,99 @@ define i16 @atomicrmw_add_i16_release(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_add_i16_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB82_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w a3, (a2)
-; RV64IA-WMO-NEXT:    add a5, a3, a1
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a4
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB82_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_add_i16_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB82_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    add a5, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB82_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_add_i16_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB82_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    add a5, a3, a1
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a4
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB82_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_add_i16_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB82_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    add a5, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB82_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_add_i16_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB82_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    add a5, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB82_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_add_i16_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB82_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    add a5, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB82_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_add_i16_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoadd.h.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_add_i16_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoadd.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw add ptr %a, i16 %b release
   ret i16 %1
 }
@@ -8314,47 +11934,99 @@ define i16 @atomicrmw_add_i16_acq_rel(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_add_i16_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB83_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a3, (a2)
-; RV64IA-WMO-NEXT:    add a5, a3, a1
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a4
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB83_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_add_i16_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB83_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    add a5, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB83_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_add_i16_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB83_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    add a5, a3, a1
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a4
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB83_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_add_i16_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB83_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    add a5, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB83_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_add_i16_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB83_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    add a5, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB83_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_add_i16_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB83_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    add a5, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB83_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_add_i16_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoadd.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_add_i16_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoadd.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw add ptr %a, i16 %b acq_rel
   ret i16 %1
 }
@@ -8401,26 +12073,57 @@ define i16 @atomicrmw_add_i16_seq_cst(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_add_i16_seq_cst:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    lui a3, 16
-; RV64IA-NEXT:    addi a3, a3, -1
-; RV64IA-NEXT:    sllw a4, a3, a0
-; RV64IA-NEXT:    and a1, a1, a3
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB84_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a3, (a2)
-; RV64IA-NEXT:    add a5, a3, a1
-; RV64IA-NEXT:    xor a5, a3, a5
-; RV64IA-NEXT:    and a5, a5, a4
-; RV64IA-NEXT:    xor a5, a3, a5
-; RV64IA-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB84_1
-; RV64IA-NEXT:  # %bb.2:
-; RV64IA-NEXT:    srlw a0, a3, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_add_i16_seq_cst:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB84_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w.aqrl a3, (a2)
+; RV64IA-NOZACAS-NEXT:    add a5, a3, a1
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB84_1
+; RV64IA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_add_i16_seq_cst:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    lui a3, 16
+; RV64IA-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB84_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a3, (a2)
+; RV64IA-ZACAS-NEXT:    add a5, a3, a1
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB84_1
+; RV64IA-ZACAS-NEXT:  # %bb.2:
+; RV64IA-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_add_i16_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoadd.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_add_i16_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoadd.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw add ptr %a, i16 %b seq_cst
   ret i16 %1
 }
@@ -8467,26 +12170,59 @@ define i16 @atomicrmw_sub_i16_monotonic(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_sub_i16_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    lui a3, 16
-; RV64IA-NEXT:    addi a3, a3, -1
-; RV64IA-NEXT:    sllw a4, a3, a0
-; RV64IA-NEXT:    and a1, a1, a3
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB85_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w a3, (a2)
-; RV64IA-NEXT:    sub a5, a3, a1
-; RV64IA-NEXT:    xor a5, a3, a5
-; RV64IA-NEXT:    and a5, a5, a4
-; RV64IA-NEXT:    xor a5, a3, a5
-; RV64IA-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB85_1
-; RV64IA-NEXT:  # %bb.2:
-; RV64IA-NEXT:    srlw a0, a3, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_sub_i16_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB85_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-NOZACAS-NEXT:    sub a5, a3, a1
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB85_1
+; RV64IA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_sub_i16_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    lui a3, 16
+; RV64IA-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB85_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-ZACAS-NEXT:    sub a5, a3, a1
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB85_1
+; RV64IA-ZACAS-NEXT:  # %bb.2:
+; RV64IA-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_sub_i16_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    neg a1, a1
+; RV64IA-WMO-ZABHA-NEXT:    amoadd.h a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_sub_i16_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    neg a1, a1
+; RV64IA-TSO-ZABHA-NEXT:    amoadd.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw sub ptr %a, i16 %b monotonic
   ret i16 %1
 }
@@ -8554,47 +12290,101 @@ define i16 @atomicrmw_sub_i16_acquire(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_sub_i16_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB86_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a3, (a2)
-; RV64IA-WMO-NEXT:    sub a5, a3, a1
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a4
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB86_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_sub_i16_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB86_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    sub a5, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB86_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_sub_i16_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB86_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    sub a5, a3, a1
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a4
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB86_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_sub_i16_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB86_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    sub a5, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB86_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_sub_i16_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB86_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    sub a5, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB86_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_sub_i16_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB86_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    sub a5, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB86_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_sub_i16_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    neg a1, a1
+; RV64IA-WMO-ZABHA-NEXT:    amoadd.h.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_sub_i16_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    neg a1, a1
+; RV64IA-TSO-ZABHA-NEXT:    amoadd.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw sub ptr %a, i16 %b acquire
   ret i16 %1
 }
@@ -8662,47 +12452,101 @@ define i16 @atomicrmw_sub_i16_release(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_sub_i16_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB87_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w a3, (a2)
-; RV64IA-WMO-NEXT:    sub a5, a3, a1
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a4
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB87_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_sub_i16_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB87_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    sub a5, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB87_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_sub_i16_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB87_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    sub a5, a3, a1
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a4
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB87_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_sub_i16_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB87_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    sub a5, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB87_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_sub_i16_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB87_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    sub a5, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB87_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_sub_i16_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB87_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    sub a5, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB87_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_sub_i16_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    neg a1, a1
+; RV64IA-WMO-ZABHA-NEXT:    amoadd.h.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_sub_i16_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    neg a1, a1
+; RV64IA-TSO-ZABHA-NEXT:    amoadd.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw sub ptr %a, i16 %b release
   ret i16 %1
 }
@@ -8770,47 +12614,101 @@ define i16 @atomicrmw_sub_i16_acq_rel(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_sub_i16_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB88_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a3, (a2)
-; RV64IA-WMO-NEXT:    sub a5, a3, a1
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a4
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB88_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_sub_i16_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB88_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    sub a5, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB88_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_sub_i16_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB88_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    sub a5, a3, a1
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a4
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB88_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_sub_i16_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB88_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    sub a5, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB88_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_sub_i16_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB88_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    sub a5, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB88_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_sub_i16_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB88_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    sub a5, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB88_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_sub_i16_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    neg a1, a1
+; RV64IA-WMO-ZABHA-NEXT:    amoadd.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_sub_i16_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    neg a1, a1
+; RV64IA-TSO-ZABHA-NEXT:    amoadd.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw sub ptr %a, i16 %b acq_rel
   ret i16 %1
 }
@@ -8857,26 +12755,59 @@ define i16 @atomicrmw_sub_i16_seq_cst(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_sub_i16_seq_cst:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    lui a3, 16
-; RV64IA-NEXT:    addi a3, a3, -1
-; RV64IA-NEXT:    sllw a4, a3, a0
-; RV64IA-NEXT:    and a1, a1, a3
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB89_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a3, (a2)
-; RV64IA-NEXT:    sub a5, a3, a1
-; RV64IA-NEXT:    xor a5, a3, a5
-; RV64IA-NEXT:    and a5, a5, a4
-; RV64IA-NEXT:    xor a5, a3, a5
-; RV64IA-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB89_1
-; RV64IA-NEXT:  # %bb.2:
-; RV64IA-NEXT:    srlw a0, a3, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_sub_i16_seq_cst:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB89_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w.aqrl a3, (a2)
+; RV64IA-NOZACAS-NEXT:    sub a5, a3, a1
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB89_1
+; RV64IA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_sub_i16_seq_cst:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    lui a3, 16
+; RV64IA-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB89_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a3, (a2)
+; RV64IA-ZACAS-NEXT:    sub a5, a3, a1
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB89_1
+; RV64IA-ZACAS-NEXT:  # %bb.2:
+; RV64IA-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_sub_i16_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    neg a1, a1
+; RV64IA-WMO-ZABHA-NEXT:    amoadd.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_sub_i16_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    neg a1, a1
+; RV64IA-TSO-ZABHA-NEXT:    amoadd.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw sub ptr %a, i16 %b seq_cst
   ret i16 %1
 }
@@ -8917,20 +12848,45 @@ define i16 @atomicrmw_and_i16_monotonic(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_and_i16_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    lui a3, 16
-; RV64IA-NEXT:    addi a3, a3, -1
-; RV64IA-NEXT:    sllw a4, a3, a0
-; RV64IA-NEXT:    not a4, a4
-; RV64IA-NEXT:    and a1, a1, a3
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    or a1, a4, a1
-; RV64IA-NEXT:    amoand.w a1, a1, (a2)
-; RV64IA-NEXT:    srlw a0, a1, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_and_i16_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-NOZACAS-NEXT:    not a4, a4
+; RV64IA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:    or a1, a4, a1
+; RV64IA-NOZACAS-NEXT:    amoand.w a1, a1, (a2)
+; RV64IA-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_and_i16_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    lui a3, 16
+; RV64IA-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-ZACAS-NEXT:    not a4, a4
+; RV64IA-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    or a1, a4, a1
+; RV64IA-ZACAS-NEXT:    amoand.w a1, a1, (a2)
+; RV64IA-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_and_i16_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoand.h a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_and_i16_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoand.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw and ptr %a, i16 %b monotonic
   ret i16 %1
 }
@@ -8986,35 +12942,75 @@ define i16 @atomicrmw_and_i16_acquire(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_and_i16_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    not a4, a4
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    or a1, a4, a1
-; RV64IA-WMO-NEXT:    amoand.w.aq a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_and_i16_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    or a1, a4, a1
+; RV64IA-WMO-NOZACAS-NEXT:    amoand.w.aq a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_and_i16_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    not a4, a4
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    or a1, a4, a1
-; RV64IA-TSO-NEXT:    amoand.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_and_i16_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    or a1, a4, a1
+; RV64IA-TSO-NOZACAS-NEXT:    amoand.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_and_i16_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    or a1, a4, a1
+; RV64IA-WMO-ZACAS-NEXT:    amoand.w.aq a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_and_i16_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    or a1, a4, a1
+; RV64IA-TSO-ZACAS-NEXT:    amoand.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_and_i16_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoand.h.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_and_i16_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoand.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw and ptr %a, i16 %b acquire
   ret i16 %1
 }
@@ -9070,35 +13066,75 @@ define i16 @atomicrmw_and_i16_release(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_and_i16_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    not a4, a4
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    or a1, a4, a1
-; RV64IA-WMO-NEXT:    amoand.w.rl a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_and_i16_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    or a1, a4, a1
+; RV64IA-WMO-NOZACAS-NEXT:    amoand.w.rl a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_and_i16_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    not a4, a4
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    or a1, a4, a1
-; RV64IA-TSO-NEXT:    amoand.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_and_i16_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    or a1, a4, a1
+; RV64IA-TSO-NOZACAS-NEXT:    amoand.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_and_i16_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    or a1, a4, a1
+; RV64IA-WMO-ZACAS-NEXT:    amoand.w.rl a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_and_i16_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    or a1, a4, a1
+; RV64IA-TSO-ZACAS-NEXT:    amoand.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_and_i16_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoand.h.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_and_i16_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoand.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw and ptr %a, i16 %b release
   ret i16 %1
 }
@@ -9154,35 +13190,75 @@ define i16 @atomicrmw_and_i16_acq_rel(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_and_i16_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    not a4, a4
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    or a1, a4, a1
-; RV64IA-WMO-NEXT:    amoand.w.aqrl a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_and_i16_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    or a1, a4, a1
+; RV64IA-WMO-NOZACAS-NEXT:    amoand.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_and_i16_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    or a1, a4, a1
+; RV64IA-TSO-NOZACAS-NEXT:    amoand.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_and_i16_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    or a1, a4, a1
+; RV64IA-WMO-ZACAS-NEXT:    amoand.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_and_i16_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    or a1, a4, a1
+; RV64IA-TSO-ZACAS-NEXT:    amoand.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_and_i16_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoand.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_and_i16_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    not a4, a4
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    or a1, a4, a1
-; RV64IA-TSO-NEXT:    amoand.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_and_i16_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoand.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw and ptr %a, i16 %b acq_rel
   ret i16 %1
 }
@@ -9238,35 +13314,75 @@ define i16 @atomicrmw_and_i16_seq_cst(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_and_i16_seq_cst:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    not a4, a4
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    or a1, a4, a1
-; RV64IA-WMO-NEXT:    amoand.w.aqrl a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_and_i16_seq_cst:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    or a1, a4, a1
+; RV64IA-WMO-NOZACAS-NEXT:    amoand.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_and_i16_seq_cst:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    not a4, a4
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    or a1, a4, a1
-; RV64IA-TSO-NEXT:    amoand.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_and_i16_seq_cst:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    or a1, a4, a1
+; RV64IA-TSO-NOZACAS-NEXT:    amoand.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_and_i16_seq_cst:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    or a1, a4, a1
+; RV64IA-WMO-ZACAS-NEXT:    amoand.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_and_i16_seq_cst:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    or a1, a4, a1
+; RV64IA-TSO-ZACAS-NEXT:    amoand.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_and_i16_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoand.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_and_i16_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoand.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw and ptr %a, i16 %b seq_cst
   ret i16 %1
 }
@@ -9314,27 +13430,115 @@ define i16 @atomicrmw_nand_i16_monotonic(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_nand_i16_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    lui a3, 16
-; RV64IA-NEXT:    addi a3, a3, -1
-; RV64IA-NEXT:    sllw a4, a3, a0
-; RV64IA-NEXT:    and a1, a1, a3
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB95_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w a3, (a2)
-; RV64IA-NEXT:    and a5, a3, a1
-; RV64IA-NEXT:    not a5, a5
-; RV64IA-NEXT:    xor a5, a3, a5
-; RV64IA-NEXT:    and a5, a5, a4
-; RV64IA-NEXT:    xor a5, a3, a5
-; RV64IA-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB95_1
-; RV64IA-NEXT:  # %bb.2:
-; RV64IA-NEXT:    srlw a0, a3, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_nand_i16_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB95_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-NOZACAS-NEXT:    and a5, a3, a1
+; RV64IA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB95_1
+; RV64IA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_nand_i16_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    lui a3, 16
+; RV64IA-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB95_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-ZACAS-NEXT:    and a5, a3, a1
+; RV64IA-ZACAS-NEXT:    not a5, a5
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB95_1
+; RV64IA-ZACAS-NEXT:  # %bb.2:
+; RV64IA-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_monotonic:
+; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 48
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB95_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB95_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_monotonic:
+; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 48
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB95_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB95_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_monotonic:
+; RV64IA-WMO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    lhu a0, 0(a0)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  .LBB95_1: # %atomicrmw.start
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    and a3, a0, a1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    slli a4, a0, 48
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    amocas.h a0, a3, (a2)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    srai a4, a4, 48
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    bne a0, a4, .LBB95_1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_monotonic:
+; RV64IA-TSO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    lhu a0, 0(a0)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  .LBB95_1: # %atomicrmw.start
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    and a3, a0, a1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    slli a4, a0, 48
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    amocas.h a0, a3, (a2)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    srai a4, a4, 48
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    bne a0, a4, .LBB95_1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ret
   %1 = atomicrmw nand ptr %a, i16 %b monotonic
   ret i16 %1
 }
@@ -9404,49 +13608,159 @@ define i16 @atomicrmw_nand_i16_acquire(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_nand_i16_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB96_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a3, (a2)
-; RV64IA-WMO-NEXT:    and a5, a3, a1
-; RV64IA-WMO-NEXT:    not a5, a5
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a4
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB96_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_nand_i16_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB96_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB96_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_nand_i16_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB96_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    and a5, a3, a1
-; RV64IA-TSO-NEXT:    not a5, a5
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a4
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB96_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_nand_i16_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB96_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB96_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_nand_i16_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB96_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB96_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_nand_i16_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB96_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB96_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_acquire:
+; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 48
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB96_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w.aq a1, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB96_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_acquire:
+; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 48
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB96_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB96_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_acquire:
+; RV64IA-WMO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    lhu a0, 0(a0)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  .LBB96_1: # %atomicrmw.start
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    and a3, a0, a1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    slli a4, a0, 48
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    amocas.h.aq a0, a3, (a2)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    srai a4, a4, 48
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    bne a0, a4, .LBB96_1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_acquire:
+; RV64IA-TSO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    lhu a0, 0(a0)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  .LBB96_1: # %atomicrmw.start
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    and a3, a0, a1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    slli a4, a0, 48
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    amocas.h a0, a3, (a2)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    srai a4, a4, 48
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    bne a0, a4, .LBB96_1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ret
   %1 = atomicrmw nand ptr %a, i16 %b acquire
   ret i16 %1
 }
@@ -9516,49 +13830,159 @@ define i16 @atomicrmw_nand_i16_release(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_nand_i16_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB97_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w a3, (a2)
-; RV64IA-WMO-NEXT:    and a5, a3, a1
-; RV64IA-WMO-NEXT:    not a5, a5
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a4
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB97_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_nand_i16_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB97_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB97_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_nand_i16_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB97_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    and a5, a3, a1
-; RV64IA-TSO-NEXT:    not a5, a5
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a4
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB97_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_nand_i16_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB97_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB97_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_nand_i16_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB97_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB97_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_nand_i16_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB97_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB97_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_release:
+; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 48
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB97_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w.rl a4, a4, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB97_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_release:
+; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 48
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB97_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB97_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_release:
+; RV64IA-WMO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    lhu a0, 0(a0)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  .LBB97_1: # %atomicrmw.start
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    and a3, a0, a1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    slli a4, a0, 48
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    amocas.h.rl a0, a3, (a2)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    srai a4, a4, 48
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    bne a0, a4, .LBB97_1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_release:
+; RV64IA-TSO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    lhu a0, 0(a0)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  .LBB97_1: # %atomicrmw.start
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    and a3, a0, a1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    slli a4, a0, 48
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    amocas.h a0, a3, (a2)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    srai a4, a4, 48
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    bne a0, a4, .LBB97_1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ret
   %1 = atomicrmw nand ptr %a, i16 %b release
   ret i16 %1
 }
@@ -9628,49 +14052,159 @@ define i16 @atomicrmw_nand_i16_acq_rel(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_nand_i16_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB98_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a3, (a2)
-; RV64IA-WMO-NEXT:    and a5, a3, a1
-; RV64IA-WMO-NEXT:    not a5, a5
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    and a5, a5, a4
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB98_1
-; RV64IA-WMO-NEXT:  # %bb.2:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_nand_i16_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB98_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB98_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_nand_i16_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB98_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    and a5, a3, a1
-; RV64IA-TSO-NEXT:    not a5, a5
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    and a5, a5, a4
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB98_1
-; RV64IA-TSO-NEXT:  # %bb.2:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_nand_i16_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB98_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB98_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_nand_i16_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB98_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB98_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_nand_i16_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB98_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB98_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_acq_rel:
+; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 48
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB98_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w.aq a1, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w.rl a4, a4, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB98_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_acq_rel:
+; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 48
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB98_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB98_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_acq_rel:
+; RV64IA-WMO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    lhu a0, 0(a0)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  .LBB98_1: # %atomicrmw.start
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    and a3, a0, a1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    slli a4, a0, 48
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    amocas.h.aqrl a0, a3, (a2)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    srai a4, a4, 48
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    bne a0, a4, .LBB98_1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_acq_rel:
+; RV64IA-TSO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    lhu a0, 0(a0)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  .LBB98_1: # %atomicrmw.start
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    and a3, a0, a1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    slli a4, a0, 48
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    amocas.h a0, a3, (a2)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    srai a4, a4, 48
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    bne a0, a4, .LBB98_1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ret
   %1 = atomicrmw nand ptr %a, i16 %b acq_rel
   ret i16 %1
 }
@@ -9718,27 +14252,115 @@ define i16 @atomicrmw_nand_i16_seq_cst(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_nand_i16_seq_cst:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    lui a3, 16
-; RV64IA-NEXT:    addi a3, a3, -1
-; RV64IA-NEXT:    sllw a4, a3, a0
-; RV64IA-NEXT:    and a1, a1, a3
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB99_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a3, (a2)
-; RV64IA-NEXT:    and a5, a3, a1
-; RV64IA-NEXT:    not a5, a5
-; RV64IA-NEXT:    xor a5, a3, a5
-; RV64IA-NEXT:    and a5, a5, a4
-; RV64IA-NEXT:    xor a5, a3, a5
-; RV64IA-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB99_1
-; RV64IA-NEXT:  # %bb.2:
-; RV64IA-NEXT:    srlw a0, a3, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_nand_i16_seq_cst:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB99_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w.aqrl a3, (a2)
+; RV64IA-NOZACAS-NEXT:    and a5, a3, a1
+; RV64IA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB99_1
+; RV64IA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_nand_i16_seq_cst:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    lui a3, 16
+; RV64IA-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB99_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a3, (a2)
+; RV64IA-ZACAS-NEXT:    and a5, a3, a1
+; RV64IA-ZACAS-NEXT:    not a5, a5
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB99_1
+; RV64IA-ZACAS-NEXT:  # %bb.2:
+; RV64IA-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_seq_cst:
+; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 48
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB99_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w.aqrl a1, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w.rl a4, a4, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB99_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_seq_cst:
+; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 48
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB99_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w.aqrl a1, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w.rl a4, a4, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB99_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_seq_cst:
+; RV64IA-WMO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    lhu a0, 0(a0)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  .LBB99_1: # %atomicrmw.start
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    and a3, a0, a1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    slli a4, a0, 48
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    amocas.h.aqrl a0, a3, (a2)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    srai a4, a4, 48
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    bne a0, a4, .LBB99_1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_seq_cst:
+; RV64IA-TSO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    lhu a0, 0(a0)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  .LBB99_1: # %atomicrmw.start
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    and a3, a0, a1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    slli a4, a0, 48
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    amocas.h a0, a3, (a2)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    srai a4, a4, 48
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    bne a0, a4, .LBB99_1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ret
   %1 = atomicrmw nand ptr %a, i16 %b seq_cst
   ret i16 %1
 }
@@ -9775,16 +14397,37 @@ define i16 @atomicrmw_or_i16_monotonic(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_or_i16_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    slli a1, a1, 48
-; RV64IA-NEXT:    srli a1, a1, 48
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    amoor.w a1, a1, (a2)
-; RV64IA-NEXT:    srlw a0, a1, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_or_i16_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-NOZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:    amoor.w a1, a1, (a2)
+; RV64IA-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_or_i16_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-ZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    amoor.w a1, a1, (a2)
+; RV64IA-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_or_i16_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoor.h a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_or_i16_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoor.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw or ptr %a, i16 %b monotonic
   ret i16 %1
 }
@@ -9832,27 +14475,59 @@ define i16 @atomicrmw_or_i16_acquire(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_or_i16_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    slli a1, a1, 48
-; RV64IA-WMO-NEXT:    srli a1, a1, 48
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    amoor.w.aq a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_or_i16_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoor.w.aq a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_or_i16_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    slli a1, a1, 48
-; RV64IA-TSO-NEXT:    srli a1, a1, 48
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    amoor.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_or_i16_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoor.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_or_i16_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoor.w.aq a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_or_i16_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoor.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_or_i16_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoor.h.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_or_i16_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoor.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw or ptr %a, i16 %b acquire
   ret i16 %1
 }
@@ -9900,27 +14575,59 @@ define i16 @atomicrmw_or_i16_release(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_or_i16_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    slli a1, a1, 48
-; RV64IA-WMO-NEXT:    srli a1, a1, 48
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    amoor.w.rl a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_or_i16_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoor.w.rl a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_or_i16_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    slli a1, a1, 48
-; RV64IA-TSO-NEXT:    srli a1, a1, 48
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    amoor.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_or_i16_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoor.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_or_i16_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoor.w.rl a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_or_i16_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoor.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_or_i16_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoor.h.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_or_i16_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoor.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw or ptr %a, i16 %b release
   ret i16 %1
 }
@@ -9968,27 +14675,59 @@ define i16 @atomicrmw_or_i16_acq_rel(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_or_i16_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    slli a1, a1, 48
-; RV64IA-WMO-NEXT:    srli a1, a1, 48
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    amoor.w.aqrl a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_or_i16_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoor.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_or_i16_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    slli a1, a1, 48
-; RV64IA-TSO-NEXT:    srli a1, a1, 48
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    amoor.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_or_i16_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoor.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_or_i16_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoor.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_or_i16_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoor.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_or_i16_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoor.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_or_i16_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoor.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw or ptr %a, i16 %b acq_rel
   ret i16 %1
 }
@@ -10036,27 +14775,59 @@ define i16 @atomicrmw_or_i16_seq_cst(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_or_i16_seq_cst:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    slli a1, a1, 48
-; RV64IA-WMO-NEXT:    srli a1, a1, 48
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    amoor.w.aqrl a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_or_i16_seq_cst:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoor.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_or_i16_seq_cst:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    slli a1, a1, 48
-; RV64IA-TSO-NEXT:    srli a1, a1, 48
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    amoor.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_or_i16_seq_cst:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoor.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_or_i16_seq_cst:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoor.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_or_i16_seq_cst:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoor.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_or_i16_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoor.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_or_i16_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoor.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw or ptr %a, i16 %b seq_cst
   ret i16 %1
 }
@@ -10093,16 +14864,37 @@ define i16 @atomicrmw_xor_i16_monotonic(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_xor_i16_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    slli a1, a1, 48
-; RV64IA-NEXT:    srli a1, a1, 48
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    amoxor.w a1, a1, (a2)
-; RV64IA-NEXT:    srlw a0, a1, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_xor_i16_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-NOZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:    amoxor.w a1, a1, (a2)
+; RV64IA-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_xor_i16_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-ZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    amoxor.w a1, a1, (a2)
+; RV64IA-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xor_i16_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoxor.h a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xor_i16_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoxor.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xor ptr %a, i16 %b monotonic
   ret i16 %1
 }
@@ -10150,27 +14942,59 @@ define i16 @atomicrmw_xor_i16_acquire(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xor_i16_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    slli a1, a1, 48
-; RV64IA-WMO-NEXT:    srli a1, a1, 48
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    amoxor.w.aq a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xor_i16_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoxor.w.aq a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xor_i16_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    slli a1, a1, 48
-; RV64IA-TSO-NEXT:    srli a1, a1, 48
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    amoxor.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xor_i16_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoxor.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xor_i16_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoxor.w.aq a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xor_i16_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoxor.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xor_i16_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoxor.h.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xor_i16_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoxor.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xor ptr %a, i16 %b acquire
   ret i16 %1
 }
@@ -10218,27 +15042,59 @@ define i16 @atomicrmw_xor_i16_release(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xor_i16_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    slli a1, a1, 48
-; RV64IA-WMO-NEXT:    srli a1, a1, 48
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    amoxor.w.rl a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xor_i16_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoxor.w.rl a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xor_i16_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    slli a1, a1, 48
-; RV64IA-TSO-NEXT:    srli a1, a1, 48
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    amoxor.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xor_i16_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoxor.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xor_i16_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoxor.w.rl a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xor_i16_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoxor.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xor_i16_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoxor.h.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xor_i16_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoxor.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xor ptr %a, i16 %b release
   ret i16 %1
 }
@@ -10286,27 +15142,59 @@ define i16 @atomicrmw_xor_i16_acq_rel(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xor_i16_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    slli a1, a1, 48
-; RV64IA-WMO-NEXT:    srli a1, a1, 48
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    amoxor.w.aqrl a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xor_i16_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoxor.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xor_i16_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    slli a1, a1, 48
-; RV64IA-TSO-NEXT:    srli a1, a1, 48
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    amoxor.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xor_i16_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoxor.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xor_i16_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoxor.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xor_i16_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoxor.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xor_i16_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoxor.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xor_i16_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoxor.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xor ptr %a, i16 %b acq_rel
   ret i16 %1
 }
@@ -10354,27 +15242,59 @@ define i16 @atomicrmw_xor_i16_seq_cst(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_xor_i16_seq_cst:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    slli a1, a1, 48
-; RV64IA-WMO-NEXT:    srli a1, a1, 48
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    amoxor.w.aqrl a1, a1, (a2)
-; RV64IA-WMO-NEXT:    srlw a0, a1, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_xor_i16_seq_cst:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    amoxor.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_xor_i16_seq_cst:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    slli a1, a1, 48
-; RV64IA-TSO-NEXT:    srli a1, a1, 48
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    amoxor.w a1, a1, (a2)
-; RV64IA-TSO-NEXT:    srlw a0, a1, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_xor_i16_seq_cst:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    amoxor.w a1, a1, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_xor_i16_seq_cst:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    amoxor.w.aqrl a1, a1, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_xor_i16_seq_cst:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    srli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    amoxor.w a1, a1, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_xor_i16_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amoxor.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_xor_i16_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amoxor.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw xor ptr %a, i16 %b seq_cst
   ret i16 %1
 }
@@ -10495,36 +15415,77 @@ define i16 @atomicrmw_max_i16_monotonic(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_max_i16_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    andi a3, a0, 24
-; RV64IA-NEXT:    lui a4, 16
-; RV64IA-NEXT:    addi a4, a4, -1
-; RV64IA-NEXT:    sllw a4, a4, a0
-; RV64IA-NEXT:    slli a1, a1, 48
-; RV64IA-NEXT:    srai a1, a1, 48
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    li a5, 48
-; RV64IA-NEXT:    sub a5, a5, a3
-; RV64IA-NEXT:  .LBB110_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w a3, (a2)
-; RV64IA-NEXT:    and a7, a3, a4
-; RV64IA-NEXT:    mv a6, a3
-; RV64IA-NEXT:    sll a7, a7, a5
-; RV64IA-NEXT:    sra a7, a7, a5
-; RV64IA-NEXT:    bge a7, a1, .LBB110_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB110_1 Depth=1
-; RV64IA-NEXT:    xor a6, a3, a1
-; RV64IA-NEXT:    and a6, a6, a4
-; RV64IA-NEXT:    xor a6, a3, a6
-; RV64IA-NEXT:  .LBB110_3: # in Loop: Header=BB110_1 Depth=1
-; RV64IA-NEXT:    sc.w a6, a6, (a2)
-; RV64IA-NEXT:    bnez a6, .LBB110_1
-; RV64IA-NEXT:  # %bb.4:
-; RV64IA-NEXT:    srlw a0, a3, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_max_i16_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-NOZACAS-NEXT:    lui a4, 16
+; RV64IA-NOZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-NOZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:    li a5, 48
+; RV64IA-NOZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-NOZACAS-NEXT:  .LBB110_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-NOZACAS-NEXT:    and a7, a3, a4
+; RV64IA-NOZACAS-NEXT:    mv a6, a3
+; RV64IA-NOZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-NOZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-NOZACAS-NEXT:    bge a7, a1, .LBB110_3
+; RV64IA-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB110_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-NOZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-NOZACAS-NEXT:  .LBB110_3: # in Loop: Header=BB110_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a6, .LBB110_1
+; RV64IA-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_max_i16_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-ZACAS-NEXT:    lui a4, 16
+; RV64IA-ZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-ZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    li a5, 48
+; RV64IA-ZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-ZACAS-NEXT:  .LBB110_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-ZACAS-NEXT:    and a7, a3, a4
+; RV64IA-ZACAS-NEXT:    mv a6, a3
+; RV64IA-ZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-ZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-ZACAS-NEXT:    bge a7, a1, .LBB110_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB110_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-ZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-ZACAS-NEXT:  .LBB110_3: # in Loop: Header=BB110_1 Depth=1
+; RV64IA-ZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a6, .LBB110_1
+; RV64IA-ZACAS-NEXT:  # %bb.4:
+; RV64IA-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_max_i16_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomax.h a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_max_i16_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomax.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw max ptr %a, i16 %b monotonic
   ret i16 %1
 }
@@ -10676,67 +15637,139 @@ define i16 @atomicrmw_max_i16_acquire(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_max_i16_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    andi a3, a0, 24
-; RV64IA-WMO-NEXT:    lui a4, 16
-; RV64IA-WMO-NEXT:    addi a4, a4, -1
-; RV64IA-WMO-NEXT:    sllw a4, a4, a0
-; RV64IA-WMO-NEXT:    slli a1, a1, 48
-; RV64IA-WMO-NEXT:    srai a1, a1, 48
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    li a5, 48
-; RV64IA-WMO-NEXT:    sub a5, a5, a3
-; RV64IA-WMO-NEXT:  .LBB111_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a3, (a2)
-; RV64IA-WMO-NEXT:    and a7, a3, a4
-; RV64IA-WMO-NEXT:    mv a6, a3
-; RV64IA-WMO-NEXT:    sll a7, a7, a5
-; RV64IA-WMO-NEXT:    sra a7, a7, a5
-; RV64IA-WMO-NEXT:    bge a7, a1, .LBB111_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB111_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a6, a3, a1
-; RV64IA-WMO-NEXT:    and a6, a6, a4
-; RV64IA-WMO-NEXT:    xor a6, a3, a6
-; RV64IA-WMO-NEXT:  .LBB111_3: # in Loop: Header=BB111_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w a6, a6, (a2)
-; RV64IA-WMO-NEXT:    bnez a6, .LBB111_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_max_i16_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-NOZACAS-NEXT:    lui a4, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    li a5, 48
+; RV64IA-WMO-NOZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB111_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a7, a3, a4
+; RV64IA-WMO-NOZACAS-NEXT:    mv a6, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-WMO-NOZACAS-NEXT:    bge a7, a1, .LBB111_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB111_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB111_3: # in Loop: Header=BB111_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a6, .LBB111_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_max_i16_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-NOZACAS-NEXT:    lui a4, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    li a5, 48
+; RV64IA-TSO-NOZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB111_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a7, a3, a4
+; RV64IA-TSO-NOZACAS-NEXT:    mv a6, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-TSO-NOZACAS-NEXT:    bge a7, a1, .LBB111_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB111_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB111_3: # in Loop: Header=BB111_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a6, .LBB111_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_max_i16_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-ZACAS-NEXT:    lui a4, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    li a5, 48
+; RV64IA-WMO-ZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:  .LBB111_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a7, a3, a4
+; RV64IA-WMO-ZACAS-NEXT:    mv a6, a3
+; RV64IA-WMO-ZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-WMO-ZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-WMO-ZACAS-NEXT:    bge a7, a1, .LBB111_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB111_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-WMO-ZACAS-NEXT:  .LBB111_3: # in Loop: Header=BB111_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a6, .LBB111_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_max_i16_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-ZACAS-NEXT:    lui a4, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    li a5, 48
+; RV64IA-TSO-ZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:  .LBB111_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a7, a3, a4
+; RV64IA-TSO-ZACAS-NEXT:    mv a6, a3
+; RV64IA-TSO-ZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-TSO-ZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-TSO-ZACAS-NEXT:    bge a7, a1, .LBB111_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB111_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-TSO-ZACAS-NEXT:  .LBB111_3: # in Loop: Header=BB111_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a6, .LBB111_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_max_i16_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    andi a3, a0, 24
-; RV64IA-TSO-NEXT:    lui a4, 16
-; RV64IA-TSO-NEXT:    addi a4, a4, -1
-; RV64IA-TSO-NEXT:    sllw a4, a4, a0
-; RV64IA-TSO-NEXT:    slli a1, a1, 48
-; RV64IA-TSO-NEXT:    srai a1, a1, 48
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    li a5, 48
-; RV64IA-TSO-NEXT:    sub a5, a5, a3
-; RV64IA-TSO-NEXT:  .LBB111_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    and a7, a3, a4
-; RV64IA-TSO-NEXT:    mv a6, a3
-; RV64IA-TSO-NEXT:    sll a7, a7, a5
-; RV64IA-TSO-NEXT:    sra a7, a7, a5
-; RV64IA-TSO-NEXT:    bge a7, a1, .LBB111_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB111_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a6, a3, a1
-; RV64IA-TSO-NEXT:    and a6, a6, a4
-; RV64IA-TSO-NEXT:    xor a6, a3, a6
-; RV64IA-TSO-NEXT:  .LBB111_3: # in Loop: Header=BB111_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a6, a6, (a2)
-; RV64IA-TSO-NEXT:    bnez a6, .LBB111_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_max_i16_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomax.h.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_max_i16_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomax.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw max ptr %a, i16 %b acquire
   ret i16 %1
 }
@@ -10888,67 +15921,139 @@ define i16 @atomicrmw_max_i16_release(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_max_i16_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    andi a3, a0, 24
-; RV64IA-WMO-NEXT:    lui a4, 16
-; RV64IA-WMO-NEXT:    addi a4, a4, -1
-; RV64IA-WMO-NEXT:    sllw a4, a4, a0
-; RV64IA-WMO-NEXT:    slli a1, a1, 48
-; RV64IA-WMO-NEXT:    srai a1, a1, 48
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    li a5, 48
-; RV64IA-WMO-NEXT:    sub a5, a5, a3
-; RV64IA-WMO-NEXT:  .LBB112_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w a3, (a2)
-; RV64IA-WMO-NEXT:    and a7, a3, a4
-; RV64IA-WMO-NEXT:    mv a6, a3
-; RV64IA-WMO-NEXT:    sll a7, a7, a5
-; RV64IA-WMO-NEXT:    sra a7, a7, a5
-; RV64IA-WMO-NEXT:    bge a7, a1, .LBB112_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB112_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a6, a3, a1
-; RV64IA-WMO-NEXT:    and a6, a6, a4
-; RV64IA-WMO-NEXT:    xor a6, a3, a6
-; RV64IA-WMO-NEXT:  .LBB112_3: # in Loop: Header=BB112_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w.rl a6, a6, (a2)
-; RV64IA-WMO-NEXT:    bnez a6, .LBB112_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_max_i16_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-NOZACAS-NEXT:    lui a4, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    li a5, 48
+; RV64IA-WMO-NOZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB112_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a7, a3, a4
+; RV64IA-WMO-NOZACAS-NEXT:    mv a6, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-WMO-NOZACAS-NEXT:    bge a7, a1, .LBB112_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB112_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB112_3: # in Loop: Header=BB112_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a6, .LBB112_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_max_i16_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    andi a3, a0, 24
-; RV64IA-TSO-NEXT:    lui a4, 16
-; RV64IA-TSO-NEXT:    addi a4, a4, -1
-; RV64IA-TSO-NEXT:    sllw a4, a4, a0
-; RV64IA-TSO-NEXT:    slli a1, a1, 48
-; RV64IA-TSO-NEXT:    srai a1, a1, 48
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    li a5, 48
-; RV64IA-TSO-NEXT:    sub a5, a5, a3
-; RV64IA-TSO-NEXT:  .LBB112_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    and a7, a3, a4
-; RV64IA-TSO-NEXT:    mv a6, a3
-; RV64IA-TSO-NEXT:    sll a7, a7, a5
-; RV64IA-TSO-NEXT:    sra a7, a7, a5
-; RV64IA-TSO-NEXT:    bge a7, a1, .LBB112_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB112_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a6, a3, a1
-; RV64IA-TSO-NEXT:    and a6, a6, a4
-; RV64IA-TSO-NEXT:    xor a6, a3, a6
-; RV64IA-TSO-NEXT:  .LBB112_3: # in Loop: Header=BB112_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a6, a6, (a2)
-; RV64IA-TSO-NEXT:    bnez a6, .LBB112_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_max_i16_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-NOZACAS-NEXT:    lui a4, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    li a5, 48
+; RV64IA-TSO-NOZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB112_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a7, a3, a4
+; RV64IA-TSO-NOZACAS-NEXT:    mv a6, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-TSO-NOZACAS-NEXT:    bge a7, a1, .LBB112_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB112_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB112_3: # in Loop: Header=BB112_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a6, .LBB112_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_max_i16_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-ZACAS-NEXT:    lui a4, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    li a5, 48
+; RV64IA-WMO-ZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:  .LBB112_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a7, a3, a4
+; RV64IA-WMO-ZACAS-NEXT:    mv a6, a3
+; RV64IA-WMO-ZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-WMO-ZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-WMO-ZACAS-NEXT:    bge a7, a1, .LBB112_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB112_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-WMO-ZACAS-NEXT:  .LBB112_3: # in Loop: Header=BB112_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a6, .LBB112_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_max_i16_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-ZACAS-NEXT:    lui a4, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    li a5, 48
+; RV64IA-TSO-ZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:  .LBB112_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a7, a3, a4
+; RV64IA-TSO-ZACAS-NEXT:    mv a6, a3
+; RV64IA-TSO-ZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-TSO-ZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-TSO-ZACAS-NEXT:    bge a7, a1, .LBB112_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB112_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-TSO-ZACAS-NEXT:  .LBB112_3: # in Loop: Header=BB112_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a6, .LBB112_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_max_i16_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomax.h.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_max_i16_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomax.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw max ptr %a, i16 %b release
   ret i16 %1
 }
@@ -11100,67 +16205,139 @@ define i16 @atomicrmw_max_i16_acq_rel(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_max_i16_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    andi a3, a0, 24
-; RV64IA-WMO-NEXT:    lui a4, 16
-; RV64IA-WMO-NEXT:    addi a4, a4, -1
-; RV64IA-WMO-NEXT:    sllw a4, a4, a0
-; RV64IA-WMO-NEXT:    slli a1, a1, 48
-; RV64IA-WMO-NEXT:    srai a1, a1, 48
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    li a5, 48
-; RV64IA-WMO-NEXT:    sub a5, a5, a3
-; RV64IA-WMO-NEXT:  .LBB113_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a3, (a2)
-; RV64IA-WMO-NEXT:    and a7, a3, a4
-; RV64IA-WMO-NEXT:    mv a6, a3
-; RV64IA-WMO-NEXT:    sll a7, a7, a5
-; RV64IA-WMO-NEXT:    sra a7, a7, a5
-; RV64IA-WMO-NEXT:    bge a7, a1, .LBB113_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB113_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a6, a3, a1
-; RV64IA-WMO-NEXT:    and a6, a6, a4
-; RV64IA-WMO-NEXT:    xor a6, a3, a6
-; RV64IA-WMO-NEXT:  .LBB113_3: # in Loop: Header=BB113_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w.rl a6, a6, (a2)
-; RV64IA-WMO-NEXT:    bnez a6, .LBB113_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_max_i16_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-NOZACAS-NEXT:    lui a4, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    li a5, 48
+; RV64IA-WMO-NOZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB113_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a7, a3, a4
+; RV64IA-WMO-NOZACAS-NEXT:    mv a6, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-WMO-NOZACAS-NEXT:    bge a7, a1, .LBB113_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB113_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB113_3: # in Loop: Header=BB113_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a6, .LBB113_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_max_i16_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    andi a3, a0, 24
-; RV64IA-TSO-NEXT:    lui a4, 16
-; RV64IA-TSO-NEXT:    addi a4, a4, -1
-; RV64IA-TSO-NEXT:    sllw a4, a4, a0
-; RV64IA-TSO-NEXT:    slli a1, a1, 48
-; RV64IA-TSO-NEXT:    srai a1, a1, 48
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    li a5, 48
-; RV64IA-TSO-NEXT:    sub a5, a5, a3
-; RV64IA-TSO-NEXT:  .LBB113_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    and a7, a3, a4
-; RV64IA-TSO-NEXT:    mv a6, a3
-; RV64IA-TSO-NEXT:    sll a7, a7, a5
-; RV64IA-TSO-NEXT:    sra a7, a7, a5
-; RV64IA-TSO-NEXT:    bge a7, a1, .LBB113_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB113_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a6, a3, a1
-; RV64IA-TSO-NEXT:    and a6, a6, a4
-; RV64IA-TSO-NEXT:    xor a6, a3, a6
-; RV64IA-TSO-NEXT:  .LBB113_3: # in Loop: Header=BB113_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a6, a6, (a2)
-; RV64IA-TSO-NEXT:    bnez a6, .LBB113_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_max_i16_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-NOZACAS-NEXT:    lui a4, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    li a5, 48
+; RV64IA-TSO-NOZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB113_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a7, a3, a4
+; RV64IA-TSO-NOZACAS-NEXT:    mv a6, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-TSO-NOZACAS-NEXT:    bge a7, a1, .LBB113_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB113_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB113_3: # in Loop: Header=BB113_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a6, .LBB113_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_max_i16_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-ZACAS-NEXT:    lui a4, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    li a5, 48
+; RV64IA-WMO-ZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:  .LBB113_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a7, a3, a4
+; RV64IA-WMO-ZACAS-NEXT:    mv a6, a3
+; RV64IA-WMO-ZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-WMO-ZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-WMO-ZACAS-NEXT:    bge a7, a1, .LBB113_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB113_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-WMO-ZACAS-NEXT:  .LBB113_3: # in Loop: Header=BB113_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a6, .LBB113_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_max_i16_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-ZACAS-NEXT:    lui a4, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    li a5, 48
+; RV64IA-TSO-ZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:  .LBB113_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a7, a3, a4
+; RV64IA-TSO-ZACAS-NEXT:    mv a6, a3
+; RV64IA-TSO-ZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-TSO-ZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-TSO-ZACAS-NEXT:    bge a7, a1, .LBB113_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB113_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-TSO-ZACAS-NEXT:  .LBB113_3: # in Loop: Header=BB113_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a6, .LBB113_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_max_i16_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomax.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_max_i16_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomax.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw max ptr %a, i16 %b acq_rel
   ret i16 %1
 }
@@ -11281,36 +16458,77 @@ define i16 @atomicrmw_max_i16_seq_cst(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_max_i16_seq_cst:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    andi a3, a0, 24
-; RV64IA-NEXT:    lui a4, 16
-; RV64IA-NEXT:    addi a4, a4, -1
-; RV64IA-NEXT:    sllw a4, a4, a0
-; RV64IA-NEXT:    slli a1, a1, 48
-; RV64IA-NEXT:    srai a1, a1, 48
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    li a5, 48
-; RV64IA-NEXT:    sub a5, a5, a3
-; RV64IA-NEXT:  .LBB114_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a3, (a2)
-; RV64IA-NEXT:    and a7, a3, a4
-; RV64IA-NEXT:    mv a6, a3
-; RV64IA-NEXT:    sll a7, a7, a5
-; RV64IA-NEXT:    sra a7, a7, a5
-; RV64IA-NEXT:    bge a7, a1, .LBB114_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB114_1 Depth=1
-; RV64IA-NEXT:    xor a6, a3, a1
-; RV64IA-NEXT:    and a6, a6, a4
-; RV64IA-NEXT:    xor a6, a3, a6
-; RV64IA-NEXT:  .LBB114_3: # in Loop: Header=BB114_1 Depth=1
-; RV64IA-NEXT:    sc.w.rl a6, a6, (a2)
-; RV64IA-NEXT:    bnez a6, .LBB114_1
-; RV64IA-NEXT:  # %bb.4:
-; RV64IA-NEXT:    srlw a0, a3, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_max_i16_seq_cst:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-NOZACAS-NEXT:    lui a4, 16
+; RV64IA-NOZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-NOZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:    li a5, 48
+; RV64IA-NOZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-NOZACAS-NEXT:  .LBB114_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w.aqrl a3, (a2)
+; RV64IA-NOZACAS-NEXT:    and a7, a3, a4
+; RV64IA-NOZACAS-NEXT:    mv a6, a3
+; RV64IA-NOZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-NOZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-NOZACAS-NEXT:    bge a7, a1, .LBB114_3
+; RV64IA-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB114_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-NOZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-NOZACAS-NEXT:  .LBB114_3: # in Loop: Header=BB114_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a6, .LBB114_1
+; RV64IA-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_max_i16_seq_cst:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-ZACAS-NEXT:    lui a4, 16
+; RV64IA-ZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-ZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    li a5, 48
+; RV64IA-ZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-ZACAS-NEXT:  .LBB114_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a3, (a2)
+; RV64IA-ZACAS-NEXT:    and a7, a3, a4
+; RV64IA-ZACAS-NEXT:    mv a6, a3
+; RV64IA-ZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-ZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-ZACAS-NEXT:    bge a7, a1, .LBB114_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB114_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-ZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-ZACAS-NEXT:  .LBB114_3: # in Loop: Header=BB114_1 Depth=1
+; RV64IA-ZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a6, .LBB114_1
+; RV64IA-ZACAS-NEXT:  # %bb.4:
+; RV64IA-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_max_i16_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomax.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_max_i16_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomax.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw max ptr %a, i16 %b seq_cst
   ret i16 %1
 }
@@ -11431,36 +16649,77 @@ define i16 @atomicrmw_min_i16_monotonic(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_min_i16_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    andi a3, a0, 24
-; RV64IA-NEXT:    lui a4, 16
-; RV64IA-NEXT:    addi a4, a4, -1
-; RV64IA-NEXT:    sllw a4, a4, a0
-; RV64IA-NEXT:    slli a1, a1, 48
-; RV64IA-NEXT:    srai a1, a1, 48
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    li a5, 48
-; RV64IA-NEXT:    sub a5, a5, a3
-; RV64IA-NEXT:  .LBB115_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w a3, (a2)
-; RV64IA-NEXT:    and a7, a3, a4
-; RV64IA-NEXT:    mv a6, a3
-; RV64IA-NEXT:    sll a7, a7, a5
-; RV64IA-NEXT:    sra a7, a7, a5
-; RV64IA-NEXT:    bge a1, a7, .LBB115_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB115_1 Depth=1
-; RV64IA-NEXT:    xor a6, a3, a1
-; RV64IA-NEXT:    and a6, a6, a4
-; RV64IA-NEXT:    xor a6, a3, a6
-; RV64IA-NEXT:  .LBB115_3: # in Loop: Header=BB115_1 Depth=1
-; RV64IA-NEXT:    sc.w a6, a6, (a2)
-; RV64IA-NEXT:    bnez a6, .LBB115_1
-; RV64IA-NEXT:  # %bb.4:
-; RV64IA-NEXT:    srlw a0, a3, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_min_i16_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-NOZACAS-NEXT:    lui a4, 16
+; RV64IA-NOZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-NOZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:    li a5, 48
+; RV64IA-NOZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-NOZACAS-NEXT:  .LBB115_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-NOZACAS-NEXT:    and a7, a3, a4
+; RV64IA-NOZACAS-NEXT:    mv a6, a3
+; RV64IA-NOZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-NOZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-NOZACAS-NEXT:    bge a1, a7, .LBB115_3
+; RV64IA-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB115_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-NOZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-NOZACAS-NEXT:  .LBB115_3: # in Loop: Header=BB115_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a6, .LBB115_1
+; RV64IA-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_min_i16_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-ZACAS-NEXT:    lui a4, 16
+; RV64IA-ZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-ZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    li a5, 48
+; RV64IA-ZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-ZACAS-NEXT:  .LBB115_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-ZACAS-NEXT:    and a7, a3, a4
+; RV64IA-ZACAS-NEXT:    mv a6, a3
+; RV64IA-ZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-ZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-ZACAS-NEXT:    bge a1, a7, .LBB115_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB115_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-ZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-ZACAS-NEXT:  .LBB115_3: # in Loop: Header=BB115_1 Depth=1
+; RV64IA-ZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a6, .LBB115_1
+; RV64IA-ZACAS-NEXT:  # %bb.4:
+; RV64IA-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_min_i16_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomin.h a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_min_i16_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomin.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw min ptr %a, i16 %b monotonic
   ret i16 %1
 }
@@ -11612,67 +16871,139 @@ define i16 @atomicrmw_min_i16_acquire(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_min_i16_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    andi a3, a0, 24
-; RV64IA-WMO-NEXT:    lui a4, 16
-; RV64IA-WMO-NEXT:    addi a4, a4, -1
-; RV64IA-WMO-NEXT:    sllw a4, a4, a0
-; RV64IA-WMO-NEXT:    slli a1, a1, 48
-; RV64IA-WMO-NEXT:    srai a1, a1, 48
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    li a5, 48
-; RV64IA-WMO-NEXT:    sub a5, a5, a3
-; RV64IA-WMO-NEXT:  .LBB116_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a3, (a2)
-; RV64IA-WMO-NEXT:    and a7, a3, a4
-; RV64IA-WMO-NEXT:    mv a6, a3
-; RV64IA-WMO-NEXT:    sll a7, a7, a5
-; RV64IA-WMO-NEXT:    sra a7, a7, a5
-; RV64IA-WMO-NEXT:    bge a1, a7, .LBB116_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB116_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a6, a3, a1
-; RV64IA-WMO-NEXT:    and a6, a6, a4
-; RV64IA-WMO-NEXT:    xor a6, a3, a6
-; RV64IA-WMO-NEXT:  .LBB116_3: # in Loop: Header=BB116_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w a6, a6, (a2)
-; RV64IA-WMO-NEXT:    bnez a6, .LBB116_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_min_i16_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-NOZACAS-NEXT:    lui a4, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    li a5, 48
+; RV64IA-WMO-NOZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB116_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a7, a3, a4
+; RV64IA-WMO-NOZACAS-NEXT:    mv a6, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-WMO-NOZACAS-NEXT:    bge a1, a7, .LBB116_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB116_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB116_3: # in Loop: Header=BB116_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a6, .LBB116_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_min_i16_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    andi a3, a0, 24
-; RV64IA-TSO-NEXT:    lui a4, 16
-; RV64IA-TSO-NEXT:    addi a4, a4, -1
-; RV64IA-TSO-NEXT:    sllw a4, a4, a0
-; RV64IA-TSO-NEXT:    slli a1, a1, 48
-; RV64IA-TSO-NEXT:    srai a1, a1, 48
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    li a5, 48
-; RV64IA-TSO-NEXT:    sub a5, a5, a3
-; RV64IA-TSO-NEXT:  .LBB116_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    and a7, a3, a4
-; RV64IA-TSO-NEXT:    mv a6, a3
-; RV64IA-TSO-NEXT:    sll a7, a7, a5
-; RV64IA-TSO-NEXT:    sra a7, a7, a5
-; RV64IA-TSO-NEXT:    bge a1, a7, .LBB116_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB116_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a6, a3, a1
-; RV64IA-TSO-NEXT:    and a6, a6, a4
-; RV64IA-TSO-NEXT:    xor a6, a3, a6
-; RV64IA-TSO-NEXT:  .LBB116_3: # in Loop: Header=BB116_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a6, a6, (a2)
-; RV64IA-TSO-NEXT:    bnez a6, .LBB116_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_min_i16_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-NOZACAS-NEXT:    lui a4, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    li a5, 48
+; RV64IA-TSO-NOZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB116_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a7, a3, a4
+; RV64IA-TSO-NOZACAS-NEXT:    mv a6, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-TSO-NOZACAS-NEXT:    bge a1, a7, .LBB116_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB116_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB116_3: # in Loop: Header=BB116_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a6, .LBB116_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_min_i16_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-ZACAS-NEXT:    lui a4, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    li a5, 48
+; RV64IA-WMO-ZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:  .LBB116_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a7, a3, a4
+; RV64IA-WMO-ZACAS-NEXT:    mv a6, a3
+; RV64IA-WMO-ZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-WMO-ZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-WMO-ZACAS-NEXT:    bge a1, a7, .LBB116_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB116_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-WMO-ZACAS-NEXT:  .LBB116_3: # in Loop: Header=BB116_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a6, .LBB116_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_min_i16_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-ZACAS-NEXT:    lui a4, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    li a5, 48
+; RV64IA-TSO-ZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:  .LBB116_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a7, a3, a4
+; RV64IA-TSO-ZACAS-NEXT:    mv a6, a3
+; RV64IA-TSO-ZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-TSO-ZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-TSO-ZACAS-NEXT:    bge a1, a7, .LBB116_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB116_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-TSO-ZACAS-NEXT:  .LBB116_3: # in Loop: Header=BB116_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a6, .LBB116_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_min_i16_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomin.h.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_min_i16_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomin.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw min ptr %a, i16 %b acquire
   ret i16 %1
 }
@@ -11824,67 +17155,139 @@ define i16 @atomicrmw_min_i16_release(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_min_i16_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    andi a3, a0, 24
-; RV64IA-WMO-NEXT:    lui a4, 16
-; RV64IA-WMO-NEXT:    addi a4, a4, -1
-; RV64IA-WMO-NEXT:    sllw a4, a4, a0
-; RV64IA-WMO-NEXT:    slli a1, a1, 48
-; RV64IA-WMO-NEXT:    srai a1, a1, 48
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    li a5, 48
-; RV64IA-WMO-NEXT:    sub a5, a5, a3
-; RV64IA-WMO-NEXT:  .LBB117_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w a3, (a2)
-; RV64IA-WMO-NEXT:    and a7, a3, a4
-; RV64IA-WMO-NEXT:    mv a6, a3
-; RV64IA-WMO-NEXT:    sll a7, a7, a5
-; RV64IA-WMO-NEXT:    sra a7, a7, a5
-; RV64IA-WMO-NEXT:    bge a1, a7, .LBB117_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB117_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a6, a3, a1
-; RV64IA-WMO-NEXT:    and a6, a6, a4
-; RV64IA-WMO-NEXT:    xor a6, a3, a6
-; RV64IA-WMO-NEXT:  .LBB117_3: # in Loop: Header=BB117_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w.rl a6, a6, (a2)
-; RV64IA-WMO-NEXT:    bnez a6, .LBB117_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_min_i16_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-NOZACAS-NEXT:    lui a4, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    li a5, 48
+; RV64IA-WMO-NOZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB117_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a7, a3, a4
+; RV64IA-WMO-NOZACAS-NEXT:    mv a6, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-WMO-NOZACAS-NEXT:    bge a1, a7, .LBB117_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB117_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB117_3: # in Loop: Header=BB117_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a6, .LBB117_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_min_i16_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    andi a3, a0, 24
-; RV64IA-TSO-NEXT:    lui a4, 16
-; RV64IA-TSO-NEXT:    addi a4, a4, -1
-; RV64IA-TSO-NEXT:    sllw a4, a4, a0
-; RV64IA-TSO-NEXT:    slli a1, a1, 48
-; RV64IA-TSO-NEXT:    srai a1, a1, 48
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    li a5, 48
-; RV64IA-TSO-NEXT:    sub a5, a5, a3
-; RV64IA-TSO-NEXT:  .LBB117_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    and a7, a3, a4
-; RV64IA-TSO-NEXT:    mv a6, a3
-; RV64IA-TSO-NEXT:    sll a7, a7, a5
-; RV64IA-TSO-NEXT:    sra a7, a7, a5
-; RV64IA-TSO-NEXT:    bge a1, a7, .LBB117_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB117_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a6, a3, a1
-; RV64IA-TSO-NEXT:    and a6, a6, a4
-; RV64IA-TSO-NEXT:    xor a6, a3, a6
-; RV64IA-TSO-NEXT:  .LBB117_3: # in Loop: Header=BB117_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a6, a6, (a2)
-; RV64IA-TSO-NEXT:    bnez a6, .LBB117_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_min_i16_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-NOZACAS-NEXT:    lui a4, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    li a5, 48
+; RV64IA-TSO-NOZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB117_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a7, a3, a4
+; RV64IA-TSO-NOZACAS-NEXT:    mv a6, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-TSO-NOZACAS-NEXT:    bge a1, a7, .LBB117_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB117_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB117_3: # in Loop: Header=BB117_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a6, .LBB117_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_min_i16_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-ZACAS-NEXT:    lui a4, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    li a5, 48
+; RV64IA-WMO-ZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:  .LBB117_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a7, a3, a4
+; RV64IA-WMO-ZACAS-NEXT:    mv a6, a3
+; RV64IA-WMO-ZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-WMO-ZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-WMO-ZACAS-NEXT:    bge a1, a7, .LBB117_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB117_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-WMO-ZACAS-NEXT:  .LBB117_3: # in Loop: Header=BB117_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a6, .LBB117_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_min_i16_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-ZACAS-NEXT:    lui a4, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    li a5, 48
+; RV64IA-TSO-ZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:  .LBB117_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a7, a3, a4
+; RV64IA-TSO-ZACAS-NEXT:    mv a6, a3
+; RV64IA-TSO-ZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-TSO-ZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-TSO-ZACAS-NEXT:    bge a1, a7, .LBB117_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB117_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-TSO-ZACAS-NEXT:  .LBB117_3: # in Loop: Header=BB117_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a6, .LBB117_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_min_i16_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomin.h.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_min_i16_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomin.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw min ptr %a, i16 %b release
   ret i16 %1
 }
@@ -12036,67 +17439,139 @@ define i16 @atomicrmw_min_i16_acq_rel(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_min_i16_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    andi a3, a0, 24
-; RV64IA-WMO-NEXT:    lui a4, 16
-; RV64IA-WMO-NEXT:    addi a4, a4, -1
-; RV64IA-WMO-NEXT:    sllw a4, a4, a0
-; RV64IA-WMO-NEXT:    slli a1, a1, 48
-; RV64IA-WMO-NEXT:    srai a1, a1, 48
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:    li a5, 48
-; RV64IA-WMO-NEXT:    sub a5, a5, a3
-; RV64IA-WMO-NEXT:  .LBB118_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a3, (a2)
-; RV64IA-WMO-NEXT:    and a7, a3, a4
-; RV64IA-WMO-NEXT:    mv a6, a3
-; RV64IA-WMO-NEXT:    sll a7, a7, a5
-; RV64IA-WMO-NEXT:    sra a7, a7, a5
-; RV64IA-WMO-NEXT:    bge a1, a7, .LBB118_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB118_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a6, a3, a1
-; RV64IA-WMO-NEXT:    and a6, a6, a4
-; RV64IA-WMO-NEXT:    xor a6, a3, a6
-; RV64IA-WMO-NEXT:  .LBB118_3: # in Loop: Header=BB118_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w.rl a6, a6, (a2)
-; RV64IA-WMO-NEXT:    bnez a6, .LBB118_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_min_i16_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-NOZACAS-NEXT:    lui a4, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:    li a5, 48
+; RV64IA-WMO-NOZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB118_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a7, a3, a4
+; RV64IA-WMO-NOZACAS-NEXT:    mv a6, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-WMO-NOZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-WMO-NOZACAS-NEXT:    bge a1, a7, .LBB118_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB118_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB118_3: # in Loop: Header=BB118_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a6, .LBB118_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_min_i16_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    andi a3, a0, 24
-; RV64IA-TSO-NEXT:    lui a4, 16
-; RV64IA-TSO-NEXT:    addi a4, a4, -1
-; RV64IA-TSO-NEXT:    sllw a4, a4, a0
-; RV64IA-TSO-NEXT:    slli a1, a1, 48
-; RV64IA-TSO-NEXT:    srai a1, a1, 48
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:    li a5, 48
-; RV64IA-TSO-NEXT:    sub a5, a5, a3
-; RV64IA-TSO-NEXT:  .LBB118_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    and a7, a3, a4
-; RV64IA-TSO-NEXT:    mv a6, a3
-; RV64IA-TSO-NEXT:    sll a7, a7, a5
-; RV64IA-TSO-NEXT:    sra a7, a7, a5
-; RV64IA-TSO-NEXT:    bge a1, a7, .LBB118_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB118_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a6, a3, a1
-; RV64IA-TSO-NEXT:    and a6, a6, a4
-; RV64IA-TSO-NEXT:    xor a6, a3, a6
-; RV64IA-TSO-NEXT:  .LBB118_3: # in Loop: Header=BB118_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a6, a6, (a2)
-; RV64IA-TSO-NEXT:    bnez a6, .LBB118_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_min_i16_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-NOZACAS-NEXT:    lui a4, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:    li a5, 48
+; RV64IA-TSO-NOZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB118_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a7, a3, a4
+; RV64IA-TSO-NOZACAS-NEXT:    mv a6, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-TSO-NOZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-TSO-NOZACAS-NEXT:    bge a1, a7, .LBB118_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB118_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB118_3: # in Loop: Header=BB118_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a6, .LBB118_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_min_i16_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-WMO-ZACAS-NEXT:    lui a4, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-WMO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:    li a5, 48
+; RV64IA-WMO-ZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-WMO-ZACAS-NEXT:  .LBB118_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a7, a3, a4
+; RV64IA-WMO-ZACAS-NEXT:    mv a6, a3
+; RV64IA-WMO-ZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-WMO-ZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-WMO-ZACAS-NEXT:    bge a1, a7, .LBB118_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB118_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-WMO-ZACAS-NEXT:  .LBB118_3: # in Loop: Header=BB118_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a6, .LBB118_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_min_i16_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-TSO-ZACAS-NEXT:    lui a4, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-TSO-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:    li a5, 48
+; RV64IA-TSO-ZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-TSO-ZACAS-NEXT:  .LBB118_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a7, a3, a4
+; RV64IA-TSO-ZACAS-NEXT:    mv a6, a3
+; RV64IA-TSO-ZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-TSO-ZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-TSO-ZACAS-NEXT:    bge a1, a7, .LBB118_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB118_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-TSO-ZACAS-NEXT:  .LBB118_3: # in Loop: Header=BB118_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a6, a6, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a6, .LBB118_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_min_i16_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomin.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_min_i16_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomin.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw min ptr %a, i16 %b acq_rel
   ret i16 %1
 }
@@ -12217,36 +17692,77 @@ define i16 @atomicrmw_min_i16_seq_cst(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_min_i16_seq_cst:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    andi a3, a0, 24
-; RV64IA-NEXT:    lui a4, 16
-; RV64IA-NEXT:    addi a4, a4, -1
-; RV64IA-NEXT:    sllw a4, a4, a0
-; RV64IA-NEXT:    slli a1, a1, 48
-; RV64IA-NEXT:    srai a1, a1, 48
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:    li a5, 48
-; RV64IA-NEXT:    sub a5, a5, a3
-; RV64IA-NEXT:  .LBB119_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a3, (a2)
-; RV64IA-NEXT:    and a7, a3, a4
-; RV64IA-NEXT:    mv a6, a3
-; RV64IA-NEXT:    sll a7, a7, a5
-; RV64IA-NEXT:    sra a7, a7, a5
-; RV64IA-NEXT:    bge a1, a7, .LBB119_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB119_1 Depth=1
-; RV64IA-NEXT:    xor a6, a3, a1
-; RV64IA-NEXT:    and a6, a6, a4
-; RV64IA-NEXT:    xor a6, a3, a6
-; RV64IA-NEXT:  .LBB119_3: # in Loop: Header=BB119_1 Depth=1
-; RV64IA-NEXT:    sc.w.rl a6, a6, (a2)
-; RV64IA-NEXT:    bnez a6, .LBB119_1
-; RV64IA-NEXT:  # %bb.4:
-; RV64IA-NEXT:    srlw a0, a3, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_min_i16_seq_cst:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-NOZACAS-NEXT:    lui a4, 16
+; RV64IA-NOZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-NOZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-NOZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-NOZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:    li a5, 48
+; RV64IA-NOZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-NOZACAS-NEXT:  .LBB119_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w.aqrl a3, (a2)
+; RV64IA-NOZACAS-NEXT:    and a7, a3, a4
+; RV64IA-NOZACAS-NEXT:    mv a6, a3
+; RV64IA-NOZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-NOZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-NOZACAS-NEXT:    bge a1, a7, .LBB119_3
+; RV64IA-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB119_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-NOZACAS-NEXT:    and a6, a6, a4
+; RV64IA-NOZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-NOZACAS-NEXT:  .LBB119_3: # in Loop: Header=BB119_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a6, .LBB119_1
+; RV64IA-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_min_i16_seq_cst:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    andi a3, a0, 24
+; RV64IA-ZACAS-NEXT:    lui a4, 16
+; RV64IA-ZACAS-NEXT:    addi a4, a4, -1
+; RV64IA-ZACAS-NEXT:    sllw a4, a4, a0
+; RV64IA-ZACAS-NEXT:    slli a1, a1, 48
+; RV64IA-ZACAS-NEXT:    srai a1, a1, 48
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:    li a5, 48
+; RV64IA-ZACAS-NEXT:    sub a5, a5, a3
+; RV64IA-ZACAS-NEXT:  .LBB119_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a3, (a2)
+; RV64IA-ZACAS-NEXT:    and a7, a3, a4
+; RV64IA-ZACAS-NEXT:    mv a6, a3
+; RV64IA-ZACAS-NEXT:    sll a7, a7, a5
+; RV64IA-ZACAS-NEXT:    sra a7, a7, a5
+; RV64IA-ZACAS-NEXT:    bge a1, a7, .LBB119_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB119_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a6, a3, a1
+; RV64IA-ZACAS-NEXT:    and a6, a6, a4
+; RV64IA-ZACAS-NEXT:    xor a6, a3, a6
+; RV64IA-ZACAS-NEXT:  .LBB119_3: # in Loop: Header=BB119_1 Depth=1
+; RV64IA-ZACAS-NEXT:    sc.w.rl a6, a6, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a6, .LBB119_1
+; RV64IA-ZACAS-NEXT:  # %bb.4:
+; RV64IA-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_min_i16_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomin.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_min_i16_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomin.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw min ptr %a, i16 %b seq_cst
   ret i16 %1
 }
@@ -12365,30 +17881,65 @@ define i16 @atomicrmw_umax_i16_monotonic(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_umax_i16_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    lui a3, 16
-; RV64IA-NEXT:    addi a3, a3, -1
-; RV64IA-NEXT:    sllw a4, a3, a0
-; RV64IA-NEXT:    and a1, a1, a3
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB120_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w a3, (a2)
-; RV64IA-NEXT:    and a6, a3, a4
-; RV64IA-NEXT:    mv a5, a3
-; RV64IA-NEXT:    bgeu a6, a1, .LBB120_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB120_1 Depth=1
-; RV64IA-NEXT:    xor a5, a3, a1
-; RV64IA-NEXT:    and a5, a5, a4
-; RV64IA-NEXT:    xor a5, a3, a5
-; RV64IA-NEXT:  .LBB120_3: # in Loop: Header=BB120_1 Depth=1
-; RV64IA-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB120_1
-; RV64IA-NEXT:  # %bb.4:
-; RV64IA-NEXT:    srlw a0, a3, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_umax_i16_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB120_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-NOZACAS-NEXT:    and a6, a3, a4
+; RV64IA-NOZACAS-NEXT:    mv a5, a3
+; RV64IA-NOZACAS-NEXT:    bgeu a6, a1, .LBB120_3
+; RV64IA-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB120_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-NOZACAS-NEXT:  .LBB120_3: # in Loop: Header=BB120_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB120_1
+; RV64IA-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_umax_i16_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    lui a3, 16
+; RV64IA-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB120_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-ZACAS-NEXT:    and a6, a3, a4
+; RV64IA-ZACAS-NEXT:    mv a5, a3
+; RV64IA-ZACAS-NEXT:    bgeu a6, a1, .LBB120_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB120_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-ZACAS-NEXT:  .LBB120_3: # in Loop: Header=BB120_1 Depth=1
+; RV64IA-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB120_1
+; RV64IA-ZACAS-NEXT:  # %bb.4:
+; RV64IA-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umax_i16_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomaxu.h a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_umax_i16_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomaxu.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw umax ptr %a, i16 %b monotonic
   ret i16 %1
 }
@@ -12532,55 +18083,115 @@ define i16 @atomicrmw_umax_i16_acquire(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_umax_i16_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB121_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a3, (a2)
-; RV64IA-WMO-NEXT:    and a6, a3, a4
-; RV64IA-WMO-NEXT:    mv a5, a3
-; RV64IA-WMO-NEXT:    bgeu a6, a1, .LBB121_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB121_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a5, a3, a1
-; RV64IA-WMO-NEXT:    and a5, a5, a4
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:  .LBB121_3: # in Loop: Header=BB121_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB121_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_umax_i16_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB121_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a3, a4
+; RV64IA-WMO-NOZACAS-NEXT:    mv a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    bgeu a6, a1, .LBB121_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB121_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB121_3: # in Loop: Header=BB121_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB121_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_umax_i16_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB121_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    and a6, a3, a4
-; RV64IA-TSO-NEXT:    mv a5, a3
-; RV64IA-TSO-NEXT:    bgeu a6, a1, .LBB121_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB121_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a5, a3, a1
-; RV64IA-TSO-NEXT:    and a5, a5, a4
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:  .LBB121_3: # in Loop: Header=BB121_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB121_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_umax_i16_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB121_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a3, a4
+; RV64IA-TSO-NOZACAS-NEXT:    mv a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    bgeu a6, a1, .LBB121_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB121_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB121_3: # in Loop: Header=BB121_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB121_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umax_i16_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB121_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a3, a4
+; RV64IA-WMO-ZACAS-NEXT:    mv a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    bgeu a6, a1, .LBB121_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB121_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:  .LBB121_3: # in Loop: Header=BB121_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB121_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_umax_i16_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB121_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a3, a4
+; RV64IA-TSO-ZACAS-NEXT:    mv a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    bgeu a6, a1, .LBB121_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB121_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:  .LBB121_3: # in Loop: Header=BB121_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB121_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umax_i16_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomaxu.h.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_umax_i16_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomaxu.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw umax ptr %a, i16 %b acquire
   ret i16 %1
 }
@@ -12724,55 +18335,115 @@ define i16 @atomicrmw_umax_i16_release(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_umax_i16_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB122_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w a3, (a2)
-; RV64IA-WMO-NEXT:    and a6, a3, a4
-; RV64IA-WMO-NEXT:    mv a5, a3
-; RV64IA-WMO-NEXT:    bgeu a6, a1, .LBB122_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB122_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a5, a3, a1
-; RV64IA-WMO-NEXT:    and a5, a5, a4
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:  .LBB122_3: # in Loop: Header=BB122_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB122_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_umax_i16_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB122_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a3, a4
+; RV64IA-WMO-NOZACAS-NEXT:    mv a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    bgeu a6, a1, .LBB122_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB122_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB122_3: # in Loop: Header=BB122_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB122_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_umax_i16_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB122_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    and a6, a3, a4
-; RV64IA-TSO-NEXT:    mv a5, a3
-; RV64IA-TSO-NEXT:    bgeu a6, a1, .LBB122_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB122_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a5, a3, a1
-; RV64IA-TSO-NEXT:    and a5, a5, a4
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:  .LBB122_3: # in Loop: Header=BB122_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB122_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_umax_i16_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB122_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a3, a4
+; RV64IA-TSO-NOZACAS-NEXT:    mv a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    bgeu a6, a1, .LBB122_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB122_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB122_3: # in Loop: Header=BB122_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB122_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umax_i16_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB122_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a3, a4
+; RV64IA-WMO-ZACAS-NEXT:    mv a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    bgeu a6, a1, .LBB122_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB122_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:  .LBB122_3: # in Loop: Header=BB122_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB122_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_umax_i16_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB122_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a3, a4
+; RV64IA-TSO-ZACAS-NEXT:    mv a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    bgeu a6, a1, .LBB122_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB122_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:  .LBB122_3: # in Loop: Header=BB122_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB122_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umax_i16_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomaxu.h.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_umax_i16_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomaxu.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw umax ptr %a, i16 %b release
   ret i16 %1
 }
@@ -12916,55 +18587,115 @@ define i16 @atomicrmw_umax_i16_acq_rel(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_umax_i16_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB123_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a3, (a2)
-; RV64IA-WMO-NEXT:    and a6, a3, a4
-; RV64IA-WMO-NEXT:    mv a5, a3
-; RV64IA-WMO-NEXT:    bgeu a6, a1, .LBB123_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB123_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a5, a3, a1
-; RV64IA-WMO-NEXT:    and a5, a5, a4
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:  .LBB123_3: # in Loop: Header=BB123_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB123_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_umax_i16_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB123_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a3, a4
+; RV64IA-WMO-NOZACAS-NEXT:    mv a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    bgeu a6, a1, .LBB123_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB123_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB123_3: # in Loop: Header=BB123_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB123_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_umax_i16_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB123_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    and a6, a3, a4
-; RV64IA-TSO-NEXT:    mv a5, a3
-; RV64IA-TSO-NEXT:    bgeu a6, a1, .LBB123_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB123_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a5, a3, a1
-; RV64IA-TSO-NEXT:    and a5, a5, a4
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:  .LBB123_3: # in Loop: Header=BB123_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB123_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_umax_i16_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB123_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a3, a4
+; RV64IA-TSO-NOZACAS-NEXT:    mv a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    bgeu a6, a1, .LBB123_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB123_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB123_3: # in Loop: Header=BB123_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB123_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umax_i16_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB123_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a3, a4
+; RV64IA-WMO-ZACAS-NEXT:    mv a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    bgeu a6, a1, .LBB123_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB123_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:  .LBB123_3: # in Loop: Header=BB123_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB123_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_umax_i16_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB123_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a3, a4
+; RV64IA-TSO-ZACAS-NEXT:    mv a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    bgeu a6, a1, .LBB123_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB123_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:  .LBB123_3: # in Loop: Header=BB123_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB123_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umax_i16_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomaxu.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_umax_i16_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomaxu.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw umax ptr %a, i16 %b acq_rel
   ret i16 %1
 }
@@ -13083,30 +18814,65 @@ define i16 @atomicrmw_umax_i16_seq_cst(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_umax_i16_seq_cst:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    lui a3, 16
-; RV64IA-NEXT:    addi a3, a3, -1
-; RV64IA-NEXT:    sllw a4, a3, a0
-; RV64IA-NEXT:    and a1, a1, a3
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB124_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a3, (a2)
-; RV64IA-NEXT:    and a6, a3, a4
-; RV64IA-NEXT:    mv a5, a3
-; RV64IA-NEXT:    bgeu a6, a1, .LBB124_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB124_1 Depth=1
-; RV64IA-NEXT:    xor a5, a3, a1
-; RV64IA-NEXT:    and a5, a5, a4
-; RV64IA-NEXT:    xor a5, a3, a5
-; RV64IA-NEXT:  .LBB124_3: # in Loop: Header=BB124_1 Depth=1
-; RV64IA-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB124_1
-; RV64IA-NEXT:  # %bb.4:
-; RV64IA-NEXT:    srlw a0, a3, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_umax_i16_seq_cst:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB124_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w.aqrl a3, (a2)
+; RV64IA-NOZACAS-NEXT:    and a6, a3, a4
+; RV64IA-NOZACAS-NEXT:    mv a5, a3
+; RV64IA-NOZACAS-NEXT:    bgeu a6, a1, .LBB124_3
+; RV64IA-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB124_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-NOZACAS-NEXT:  .LBB124_3: # in Loop: Header=BB124_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB124_1
+; RV64IA-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_umax_i16_seq_cst:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    lui a3, 16
+; RV64IA-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB124_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a3, (a2)
+; RV64IA-ZACAS-NEXT:    and a6, a3, a4
+; RV64IA-ZACAS-NEXT:    mv a5, a3
+; RV64IA-ZACAS-NEXT:    bgeu a6, a1, .LBB124_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB124_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-ZACAS-NEXT:  .LBB124_3: # in Loop: Header=BB124_1 Depth=1
+; RV64IA-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB124_1
+; RV64IA-ZACAS-NEXT:  # %bb.4:
+; RV64IA-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umax_i16_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amomaxu.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_umax_i16_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amomaxu.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw umax ptr %a, i16 %b seq_cst
   ret i16 %1
 }
@@ -13225,30 +18991,65 @@ define i16 @atomicrmw_umin_i16_monotonic(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_umin_i16_monotonic:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    lui a3, 16
-; RV64IA-NEXT:    addi a3, a3, -1
-; RV64IA-NEXT:    sllw a4, a3, a0
-; RV64IA-NEXT:    and a1, a1, a3
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB125_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w a3, (a2)
-; RV64IA-NEXT:    and a6, a3, a4
-; RV64IA-NEXT:    mv a5, a3
-; RV64IA-NEXT:    bgeu a1, a6, .LBB125_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB125_1 Depth=1
-; RV64IA-NEXT:    xor a5, a3, a1
-; RV64IA-NEXT:    and a5, a5, a4
-; RV64IA-NEXT:    xor a5, a3, a5
-; RV64IA-NEXT:  .LBB125_3: # in Loop: Header=BB125_1 Depth=1
-; RV64IA-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB125_1
-; RV64IA-NEXT:  # %bb.4:
-; RV64IA-NEXT:    srlw a0, a3, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_umin_i16_monotonic:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB125_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-NOZACAS-NEXT:    and a6, a3, a4
+; RV64IA-NOZACAS-NEXT:    mv a5, a3
+; RV64IA-NOZACAS-NEXT:    bgeu a1, a6, .LBB125_3
+; RV64IA-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB125_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-NOZACAS-NEXT:  .LBB125_3: # in Loop: Header=BB125_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB125_1
+; RV64IA-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_umin_i16_monotonic:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    lui a3, 16
+; RV64IA-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB125_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-ZACAS-NEXT:    and a6, a3, a4
+; RV64IA-ZACAS-NEXT:    mv a5, a3
+; RV64IA-ZACAS-NEXT:    bgeu a1, a6, .LBB125_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB125_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-ZACAS-NEXT:  .LBB125_3: # in Loop: Header=BB125_1 Depth=1
+; RV64IA-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB125_1
+; RV64IA-ZACAS-NEXT:  # %bb.4:
+; RV64IA-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umin_i16_monotonic:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amominu.h a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_umin_i16_monotonic:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amominu.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw umin ptr %a, i16 %b monotonic
   ret i16 %1
 }
@@ -13392,55 +19193,115 @@ define i16 @atomicrmw_umin_i16_acquire(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_umin_i16_acquire:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB126_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a3, (a2)
-; RV64IA-WMO-NEXT:    and a6, a3, a4
-; RV64IA-WMO-NEXT:    mv a5, a3
-; RV64IA-WMO-NEXT:    bgeu a1, a6, .LBB126_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB126_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a5, a3, a1
-; RV64IA-WMO-NEXT:    and a5, a5, a4
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:  .LBB126_3: # in Loop: Header=BB126_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB126_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_umin_i16_acquire:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB126_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a3, a4
+; RV64IA-WMO-NOZACAS-NEXT:    mv a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    bgeu a1, a6, .LBB126_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB126_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB126_3: # in Loop: Header=BB126_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB126_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_umin_i16_acquire:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB126_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    and a6, a3, a4
-; RV64IA-TSO-NEXT:    mv a5, a3
-; RV64IA-TSO-NEXT:    bgeu a1, a6, .LBB126_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB126_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a5, a3, a1
-; RV64IA-TSO-NEXT:    and a5, a5, a4
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:  .LBB126_3: # in Loop: Header=BB126_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB126_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_umin_i16_acquire:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB126_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a3, a4
+; RV64IA-TSO-NOZACAS-NEXT:    mv a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    bgeu a1, a6, .LBB126_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB126_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB126_3: # in Loop: Header=BB126_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB126_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umin_i16_acquire:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB126_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a3, a4
+; RV64IA-WMO-ZACAS-NEXT:    mv a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    bgeu a1, a6, .LBB126_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB126_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:  .LBB126_3: # in Loop: Header=BB126_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB126_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_umin_i16_acquire:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB126_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a3, a4
+; RV64IA-TSO-ZACAS-NEXT:    mv a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    bgeu a1, a6, .LBB126_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB126_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:  .LBB126_3: # in Loop: Header=BB126_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB126_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umin_i16_acquire:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amominu.h.aq a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_umin_i16_acquire:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amominu.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw umin ptr %a, i16 %b acquire
   ret i16 %1
 }
@@ -13584,55 +19445,115 @@ define i16 @atomicrmw_umin_i16_release(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_umin_i16_release:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB127_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w a3, (a2)
-; RV64IA-WMO-NEXT:    and a6, a3, a4
-; RV64IA-WMO-NEXT:    mv a5, a3
-; RV64IA-WMO-NEXT:    bgeu a1, a6, .LBB127_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB127_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a5, a3, a1
-; RV64IA-WMO-NEXT:    and a5, a5, a4
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:  .LBB127_3: # in Loop: Header=BB127_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB127_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_umin_i16_release:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB127_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a3, a4
+; RV64IA-WMO-NOZACAS-NEXT:    mv a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    bgeu a1, a6, .LBB127_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB127_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB127_3: # in Loop: Header=BB127_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB127_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_umin_i16_release:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB127_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    and a6, a3, a4
-; RV64IA-TSO-NEXT:    mv a5, a3
-; RV64IA-TSO-NEXT:    bgeu a1, a6, .LBB127_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB127_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a5, a3, a1
-; RV64IA-TSO-NEXT:    and a5, a5, a4
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:  .LBB127_3: # in Loop: Header=BB127_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB127_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_umin_i16_release:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB127_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a3, a4
+; RV64IA-TSO-NOZACAS-NEXT:    mv a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    bgeu a1, a6, .LBB127_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB127_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB127_3: # in Loop: Header=BB127_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB127_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umin_i16_release:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB127_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a3, a4
+; RV64IA-WMO-ZACAS-NEXT:    mv a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    bgeu a1, a6, .LBB127_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB127_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:  .LBB127_3: # in Loop: Header=BB127_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB127_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_umin_i16_release:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB127_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a3, a4
+; RV64IA-TSO-ZACAS-NEXT:    mv a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    bgeu a1, a6, .LBB127_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB127_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:  .LBB127_3: # in Loop: Header=BB127_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB127_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umin_i16_release:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amominu.h.rl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_umin_i16_release:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amominu.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw umin ptr %a, i16 %b release
   ret i16 %1
 }
@@ -13776,55 +19697,115 @@ define i16 @atomicrmw_umin_i16_acq_rel(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-WMO-LABEL: atomicrmw_umin_i16_acq_rel:
-; RV64IA-WMO:       # %bb.0:
-; RV64IA-WMO-NEXT:    andi a2, a0, -4
-; RV64IA-WMO-NEXT:    slli a0, a0, 3
-; RV64IA-WMO-NEXT:    lui a3, 16
-; RV64IA-WMO-NEXT:    addi a3, a3, -1
-; RV64IA-WMO-NEXT:    sllw a4, a3, a0
-; RV64IA-WMO-NEXT:    and a1, a1, a3
-; RV64IA-WMO-NEXT:    sllw a1, a1, a0
-; RV64IA-WMO-NEXT:  .LBB128_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-NEXT:    lr.w.aq a3, (a2)
-; RV64IA-WMO-NEXT:    and a6, a3, a4
-; RV64IA-WMO-NEXT:    mv a5, a3
-; RV64IA-WMO-NEXT:    bgeu a1, a6, .LBB128_3
-; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB128_1 Depth=1
-; RV64IA-WMO-NEXT:    xor a5, a3, a1
-; RV64IA-WMO-NEXT:    and a5, a5, a4
-; RV64IA-WMO-NEXT:    xor a5, a3, a5
-; RV64IA-WMO-NEXT:  .LBB128_3: # in Loop: Header=BB128_1 Depth=1
-; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-WMO-NEXT:    bnez a5, .LBB128_1
-; RV64IA-WMO-NEXT:  # %bb.4:
-; RV64IA-WMO-NEXT:    srlw a0, a3, a0
-; RV64IA-WMO-NEXT:    ret
+; RV64IA-WMO-NOZACAS-LABEL: atomicrmw_umin_i16_acq_rel:
+; RV64IA-WMO-NOZACAS:       # %bb.0:
+; RV64IA-WMO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB128_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    and a6, a3, a4
+; RV64IA-WMO-NOZACAS-NEXT:    mv a5, a3
+; RV64IA-WMO-NOZACAS-NEXT:    bgeu a1, a6, .LBB128_3
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB128_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-WMO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-NOZACAS-NEXT:  .LBB128_3: # in Loop: Header=BB128_1 Depth=1
+; RV64IA-WMO-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-NOZACAS-NEXT:    bnez a5, .LBB128_1
+; RV64IA-WMO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-NOZACAS-NEXT:    ret
 ;
-; RV64IA-TSO-LABEL: atomicrmw_umin_i16_acq_rel:
-; RV64IA-TSO:       # %bb.0:
-; RV64IA-TSO-NEXT:    andi a2, a0, -4
-; RV64IA-TSO-NEXT:    slli a0, a0, 3
-; RV64IA-TSO-NEXT:    lui a3, 16
-; RV64IA-TSO-NEXT:    addi a3, a3, -1
-; RV64IA-TSO-NEXT:    sllw a4, a3, a0
-; RV64IA-TSO-NEXT:    and a1, a1, a3
-; RV64IA-TSO-NEXT:    sllw a1, a1, a0
-; RV64IA-TSO-NEXT:  .LBB128_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-NEXT:    lr.w a3, (a2)
-; RV64IA-TSO-NEXT:    and a6, a3, a4
-; RV64IA-TSO-NEXT:    mv a5, a3
-; RV64IA-TSO-NEXT:    bgeu a1, a6, .LBB128_3
-; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB128_1 Depth=1
-; RV64IA-TSO-NEXT:    xor a5, a3, a1
-; RV64IA-TSO-NEXT:    and a5, a5, a4
-; RV64IA-TSO-NEXT:    xor a5, a3, a5
-; RV64IA-TSO-NEXT:  .LBB128_3: # in Loop: Header=BB128_1 Depth=1
-; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
-; RV64IA-TSO-NEXT:    bnez a5, .LBB128_1
-; RV64IA-TSO-NEXT:  # %bb.4:
-; RV64IA-TSO-NEXT:    srlw a0, a3, a0
-; RV64IA-TSO-NEXT:    ret
+; RV64IA-TSO-NOZACAS-LABEL: atomicrmw_umin_i16_acq_rel:
+; RV64IA-TSO-NOZACAS:       # %bb.0:
+; RV64IA-TSO-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB128_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    and a6, a3, a4
+; RV64IA-TSO-NOZACAS-NEXT:    mv a5, a3
+; RV64IA-TSO-NOZACAS-NEXT:    bgeu a1, a6, .LBB128_3
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB128_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-TSO-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-NOZACAS-NEXT:  .LBB128_3: # in Loop: Header=BB128_1 Depth=1
+; RV64IA-TSO-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-NOZACAS-NEXT:    bnez a5, .LBB128_1
+; RV64IA-TSO-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZACAS-LABEL: atomicrmw_umin_i16_acq_rel:
+; RV64IA-WMO-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-WMO-ZACAS-NEXT:  .LBB128_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    and a6, a3, a4
+; RV64IA-WMO-ZACAS-NEXT:    mv a5, a3
+; RV64IA-WMO-ZACAS-NEXT:    bgeu a1, a6, .LBB128_3
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB128_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-WMO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZACAS-NEXT:  .LBB128_3: # in Loop: Header=BB128_1 Depth=1
+; RV64IA-WMO-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZACAS-NEXT:    bnez a5, .LBB128_1
+; RV64IA-WMO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-WMO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-WMO-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZACAS-LABEL: atomicrmw_umin_i16_acq_rel:
+; RV64IA-TSO-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-TSO-ZACAS-NEXT:  .LBB128_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    and a6, a3, a4
+; RV64IA-TSO-ZACAS-NEXT:    mv a5, a3
+; RV64IA-TSO-ZACAS-NEXT:    bgeu a1, a6, .LBB128_3
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB128_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-TSO-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZACAS-NEXT:  .LBB128_3: # in Loop: Header=BB128_1 Depth=1
+; RV64IA-TSO-ZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZACAS-NEXT:    bnez a5, .LBB128_1
+; RV64IA-TSO-ZACAS-NEXT:  # %bb.4:
+; RV64IA-TSO-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umin_i16_acq_rel:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amominu.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_umin_i16_acq_rel:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amominu.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw umin ptr %a, i16 %b acq_rel
   ret i16 %1
 }
@@ -13943,30 +19924,65 @@ define i16 @atomicrmw_umin_i16_seq_cst(ptr %a, i16 %b) nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
 ;
-; RV64IA-LABEL: atomicrmw_umin_i16_seq_cst:
-; RV64IA:       # %bb.0:
-; RV64IA-NEXT:    andi a2, a0, -4
-; RV64IA-NEXT:    slli a0, a0, 3
-; RV64IA-NEXT:    lui a3, 16
-; RV64IA-NEXT:    addi a3, a3, -1
-; RV64IA-NEXT:    sllw a4, a3, a0
-; RV64IA-NEXT:    and a1, a1, a3
-; RV64IA-NEXT:    sllw a1, a1, a0
-; RV64IA-NEXT:  .LBB129_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w.aqrl a3, (a2)
-; RV64IA-NEXT:    and a6, a3, a4
-; RV64IA-NEXT:    mv a5, a3
-; RV64IA-NEXT:    bgeu a1, a6, .LBB129_3
-; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB129_1 Depth=1
-; RV64IA-NEXT:    xor a5, a3, a1
-; RV64IA-NEXT:    and a5, a5, a4
-; RV64IA-NEXT:    xor a5, a3, a5
-; RV64IA-NEXT:  .LBB129_3: # in Loop: Header=BB129_1 Depth=1
-; RV64IA-NEXT:    sc.w.rl a5, a5, (a2)
-; RV64IA-NEXT:    bnez a5, .LBB129_1
-; RV64IA-NEXT:  # %bb.4:
-; RV64IA-NEXT:    srlw a0, a3, a0
-; RV64IA-NEXT:    ret
+; RV64IA-NOZACAS-LABEL: atomicrmw_umin_i16_seq_cst:
+; RV64IA-NOZACAS:       # %bb.0:
+; RV64IA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-NOZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-NOZACAS-NEXT:  .LBB129_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NOZACAS-NEXT:    lr.w.aqrl a3, (a2)
+; RV64IA-NOZACAS-NEXT:    and a6, a3, a4
+; RV64IA-NOZACAS-NEXT:    mv a5, a3
+; RV64IA-NOZACAS-NEXT:    bgeu a1, a6, .LBB129_3
+; RV64IA-NOZACAS-NEXT:  # %bb.2: # in Loop: Header=BB129_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-NOZACAS-NEXT:  .LBB129_3: # in Loop: Header=BB129_1 Depth=1
+; RV64IA-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-NOZACAS-NEXT:    bnez a5, .LBB129_1
+; RV64IA-NOZACAS-NEXT:  # %bb.4:
+; RV64IA-NOZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-NOZACAS-NEXT:    ret
+;
+; RV64IA-ZACAS-LABEL: atomicrmw_umin_i16_seq_cst:
+; RV64IA-ZACAS:       # %bb.0:
+; RV64IA-ZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-ZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-ZACAS-NEXT:    lui a3, 16
+; RV64IA-ZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-ZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-ZACAS-NEXT:    and a1, a1, a3
+; RV64IA-ZACAS-NEXT:    sllw a1, a1, a0
+; RV64IA-ZACAS-NEXT:  .LBB129_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-ZACAS-NEXT:    lr.w.aqrl a3, (a2)
+; RV64IA-ZACAS-NEXT:    and a6, a3, a4
+; RV64IA-ZACAS-NEXT:    mv a5, a3
+; RV64IA-ZACAS-NEXT:    bgeu a1, a6, .LBB129_3
+; RV64IA-ZACAS-NEXT:  # %bb.2: # in Loop: Header=BB129_1 Depth=1
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a1
+; RV64IA-ZACAS-NEXT:    and a5, a5, a4
+; RV64IA-ZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-ZACAS-NEXT:  .LBB129_3: # in Loop: Header=BB129_1 Depth=1
+; RV64IA-ZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-ZACAS-NEXT:    bnez a5, .LBB129_1
+; RV64IA-ZACAS-NEXT:  # %bb.4:
+; RV64IA-ZACAS-NEXT:    srlw a0, a3, a0
+; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-LABEL: atomicrmw_umin_i16_seq_cst:
+; RV64IA-WMO-ZABHA:       # %bb.0:
+; RV64IA-WMO-ZABHA-NEXT:    amominu.h.aqrl a0, a1, (a0)
+; RV64IA-WMO-ZABHA-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-LABEL: atomicrmw_umin_i16_seq_cst:
+; RV64IA-TSO-ZABHA:       # %bb.0:
+; RV64IA-TSO-ZABHA-NEXT:    amominu.h a0, a1, (a0)
+; RV64IA-TSO-ZABHA-NEXT:    ret
   %1 = atomicrmw umin ptr %a, i16 %b seq_cst
   ret i16 %1
 }
@@ -14901,6 +20917,58 @@ define i32 @atomicrmw_nand_i32_monotonic(ptr %a, i32 %b) nounwind {
 ; RV64IA-ZACAS-NEXT:    bne a0, a3, .LBB150_1
 ; RV64IA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
 ; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_monotonic:
+; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB150_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w a2, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a3, a2, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w a3, a3, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a3, .LBB150_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a2
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_monotonic:
+; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB150_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a2, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a3, a2, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a3, a3, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a3, .LBB150_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a2
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_monotonic:
+; RV64IA-WMO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    lw a0, 0(a0)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  .LBB150_1: # %atomicrmw.start
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a3, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    and a4, a0, a1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    amocas.w a0, a4, (a2)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    bne a0, a3, .LBB150_1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_monotonic:
+; RV64IA-TSO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    lw a0, 0(a0)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  .LBB150_1: # %atomicrmw.start
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a3, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    and a4, a0, a1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    amocas.w a0, a4, (a2)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    bne a0, a3, .LBB150_1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ret
   %1 = atomicrmw nand ptr %a, i32 %b monotonic
   ret i32 %1
 }
@@ -15029,6 +21097,58 @@ define i32 @atomicrmw_nand_i32_acquire(ptr %a, i32 %b) nounwind {
 ; RV64IA-TSO-ZACAS-NEXT:    bne a0, a3, .LBB151_1
 ; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_acquire:
+; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB151_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w.aq a2, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a3, a2, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w a3, a3, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a3, .LBB151_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a2
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_acquire:
+; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB151_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a2, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a3, a2, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a3, a3, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a3, .LBB151_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a2
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_acquire:
+; RV64IA-WMO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    lw a0, 0(a0)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  .LBB151_1: # %atomicrmw.start
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a3, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    and a4, a0, a1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    amocas.w.aq a0, a4, (a2)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    bne a0, a3, .LBB151_1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_acquire:
+; RV64IA-TSO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    lw a0, 0(a0)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  .LBB151_1: # %atomicrmw.start
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a3, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    and a4, a0, a1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    amocas.w a0, a4, (a2)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    bne a0, a3, .LBB151_1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ret
   %1 = atomicrmw nand ptr %a, i32 %b acquire
   ret i32 %1
 }
@@ -15157,6 +21277,58 @@ define i32 @atomicrmw_nand_i32_release(ptr %a, i32 %b) nounwind {
 ; RV64IA-TSO-ZACAS-NEXT:    bne a0, a3, .LBB152_1
 ; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_release:
+; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB152_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w a2, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a3, a2, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w.rl a3, a3, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a3, .LBB152_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a2
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_release:
+; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB152_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a2, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a3, a2, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a3, a3, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a3, .LBB152_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a2
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_release:
+; RV64IA-WMO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    lw a0, 0(a0)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  .LBB152_1: # %atomicrmw.start
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a3, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    and a4, a0, a1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    amocas.w.rl a0, a4, (a2)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    bne a0, a3, .LBB152_1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_release:
+; RV64IA-TSO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    lw a0, 0(a0)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  .LBB152_1: # %atomicrmw.start
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a3, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    and a4, a0, a1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    amocas.w a0, a4, (a2)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    bne a0, a3, .LBB152_1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ret
   %1 = atomicrmw nand ptr %a, i32 %b release
   ret i32 %1
 }
@@ -15285,6 +21457,58 @@ define i32 @atomicrmw_nand_i32_acq_rel(ptr %a, i32 %b) nounwind {
 ; RV64IA-TSO-ZACAS-NEXT:    bne a0, a3, .LBB153_1
 ; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_acq_rel:
+; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB153_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w.aq a2, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a3, a2, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w.rl a3, a3, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a3, .LBB153_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a2
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_acq_rel:
+; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB153_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a2, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a3, a2, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a3, a3, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a3, .LBB153_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a2
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_acq_rel:
+; RV64IA-WMO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    lw a0, 0(a0)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  .LBB153_1: # %atomicrmw.start
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a3, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    and a4, a0, a1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    amocas.w.aqrl a0, a4, (a2)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    bne a0, a3, .LBB153_1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_acq_rel:
+; RV64IA-TSO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    lw a0, 0(a0)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  .LBB153_1: # %atomicrmw.start
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a3, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    and a4, a0, a1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    amocas.w a0, a4, (a2)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    bne a0, a3, .LBB153_1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ret
   %1 = atomicrmw nand ptr %a, i32 %b acq_rel
   ret i32 %1
 }
@@ -15389,6 +21613,58 @@ define i32 @atomicrmw_nand_i32_seq_cst(ptr %a, i32 %b) nounwind {
 ; RV64IA-TSO-ZACAS-NEXT:    bne a0, a3, .LBB154_1
 ; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_seq_cst:
+; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB154_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w.aqrl a2, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a3, a2, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w.rl a3, a3, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a3, .LBB154_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a2
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i32_seq_cst:
+; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB154_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w.aqrl a2, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a3, a2, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w.rl a3, a3, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a3, .LBB154_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a2
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_seq_cst:
+; RV64IA-WMO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    lw a0, 0(a0)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  .LBB154_1: # %atomicrmw.start
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a3, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    and a4, a0, a1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    amocas.w.aqrl a0, a4, (a2)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    bne a0, a3, .LBB154_1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i32_seq_cst:
+; RV64IA-TSO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    lw a0, 0(a0)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  .LBB154_1: # %atomicrmw.start
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a3, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    and a4, a0, a1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    amocas.w a0, a4, (a2)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    bne a0, a3, .LBB154_1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ret
   %1 = atomicrmw nand ptr %a, i32 %b seq_cst
   ret i32 %1
 }
@@ -18678,6 +24954,58 @@ define i64 @atomicrmw_nand_i64_monotonic(ptr %a, i64 %b) nounwind {
 ; RV64IA-ZACAS-NEXT:    bne a0, a3, .LBB205_1
 ; RV64IA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
 ; RV64IA-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i64_monotonic:
+; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB205_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.d a2, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a3, a2, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.d a3, a3, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a3, .LBB205_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a2
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i64_monotonic:
+; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB205_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.d a2, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a3, a2, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.d a3, a3, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a3, .LBB205_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a2
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i64_monotonic:
+; RV64IA-WMO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ld a0, 0(a0)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  .LBB205_1: # %atomicrmw.start
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a3, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    and a4, a0, a1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    amocas.d a0, a4, (a2)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    bne a0, a3, .LBB205_1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i64_monotonic:
+; RV64IA-TSO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ld a0, 0(a0)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  .LBB205_1: # %atomicrmw.start
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a3, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    and a4, a0, a1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    amocas.d a0, a4, (a2)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    bne a0, a3, .LBB205_1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ret
   %1 = atomicrmw nand ptr %a, i64 %b monotonic
   ret i64 %1
 }
@@ -18764,6 +25092,58 @@ define i64 @atomicrmw_nand_i64_acquire(ptr %a, i64 %b) nounwind {
 ; RV64IA-TSO-ZACAS-NEXT:    bne a0, a3, .LBB206_1
 ; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i64_acquire:
+; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB206_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.d.aq a2, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a3, a2, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.d a3, a3, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a3, .LBB206_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a2
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i64_acquire:
+; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB206_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.d a2, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a3, a2, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.d a3, a3, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a3, .LBB206_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a2
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i64_acquire:
+; RV64IA-WMO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ld a0, 0(a0)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  .LBB206_1: # %atomicrmw.start
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a3, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    and a4, a0, a1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    amocas.d.aq a0, a4, (a2)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    bne a0, a3, .LBB206_1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i64_acquire:
+; RV64IA-TSO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ld a0, 0(a0)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  .LBB206_1: # %atomicrmw.start
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a3, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    and a4, a0, a1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    amocas.d a0, a4, (a2)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    bne a0, a3, .LBB206_1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ret
   %1 = atomicrmw nand ptr %a, i64 %b acquire
   ret i64 %1
 }
@@ -18850,6 +25230,58 @@ define i64 @atomicrmw_nand_i64_release(ptr %a, i64 %b) nounwind {
 ; RV64IA-TSO-ZACAS-NEXT:    bne a0, a3, .LBB207_1
 ; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i64_release:
+; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB207_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.d a2, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a3, a2, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.d.rl a3, a3, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a3, .LBB207_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a2
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i64_release:
+; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB207_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.d a2, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a3, a2, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.d a3, a3, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a3, .LBB207_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a2
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i64_release:
+; RV64IA-WMO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ld a0, 0(a0)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  .LBB207_1: # %atomicrmw.start
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a3, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    and a4, a0, a1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    amocas.d.rl a0, a4, (a2)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    bne a0, a3, .LBB207_1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i64_release:
+; RV64IA-TSO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ld a0, 0(a0)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  .LBB207_1: # %atomicrmw.start
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a3, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    and a4, a0, a1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    amocas.d a0, a4, (a2)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    bne a0, a3, .LBB207_1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ret
   %1 = atomicrmw nand ptr %a, i64 %b release
   ret i64 %1
 }
@@ -18936,6 +25368,58 @@ define i64 @atomicrmw_nand_i64_acq_rel(ptr %a, i64 %b) nounwind {
 ; RV64IA-TSO-ZACAS-NEXT:    bne a0, a3, .LBB208_1
 ; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i64_acq_rel:
+; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB208_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.d.aq a2, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a3, a2, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.d.rl a3, a3, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a3, .LBB208_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a2
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i64_acq_rel:
+; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB208_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.d a2, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a3, a2, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.d a3, a3, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a3, .LBB208_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a2
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i64_acq_rel:
+; RV64IA-WMO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ld a0, 0(a0)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  .LBB208_1: # %atomicrmw.start
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a3, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    and a4, a0, a1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    amocas.d.aqrl a0, a4, (a2)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    bne a0, a3, .LBB208_1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i64_acq_rel:
+; RV64IA-TSO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ld a0, 0(a0)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  .LBB208_1: # %atomicrmw.start
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a3, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    and a4, a0, a1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    amocas.d a0, a4, (a2)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    bne a0, a3, .LBB208_1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ret
   %1 = atomicrmw nand ptr %a, i64 %b acq_rel
   ret i64 %1
 }
@@ -19010,6 +25494,58 @@ define i64 @atomicrmw_nand_i64_seq_cst(ptr %a, i64 %b) nounwind {
 ; RV64IA-TSO-ZACAS-NEXT:    bne a0, a3, .LBB209_1
 ; RV64IA-TSO-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
 ; RV64IA-TSO-ZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i64_seq_cst:
+; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB209_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.d.aqrl a2, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a3, a2, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a3, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.d.rl a3, a3, (a0)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a3, .LBB209_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a2
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i64_seq_cst:
+; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB209_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.d.aqrl a2, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a3, a2, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a3, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.d.rl a3, a3, (a0)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a3, .LBB209_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a2
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
+;
+; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i64_seq_cst:
+; RV64IA-WMO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ld a0, 0(a0)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  .LBB209_1: # %atomicrmw.start
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    mv a3, a0
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    and a4, a0, a1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    not a4, a4
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    amocas.d.aqrl a0, a4, (a2)
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    bne a0, a3, .LBB209_1
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-WMO-ZABHA-ZACAS-NEXT:    ret
+;
+; RV64IA-TSO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i64_seq_cst:
+; RV64IA-TSO-ZABHA-ZACAS:       # %bb.0:
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a2, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ld a0, 0(a0)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  .LBB209_1: # %atomicrmw.start
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    mv a3, a0
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    and a4, a0, a1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    not a4, a4
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    amocas.d a0, a4, (a2)
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    bne a0, a3, .LBB209_1
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:  # %bb.2: # %atomicrmw.end
+; RV64IA-TSO-ZABHA-ZACAS-NEXT:    ret
   %1 = atomicrmw nand ptr %a, i64 %b seq_cst
   ret i64 %1
 }

>From 94f6a6a6fb2fbf00745102075c194dd7b05b9510 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Fri, 9 Feb 2024 16:20:51 -0800
Subject: [PATCH 2/2] Update after #80947. Address review comments.

---
 llvm/lib/Target/RISCV/RISCVISelLowering.cpp |  21 +-
 llvm/test/CodeGen/RISCV/atomic-rmw.ll       | 550 +++++++++++---------
 2 files changed, 318 insertions(+), 253 deletions(-)

diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 4ecc02898952e0..1bea6beb7ae231 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -641,7 +641,7 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
 
   if (Subtarget.hasStdExtA()) {
     setMaxAtomicSizeInBitsSupported(Subtarget.getXLen());
-    if (Subtarget.hasStdExtZabha())
+    if (Subtarget.hasStdExtZabha() && Subtarget.hasStdExtZacas())
       setMinCmpXchgSizeInBits(8);
     else
       setMinCmpXchgSizeInBits(32);
@@ -19654,17 +19654,16 @@ RISCVTargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {
     return AtomicExpansionKind::None;
 
   unsigned Size = AI->getType()->getPrimitiveSizeInBits();
-  if (Size == 8 || Size == 16) {
-    if (!Subtarget.hasStdExtZabha())
+  if (AI->getOperation() == AtomicRMWInst::Nand) {
+    if (Subtarget.hasStdExtZacas() &&
+        (Size >= 32 || Subtarget.hasStdExtZabha()))
+      return AtomicExpansionKind::CmpXChg;
+    if (Size < 32)
       return AtomicExpansionKind::MaskedIntrinsic;
-    if (AI->getOperation() == AtomicRMWInst::Nand)
-      return Subtarget.hasStdExtZacas() ? AtomicExpansionKind::CmpXChg
-                                        : AtomicExpansionKind::MaskedIntrinsic;
   }
 
-  if (Subtarget.hasStdExtZacas() && AI->getOperation() == AtomicRMWInst::Nand &&
-      (Size == Subtarget.getXLen() || Size == 32))
-    return AtomicExpansionKind::CmpXChg;
+  if (Size < 32 && !Subtarget.hasStdExtZabha())
+    return AtomicExpansionKind::MaskedIntrinsic;
 
   return AtomicExpansionKind::None;
 }
@@ -19774,8 +19773,6 @@ Value *RISCVTargetLowering::emitMaskedAtomicRMWIntrinsic(
         Builder.CreateCall(LrwOpScwLoop, {AlignedAddr, Incr, Mask, Ordering});
   }
 
-  if (Subtarget.hasStdExtZabha())
-    return Builder.CreateTrunc(Result, AI->getValOperand()->getType());
   if (XLen == 64)
     Result = Builder.CreateTrunc(Result, Builder.getInt32Ty());
   return Result;
@@ -19813,8 +19810,6 @@ Value *RISCVTargetLowering::emitMaskedAtomicCmpXchgIntrinsic(
   Value *Result = Builder.CreateCall(
       MaskedCmpXchg, {AlignedAddr, CmpVal, NewVal, Mask, Ordering});
 
-  if (Subtarget.hasStdExtZabha())
-    return Builder.CreateTrunc(Result, CI->getCompareOperand()->getType());
   if (XLen == 64)
     Result = Builder.CreateTrunc(Result, Builder.getInt32Ty());
   return Result;
diff --git a/llvm/test/CodeGen/RISCV/atomic-rmw.ll b/llvm/test/CodeGen/RISCV/atomic-rmw.ll
index 8c08454b4e954a..ee802507a02f3c 100644
--- a/llvm/test/CodeGen/RISCV/atomic-rmw.ll
+++ b/llvm/test/CodeGen/RISCV/atomic-rmw.ll
@@ -3564,38 +3564,44 @@ define i8 @atomicrmw_nand_i8_monotonic(ptr %a, i8 %b) nounwind {
 ;
 ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_monotonic:
 ; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 56
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 56
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sllw a1, a1, a0
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB30_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a4, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB30_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a5, a4, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a5, .LBB30_1
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srlw a0, a4, a0
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
 ;
 ; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_monotonic:
 ; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 56
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 56
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sllw a1, a1, a0
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB30_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a4, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB30_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a5, a4, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a5, .LBB30_1
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srlw a0, a4, a0
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
 ;
 ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_monotonic:
@@ -3780,38 +3786,44 @@ define i8 @atomicrmw_nand_i8_acquire(ptr %a, i8 %b) nounwind {
 ;
 ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_acquire:
 ; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 56
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 56
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sllw a1, a1, a0
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB31_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w.aq a1, (a0)
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a4, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB31_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a5, a4, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a5, .LBB31_1
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srlw a0, a4, a0
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
 ;
 ; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_acquire:
 ; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 56
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 56
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sllw a1, a1, a0
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB31_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a4, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB31_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a5, a4, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a5, .LBB31_1
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srlw a0, a4, a0
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
 ;
 ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_acquire:
@@ -3996,38 +4008,44 @@ define i8 @atomicrmw_nand_i8_release(ptr %a, i8 %b) nounwind {
 ;
 ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_release:
 ; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 56
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 56
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sllw a1, a1, a0
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB32_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a4, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w.rl a4, a4, (a0)
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB32_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a5, a4, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a5, .LBB32_1
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srlw a0, a4, a0
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
 ;
 ; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_release:
 ; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 56
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 56
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sllw a1, a1, a0
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB32_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a4, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB32_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a5, a4, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a5, .LBB32_1
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srlw a0, a4, a0
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
 ;
 ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_release:
@@ -4212,38 +4230,44 @@ define i8 @atomicrmw_nand_i8_acq_rel(ptr %a, i8 %b) nounwind {
 ;
 ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_acq_rel:
 ; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 56
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 56
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sllw a1, a1, a0
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB33_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w.aq a1, (a0)
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a4, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w.rl a4, a4, (a0)
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB33_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w.aq a4, (a2)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a5, a4, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a5, .LBB33_1
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srlw a0, a4, a0
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
 ;
 ; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_acq_rel:
 ; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 56
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 56
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sllw a1, a1, a0
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB33_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a4, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB33_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a4, (a2)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a5, a4, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a5, .LBB33_1
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srlw a0, a4, a0
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
 ;
 ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_acq_rel:
@@ -4365,38 +4389,44 @@ define i8 @atomicrmw_nand_i8_seq_cst(ptr %a, i8 %b) nounwind {
 ;
 ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_seq_cst:
 ; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 56
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 56
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sllw a1, a1, a0
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB34_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w.aqrl a1, (a0)
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a4, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w.rl a4, a4, (a0)
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB34_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w.aqrl a4, (a2)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a5, a4, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a5, .LBB34_1
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srlw a0, a4, a0
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
 ;
 ; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i8_seq_cst:
 ; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 56
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 56
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, 255
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sllw a3, a3, a0
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    andi a1, a1, 255
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sllw a1, a1, a0
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB34_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w.aqrl a1, (a0)
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a4, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w.rl a4, a4, (a0)
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB34_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w.aqrl a4, (a2)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a5, a4, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a5, a5, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a5, a4, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a5, .LBB34_1
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srlw a0, a4, a0
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
 ;
 ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i8_seq_cst:
@@ -13476,38 +13506,46 @@ define i16 @atomicrmw_nand_i16_monotonic(ptr %a, i16 %b) nounwind {
 ;
 ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_monotonic:
 ; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 48
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 48
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sllw a1, a1, a0
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB95_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a4, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB95_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a5, a3, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a5, .LBB95_1
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srlw a0, a3, a0
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
 ;
 ; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_monotonic:
 ; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 48
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 48
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sllw a1, a1, a0
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB95_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a4, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB95_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a5, a3, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a5, .LBB95_1
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srlw a0, a3, a0
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
 ;
 ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_monotonic:
@@ -13698,38 +13736,46 @@ define i16 @atomicrmw_nand_i16_acquire(ptr %a, i16 %b) nounwind {
 ;
 ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_acquire:
 ; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 48
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 48
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sllw a1, a1, a0
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB96_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w.aq a1, (a0)
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a4, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB96_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a5, a3, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a5, .LBB96_1
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srlw a0, a3, a0
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
 ;
 ; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_acquire:
 ; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 48
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 48
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sllw a1, a1, a0
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB96_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a4, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB96_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a5, a3, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a5, .LBB96_1
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srlw a0, a3, a0
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
 ;
 ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_acquire:
@@ -13920,38 +13966,46 @@ define i16 @atomicrmw_nand_i16_release(ptr %a, i16 %b) nounwind {
 ;
 ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_release:
 ; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 48
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 48
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sllw a1, a1, a0
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB97_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a4, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w.rl a4, a4, (a0)
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB97_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a5, a3, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a5, .LBB97_1
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srlw a0, a3, a0
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
 ;
 ; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_release:
 ; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 48
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 48
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sllw a1, a1, a0
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB97_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a4, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB97_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a5, a3, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a5, .LBB97_1
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srlw a0, a3, a0
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
 ;
 ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_release:
@@ -14142,38 +14196,46 @@ define i16 @atomicrmw_nand_i16_acq_rel(ptr %a, i16 %b) nounwind {
 ;
 ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_acq_rel:
 ; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 48
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 48
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sllw a1, a1, a0
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB98_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w.aq a1, (a0)
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a4, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w.rl a4, a4, (a0)
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB98_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w.aq a3, (a2)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a5, a3, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a5, .LBB98_1
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srlw a0, a3, a0
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
 ;
 ; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_acq_rel:
 ; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 48
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 48
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sllw a1, a1, a0
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB98_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a1, (a0)
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a4, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a4, a4, (a0)
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB98_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w a3, (a2)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a5, a3, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w a5, a5, (a2)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a5, .LBB98_1
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srlw a0, a3, a0
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
 ;
 ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_acq_rel:
@@ -14298,38 +14360,46 @@ define i16 @atomicrmw_nand_i16_seq_cst(ptr %a, i16 %b) nounwind {
 ;
 ; RV64IA-WMO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_seq_cst:
 ; RV64IA-WMO-ZABHA-NOZACAS:       # %bb.0:
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 48
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 48
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sllw a1, a1, a0
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  .LBB99_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w.aqrl a1, (a0)
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a4, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w.rl a4, a4, (a0)
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB99_1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    lr.w.aqrl a3, (a2)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a5, a3, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    bnez a5, .LBB99_1
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:  # %bb.2:
-; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    srlw a0, a3, a0
 ; RV64IA-WMO-ZABHA-NOZACAS-NEXT:    ret
 ;
 ; RV64IA-TSO-ZABHA-NOZACAS-LABEL: atomicrmw_nand_i16_seq_cst:
 ; RV64IA-TSO-ZABHA-NOZACAS:       # %bb.0:
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a1, a1, 48
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srai a2, a1, 48
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    li a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    andi a2, a0, -4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    slli a0, a0, 3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lui a3, 16
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    addi a3, a3, -1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sllw a4, a3, a0
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a1, a1, a3
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sllw a1, a1, a0
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  .LBB99_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w.aqrl a1, (a0)
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a1, a2
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a4, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a4, a4, a3
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a4, a1, a4
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w.rl a4, a4, (a0)
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a4, .LBB99_1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    lr.w.aqrl a3, (a2)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a5, a3, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    not a5, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    and a5, a5, a4
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    xor a5, a3, a5
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    sc.w.rl a5, a5, (a2)
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    bnez a5, .LBB99_1
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:  # %bb.2:
-; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    mv a0, a1
+; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    srlw a0, a3, a0
 ; RV64IA-TSO-ZABHA-NOZACAS-NEXT:    ret
 ;
 ; RV64IA-WMO-ZABHA-ZACAS-LABEL: atomicrmw_nand_i16_seq_cst:



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