[llvm] [AMDGPU][MC] Support src modifiers for v_mov_b32 and v_movrel* instructions (PR #76498)

[Joe Nash via llvm-commits]

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@@ -369,22 +369,41 @@ defm V_CLREXCP : VOP1Inst <"v_clrexcp", VOP_NO_EXT<VOP_NONE>>;
 }
 
 // Restrict src0 to be VGPR
-def VOP_MOVRELS : VOPProfile<[i32, i32, untyped, untyped]> {
+def VOP_PERMLANE : VOPProfile<[i32, i32, untyped, untyped]> {
   let Src0RC32 = VRegSrc_32;
   let Src0RC64 = VRegSrc_32;
 }
 
+class VOP_MOVRELS_CLASS : VOPProfile<[i32, i32, untyped, untyped]> {
+  let Src0RC32 = VRegSrc_32;
+  let Src0RC64 = VRegSrc_32;
+
+  let InsVOP3Base = (ins FPVRegInputMods:$src0_modifiers, VGPRSrc_32:$src0);
+  let InsVOP3DPP = (ins VGPR_32:$old, FPVRegInputMods:$src0_modifiers, VGPRSrc_32:$src0, dpp_ctrl:$dpp_ctrl, row_mask:$row_mask, bank_mask:$bank_mask, bound_ctrl:$bound_ctrl);
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Sisyph wrote:

Is it necessary to redefine InsVOP3DPP,   InsVOP3DPP16, and InsVOP3DPP8? It looks like they should be created correctly by their default creation given the override of InsVOP3Base.

https://github.com/llvm/llvm-project/pull/76498