[llvm] 647010a - [RISCV] Remove unnecessary check for RVE from determineCalleeSaves. NFCI

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 9 11:00:59 PST 2024


Author: Craig Topper
Date: 2024-02-09T11:00:38-08:00
New Revision: 647010a06f3af725a2e674f025bc0e04aa1fbbff

URL: https://github.com/llvm/llvm-project/commit/647010a06f3af725a2e674f025bc0e04aa1fbbff
DIFF: https://github.com/llvm/llvm-project/commit/647010a06f3af725a2e674f025bc0e04aa1fbbff.diff

LOG: [RISCV] Remove unnecessary check for RVE from determineCalleeSaves. NFCI

The SavedRegs BitVector is checks against the CSR list later. We have
a separate CSR list for RVE that excludes X16-31 so we don't need
to filter here.

If it was needed, it would be needed for the next block of code too
which didn't have an RVE check.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVFrameLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
index b12b49797b0e09..60f92af4690e76 100644
--- a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -1003,9 +1003,7 @@ void RISCVFrameLowering::determineCalleeSaves(MachineFunction &MF,
     };
 
     for (auto Reg : CSRegs)
-      // Only save x0-x15 for RVE.
-      if (Reg < RISCV::X16 || !Subtarget.isRVE())
-        SavedRegs.set(Reg);
+      SavedRegs.set(Reg);
 
     // According to psABI, if ilp32e/lp64e ABIs are used with an ISA that
     // has any of the registers x16-x31 and f0-f31, then these registers are


        


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